Grid Filter Design for a Multi-Megawatt Medium-Voltage Voltage Source Inverter

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1 Grid Filter Design for a Multi-Megawatt Medium-Voltage Voltage Source Inverter A.A. Rockill, Grad. Student Member, IEEE, Marco Liserre, Senior Member, IEEE, Remus Teodorescu, Member, IEEE and Pedro Rodriguez, Member, IEEE Abstract Tis paper describes te design procedure and performance of an LCL grid filter for a medium-voltage neutral point clamped (NPC) converter to be adopted for a multimegawatt wind turbine. Te unique filter design callenges in tis application are driven by a combination of te medium voltage converter, a limited allowable switcing frequency, component pysical size and weigt concerns, and te stringent limits for allowable injected current armonics. Traditional design procedures of grid filters for lower power and iger switcing frequency converters are not valid for a multi-megawatt filter connecting a medium-voltage converter switcing at low frequency to te electric grid. Tis paper demonstrates a frequency domain model based approac to determine te optimum filter parameters tat provide te necessary performance under all operating conditions given te necessary design constraints. To acieve tis goal, new concepts suc as virtual armonic content and virtual filter losses are introduced. Moreover, a new passive damping tecnique tat provides te necessary damping wit low losses and very little degradation of te ig-frequency attenuation is proposed. I. INTRODUCTION Grid-connected converters are te interface for connecting distributed power generation systems to te new power system based on smart-grid tecnologies []. Te most adopted approaces to reduce grid current armonics injected by gridconnected converters are te use of tuned LC-filters, low-pass LCL-filters or a combination of te two [] []. In te first case, a group of trap filters acts on selective armonics tat need to be reduced. Tis solution as been adopted for line-commutated converters wic excange semi-square wave currents wit te grid. Te armonic content of tose currents is caracterized by dominant low frequency armonics and may be selectively filtered []. Te LCL low pass filter acts on te wole armonic spectrum and provides at least a 4 db/dec attenuation above te resonance frequency. Tis solution as been typically adopted in te lower power range for grid connected pulse-widt-modulated (PWM) converters Manuscript received October, 9. Accepted for publication September 7,. Copyrigt c IEEE. Personal use of tis material is permitted. However, permission to use tis material for any oter purposes must be obtained from te IEEE by sending a request to pubs-permissions@ieee.org. A.A. Rockill is a Principal Power Electronics Engineer wit American Superconductor, Middleton, WI 5356 USA (p: +(68)88-9; fx: +(68)83-469; em: arockill@amsc.com). Marco Liserre is wit te Politecnico di Bari, 75 Bari, Italy (em: liserre@poliba.it). Remus Teodorescu is wit Aalborg University, DK-9 Aalborg East, Denmark (em: ret@eit.aau.dk). Pedro Rodriguez is wit te Universitat Politecnica De Catalunya (UPC), Colom, 88 Terrassa, Barcelona, Spain (em: prodriguez@ee.upc.edu). because teir armonic spectrum exibits no base band armonics; only carrier band (or switcing frequency) armonics and groups of side band armonics placed around multiples of te switcing frequency []. If te switcing frequency is ig, te filter resonant frequency may be cosen low enoug suc tat any significant side-band armonics are above te resonant frequency; yet ig enoug tat it will not present a callenge to te current control loop stability [3] [6]. Hence te two filter types ave been used for two different converter types, usually adopted for two different power levels; toug some ave suggested, using an LCL filter in conjunction wit one or more tuned LC filters [6], []. Nowadays, te PWM converter as all but replaced te linecommutated converter in most applications, even tose at ig power and ig voltage [7], [8]. But in tese cases, te switcing frequency is limited by te suitable semiconductor devices to about khz. Hence, for carrier-based modulation tecniques, te first carrier band will be little more tan one decade above te fundamental; making it next to impossible to place te resonant frequency above te control bandwidt but below significant side-band armonics. Furtermore, te lower-frequency filter will necessarily be larger and more costly, placing an increased importance on te optimization process, a process tat sould also consider te impact of te filter component coice on te semiconductor rating, a dominant factor in multi-mw converters. Tis paper discusses te grid filter design for a medium voltage multilevel VSI [8], [9] in a wind turbine application were volume and weigt are critical [], [], but te process is equally valid for oter applications relevant to te integration of distributed power generation systems, suc as a large potovoltaic plant, wave energy system, STATCOM, FACTS and HVDC. Te paper is laid out in te following manner: In Section II, te specific design constraints, suc as te converter parameters and grid requirements are discussed. Section III presents te matematical model for te LCL filter, were te forward-admittance transfer functions are regarded as te basis for te design of te filter. Section IV leads te reader troug te design process; discussing te correlation between te design constraints and te filter parameters and demonstrating a step-by-step procedure to arrive at an optimal design. Te final design is verified in Section V, troug simulation results carried out over te range of power factors specified by te standards and recommendations valid for multi-mw wind turbines. Copyrigt (c) IEEE. Personal use is permitted. For any oter purposes, Permission must be obtained from te IEEE by ing pubs permissions@ieee.org.

2 V DC Fig.. Grid Filter Generator Step-up Transformer Intermediate Distribution Grid Grid connected neutral point clamped voltage source inverter. TABLE I SYSTEM PER-UNIT BASE VALUES Parameter Formula Value Power: S B 6. MVA Voltage: V B 3.3 kv Frequency: f B 5 Hz Current: I B P B 3VB 5 A Radian freq.: ω B πf B 34.6 rads/s Impedance: Z B V B P B.85 Ω Inductance: L B Z B ωb mh Capacitance: C B Z B ω B 754 µf TABLE II VDEW CURRENT LIMITS FOR ODD-INTEGER HARMONICS, 5 TH I lim /SCR kva PU ( 3 ) 3, , , , At te present time, te limit for any integer armonics above te 4 t is relaxed to tree times its base level. Below te 5 t, te limits of te odd-ordered integer armonics are relaxed according to Table II. For te purpose of tis paper, te SCR is assumed to be, wic translates to a per-unit grid impedance of 5%. Te VDEW current limits for te odd-ordered integer armonics are indicated as te black line in Fig.. Te grey dased line indicates stricter limits for even armonics and for non-integer armonics below te 5 t. II. FILTER DESIGN CONSTRAINTS Te relevant system scematic is sown in Fig.. Te gridside power converter is to be a neutral point clamped (NPC) VSI tat is interfaced to te distribution network (wic for te purposes of tis paper, will be referred to as te grid) via a generator step-up transformer (GSU). Te grid filter will be employed between te converter and te GSU. Te tree-pase wind-turbine output is to be rated at 6. MVA, 3.3 kv line-to-line at 5 Hz. Te converter must be capable of delivering full power at ±.9 power factor. Most of te analysis in tis paper is presented on a per-unit (PU) basis. For te reader s reference, te corresponding base values are listed in Table I. A. VDEW armonic limits It is a requirement tat te wind-turbine meet te German VDEW standard for generators connected to a medium voltage network []. Tese limits are also described in a paper by Araujo et.al. [3]. Relevant to te filter design, tis standard specifies limits for armonic current injection based on te grid s sort circuit ratio (SCR) te ratio of grid s sort-circuit current to te generator s rated current. Essentially, te base level armonic limits are described by I lim =.6 ( e3 V B ) ( PB e6 ) SCR, wic, for te per-unit definitions in Table I, can be written in per-unit as 3 (.6) I lim [PU] = SCR. () B. Converter Virtual Harmonic Spectrum Te armonic voltage applied to te filter is of paramount importance in te filter design. Te converter armonic voltage depends on te converter topology and also on te modulation strategy. In tis study, asymmetrical regular sampled (ASR) sine-triangle PWM wit pase disposition (PD) carriers and /6 tird-armonic injection is employed. Tis metod was cosen based on its popularity, suitability to digital implementation, ig dc-link voltage utilization and superior armonic performance []. For fixed frequency systems using tis modulation tecnique, te best armonic performance is acieved by setting te carrier frequency ω c to an odd triplen multiple of te fundamental frequency, ω c = ρ ω B were ρ {3, 9, 5,...}. Suc a carrier ratio restricts te resulting armonics to odd non-triplen armonic frequencies, tus avoiding te impact of te stricter limits for low-frequency even and non-integer armonics of te VDEW standard, as indicated by te grey dased line of Fig.. Here, te converter will employ 4.5 kv,.3 ka integrated gate bipolar transistors (IGBTs). For tis topology, te maximum switcing frequency is limited to. khz. Te closest odd-triplen multiple of te fundamental frequency tat does not exceed. khz is, wic results in a switcing frequency of.5 khz. Also as a result of tis coice for switcing device, te maximum total dc-link voltage is limited to approximately 5.5 kv (.67 PU). In tis application, te modulation index range will most likely be restricted from about.8 to.5. Te inverter voltage armonics were computed over te entire likely range of modulation index m i and fundamental reference angle θ. Wit ASR PWM, te armonics will differ wit te angular offset of te reference Copyrigt (c) IEEE. Personal use is permitted. For any oter purposes, Permission must be obtained from te IEEE by ing pubs permissions@ieee.org.

3 3 V, I [PU] max lim i L R i L R C 3 Inverter Grid v v Side Side i d v 3 L d R d C d v d Fig.. Worst case per-unit voltage armonic spectrum (ρ =, V DC =.67,.8 > m i >.5, > θ > π/ρ) plotted against te German VDEW armonic current limits for generators connected to te medium-voltage network (SCR = ). Te dased grey line indicates stricter limits for even and non-integer armonics below te 5 t. voltage. For a given modulation index, te armonics begin to repeat once te angular offset of te reference voltage increases beyond one-alf te carrier cycle. Hence, to ensure te worst case armonics are realized for eac modulation index, te fundamental reference angle must be swept over one alf te carrier period (π/ρ). Ten, for eac armonic, te worstcase voltage magnitude was extracted from te entire data set. Tis set of worst-case voltage armonics was assembled into a virtual voltage armonic spectrum (VVHS) wic is sown in Fig. for comparison purposes. Te comparison of te voltage armonics wit te current limits in Fig. gives an indication of te necessary filter admittance required to be able to meet te VDEW standard over all likely operating conditions. It sould be empasized tat tis spectrum is not for any particular modulation index or fundamental reference angle, but is a collection of te worst-case armonic voltage magnitudes over te entire practical operating range. Its use, terefore, is restricted to comparisons in te frequency domain or to relative virtual comparisons suc as te virtual loss computed in section IV-D were te compared data are all constructed from te VVHS. Since tese armonics never occur togeter as a group, no pysically significant timedomain waveform can be re-constructed from te VVHS. Noneteless, te VVHS is a valuable tool in gauging te filter performance over te entire operating range. Te VVHS in Fig. suggests te use of tuned LC filters, wic target individual armonics, is largely impractical since, for suc a low carrier frequency ratio ρ, te armonics are relatively wide-band. Te most restrictive VDEW current limits (6 39) are on te order of 3 PU, wereas te armonic voltage at tose frequencies is on te order of PU. Hence, less tan.5 decades above te fundamental frequency, te filter admittance must be less tan PU, clearly indicating te need for a filter wit at least a secondorder order admittance roll-off. C. Converter Current Ripple Te LCL-filter design is not only constrained by te compliance wit grid side specifications (armonic limits) but also by converter-side ones. Te initial converter specification, i.e. te topology and te voltage and current ratings, is devised to meet te output specification (i.e. power and armonic performance). Ten, te converter specification is adjusted, based on Fig. 3. Per-pase LCL filter scematic. te availability of suitable semiconductors, since in te multimegawatt medium-voltage realm, tere are relatively few to coose from. Hence, te grid-filter design process is part of te exercise to determine weter te output specification can be met for te given converter specification. For a given switcing frequency and dc-link voltage, te ripple current, wic contributes to te peak current flowing troug te semiconductors, is a function of te filter admittance. However, te fundamental voltage drop across te filter, wic contributes to te peak ac voltage tat te converter must produce and is limited by te dc-link voltage, is a function of te filter impedance. Hence, te iger te filter impedance, te lower te ripple current but te iger te peak voltage te converter must produce. Terefore, for te given converter topology and coice of semiconductor, te maximum ripple current is limited by te semiconductor current rating (also considering semiconductor eating), wereas te minimum ripple current is limited by te dc-link voltage and tus, by te semiconductor voltage rating. In an LCL-filter, te value of te maximum allowable current ripple as a deep impact on te cost and weigt of te converter-side inductor. Te current ripple dictates te coice of te magnetic material and te dimension and tickness of te lamination of te core in order to avoid magnetic saturation and to dissipate te eat produced by copper and core losses [4]. Hence, a lower current ripple would seem to lead to a smaller, ceaper converter-side inductor. However, te possible trade-off between te current limitation and voltage limitation is not yet understood. Hence, it is best to coose te maximum allowable current ripple as a starting point to get an idea of ow close te design is to being voltage limited. Ten, after te initial design process, wen it is understood ow muc room tere is for optimization, one can go back to try to minimize te current ripple. As previously mentioned, te semiconductor of coice is a.3 ka, 4.5 kv IGBT. Te semiconductor current rating as been considered as starting point of te LCL-filter design and te consequent maximum ripple as been calculated to be limited to 5% of rated current (5% peak-to-peak). III. LCL FILTER MODEL Te LCL filter scematic is sown in Fig. 3, were v and i represent te inverter voltage and current, wile v and i signify te grid voltage and current referred to te low-voltage side of te GSU. L and R represent te inverter side inductor and its equivalent series resistance (ESR), respectively. L and Copyrigt (c) IEEE. Personal use is permitted. For any oter purposes, Permission must be obtained from te IEEE by ing pubs permissions@ieee.org.

4 4 R represent te combined impedance of te LCL grid side inductor, te GSU leakage and te grid; te later two of wic are referred to te low-voltage side of te GSU. Te sunt leg of te LCL filter is comprised of te filter capacitor C 3 in series wit a damping impedance: te parallel combination of a resistor R d, a capacitor C d and an inductor L d. In te initial analysis, C d and L d will be assumed to be zero and infinite, effectively removing tem from te circuit. Teir purpose is revisited later in Section IV-D. Furtermore, wile it can be sown tat te parallel combination of R and R also contribute to damping; as part of te main current pat, teir value is usually minimized to reduce losses. Te presence of tese small resistances sligtly alter te model s effective polezero cancelation, but it does not significantly alter te sape or te attenuation of te transfer function. Tus tey will be neglected in te analytical expressions, but are included in te computational analysis. For tat purpose, it is assumed tat te ESR is on te order of.5 % (.5 pu), wic is quite plausible for inductors at tis power level. Te LCL filter can be considered as a two-port network wit an input or inverter port and an output or grid port, eac wit a voltage and a current associated wit it. Te matematical model of te LCL filter circuit can also be considered as a two-port network. However, from a modeling standpoint, te inputs sould consist of te externally defined variables. In tis case, te voltages are bot defined, te grid voltage by te voltage and frequency at te point of common coupling and te inverter voltage by its dc-link, topology and modulation. Bot te inverter current and grid current result from te relative pase and magnitude of tese voltages, connected by te LCL filter. Hence, from a modeling point of view, te inverter and grid voltage are te inputs, and te inverter and grid currents are te outputs. Te currents can be computed from te voltages via te state-space model for te LCL filter, in wic te states are defined by te inductor currents and capacitor voltages. A. LCL Filter State-Space Model If L d and C d are neglected, te LCL filter model of Fig. 3 as tree state variables, te inverter-side inductor current i, te grid-side inductor current i and te sunt capacitor voltage v 3. Let x represent a vector of te circuit s state variables x = [ i i v 3 ] T. () As far as te rest of te system is concerned, te capacitor voltage is an internal state and is not considered an output. However, as it is an important design parameter, it too will be considered as an output of te model. Hence, te output vector will be equal to te state vector Let te input vector u be defined as y = x. (3) u = [ v v ] T, (4) were v and v represent te inverter and grid voltages, respectively. Carrying out te modeling process of writing te differential equations, converting to te frequency domain and solving for te states, te state-space model can be written as Y(s) = G(s)U(s), were G(s) is given as G(s) = were ( L s + R d s + L R d ( L L s + L C 3 s ) L C ) 3 R d C 3 s R d ( ) L L s + R d C ( 3 ) L s + R d s + L L C 3 ( ) s + R d L + L C 3 L C 3 s (5) L = L L L + L. (6) Te two components of te state-space model of most consequence in tis analysis are te inverter voltage to inverter current transfer function wic is referred to ere as te forward self-admittance Y (s), and te inverter voltage to grid current transfer function or te forward trans-admittance Y (s), defined by (7) and (8) respectively Y (s) = I (s) V (s) = s + Rd L s + L C 3 L s (s + ζ p ω p s + ω p ) Y (s) = I (s) V (s) = R d s + R d C 3 L L (7) s (s + ζω p s + ω p ), (8) were te resonant pole frequency ω p and te resonant pole damping factor ζ p are defined as ω p = (9) L C 3 ζ p = R d C3 L. () Te per-unit magnitude vs. frequency plot of bot te forward admittance transfer functions is sown in Fig. 4. Attention is called to te effects of te individual parameters on te sape of eac transfer function. B. Forward Self-admittance Te forward self-admittance transfer function Y (s) is sown as te tick solid line in Fig. 4. It as a set of complexconjugate zeros, te corresponding frequency and damping factor of wic are given by () and (), respectively. ω z = ζ z = ω p L C 3 + L = R d C3 L () = ζ p () L + L L Since + L L is always greater tan, it will always be te case tat ω z < ω p. C. Forward Trans-admittance In contrast to te self-admittance, te forward transadmittance transfer function Y (s) exibits only a single zero; Copyrigt (c) IEEE. Personal use is permitted. For any oter purposes, Permission must be obtained from te IEEE by ing pubs permissions@ieee.org.

5 5 Fig. 4. LCL filter per-unit forward admittance transfer function magnitude plot; forward self-admittance Y (s) (tick solid line) and forward trans-admittance Y (s) (tick dased line) versus normalized frequency, (L, L =., ω p = 9, ζ p =.5). Te relevant frequencies and asymptotes are indicated on te plot. te frequency of wic is determined by te RC time constant composed of te damping resistor and te sunt capacitor. ω z = τ z = R d C 3, (3) and from (9) and () it is not difficult to sow tat ω z = ω p ζ p. (4) IV. LCL FILTER DESIGN PROCEDURE Te traditional design procedure of an LCL grid filter is based on te following assumptions: ) Te filter in te low-frequency range (below resonant frequency) can be approximated as te sum of te overall inductance; and in te ig frequency range, as te inverter side inductor alone. It is assumed tat at ig frequencies, te capacitor acts as a sort circuit. ) Te resonance frequency is assumed to be well below tat of te lowest significant low-frequency side-band armonic. 3) Te design is not constrained by te available dc-link voltage. However, it as already been sown tat for tis case, te side-band armonics are significant down to te 5 t armonic. Hence it is impossible to locate te resonant frequency well below tis armonic. Te resonant pole must be located in te frequency range were significant side-band armonics exist. Hence it is quite possible tat a subset of armonics will be amplified rater tan attenuated, wic may lead to iger tan expected ripple current. In Section III, it was demonstrated tat a resonant zero will exist below te resonant pole. Hence, it is likely tat te control will ave to accommodate necessary compensation. Finally, wit a filter of tis size and powerlevel, it is quite possible tat te maximum dc-link voltage will play a role in limiting te filter size. Te following subsections describe a step-by-step process by wic an optimum filter design for suc a system may be acieved. A. Inverter-side Inductor Value Since it is usually te case tat te LCL resonant frequency is muc lower tan te switcing frequency, it is common to consider te sunt capacitor impedance (or te entire sunt impedance) to be negligible at te frequencies at wic significant armonics exist. At tese frequencies, te inverter will see only te impedance of L, so te rate of rise of te current is limited mainly by its value alone. Furtermore, because L must endure tese iger frequencies, it is typically a more expensive component tan L wic is more of a line-frequency reactor. Consequently, te value of L is usually minimized; selected specifically to limit te worst-case inverter ripple current to witin a desired value. An equation to compute te minimum inductor value for an LCL filter for a two-level inverter was given in [] and developed in [5]. However, tis equation is dependent on te converter topology and modulation algoritm used. Terefore, it is developed ere explicitly for te tree-level converter using ASR PWM, using essentially te same assumptions as in [5]. ) Initial Inductor Value Estimate: To determine te worstcase current ripple, one must consider te converter topology togeter wit te modulation algoritm. Fig 5 sows as points in te exagon, te 9 available pase voltage vectors for Copyrigt (c) IEEE. Personal use is permitted. For any oter purposes, Permission must be obtained from te IEEE by ing pubs permissions@ieee.org.

6 6 V DC 6 V* V V V /6 V DC VDC ReV 6 T T T T T T i V 6 Re DC V T s T s Fig. 6. Peak ripple current in percent rated vs. modulation index and fundamental angle for te LCL model (L, L =.6, ω p = 9, ζ p =.5). Fig. 5. Tree-level NPC VSI voltage vectors sowing case for worst-case current ripple te NPC VSI. Te instantaneous pase-to-neutral voltage of pase a, for example, is te projection of te selected voltage vector onto te orizontal axis. Tis instantaneous pase voltage can take on values from V DC /3 to +V DC /3 in steps of V DC /6. It is te purpose of te modulator to select te proper vectors in te proper sequence to produce, on average, te desired fundamental waveform. It as been sown tat ASR PWM wit 3 rd armonic injection is almost identical to space vector modulation (SVM) in terms of voltage vector selection, except peraps te placement (in time) of te zero voltage vector []. Bot modulation strategies effectively resolve a voltage reference vector V into te tree surrounding voltage vectors { V, V, V } suc tat tey produce te desired voltage-second average. Using SVM to illustrate te process; at te beginning of te carrier cycle, te dwell times for eac of te voltage vectors is computed suc tat V T + V T + V T = V T s. (5) Eac of te voltage vectors is applied in turn (by means of te switc states) for te prescribed amount of time. Ten, at T s /, a new volt-second average is computed for te second alf of te switcing cycle, in wic te sequence of voltage vectors is ten applied in reverse wit te new set of computed dwell times. Te peak ripple current is defined by te difference between te peak volt-seconds and te average volt-seconds applied to te inductor over te switcing period. Te maximum will occur wen te zero vector dwell time T = and te oter two vector dwell times are equal T = T = T s /4. Tis will be te case wen te reference voltage vector is mid-way between V and V, as illustrated in Fig 5, were te modulation index m i = / 3 and te pase a voltage is crossing troug zero. In tis case, te peak volt-seconds applied to te inductor is V L t = V DC T s 6 4, (6) wile te average volt-seconds applied is zero. Assuming tat te fundamental voltage is constant over te switcing cycle, from (6) te minimum inductance value can be estimated by L min = V DC 4 i max f s, (7) were i max is te maximum allowable peak ripple current and f s = /T s is te switcing frequency. For te per-unit values V DC =.67, i max =.5 and f s =, te estimated minimum value for L min =.44 PU (83 µh). ) Refining te Inductor Value: Te value of L computed by (7) is based on te ypotesis outlined at te beginning of Section IV-A. Since te resonance and switcing frequencies are particularly near it is wort verifying te effect of L on i using te full-order model of te LCL-filter (assuming ζ p =.5, ω p = 9 and L /L = ). Ten one can apply te previously computed voltage armonic spectrum to compute te ripple current for te LCL filter using te full state-space model. Because te ripple current is a timedomain penomenon, te VVHS cannot be used. Instead, te current waveform is reconstructed from te complete voltage armonic spectrum for eac value of modulation index m i and fundamental angle θ, togeter wit te nominal grid voltage. Tis exercise indicates tat for tese conditions, te relation in (7) sligtly underestimates te value of L min. Instead, a larger value of L =.6 PU (94 µh) is required to limit te worst-case current ripple to below 5% (see Fig. 6), and it is not te case tat tis occurs at m i = / 3, but rater at te maximum modulation index m i =.5. Tis seems to suggest tat for te case were te switcing frequency is low, a more complete model of te LCL filter sould be used in conjunction wit te voltage armonic spectrum to refine te value of L, using (7) (or a similar relation developed for te particular topology and modulation algoritm) as a starting point. It is not difficult to estimate Copyrigt (c) IEEE. Personal use is permitted. For any oter purposes, Permission must be obtained from te IEEE by ing pubs permissions@ieee.org.

7 7 i 3 4 ω p = 9. ω p = Fig. 7. Maximum per-unit grid current armonics over te modulation index range.8 < m i <.5 (L, L =.6, ζ p =.5, ω p = 9 and 5), compared to te German VDEW per-unit armonic current injection limits (SCR = ). te necessary LCL parameters to a reasonable degree of accuracy to effectively refine te value of L. One may elect, owever, to use a larger margin tan te.4% (te difference between te computed maximum current ripple and te stated maximum limit) tat is demonstrated ere. B. Resonant Pole Frequency As mentioned before, it not possible to locate te resonant pole frequency well below te switcing frequency or well above te control bandwidt. In tis case, te placement is dominated by te need to acieve te necessary attenuation, but sould be as ig as possible to minimize te consequences on te control. In Section IV-A, preliminary parameters for te LCL filter were selected; ω p = 9, ζ p =.5, L /L =. Te value of L =.6 PU was determined as te minimum necessary to limit te current ripple to witin te specified value. Te current task is to see weter tis LCL filter meets te specified grid armonic limits over te entire operating range. Tis can be immediately accomplised by applying te VVHS (see Section II-B) to te forward trans-admittance transfer function (8). If te resulting current armonic spectrum does not meet te specification, ten it will be necessary to reduce te transadmittance transfer function. Equation (8) suggests tat to decrease te trans-admittance, one may increase one or bot of te inductor values and/or reduce te resonant pole frequency. But, because L tends to be a more expensive component, increasing its value is avoided. One may elect to increase L, but as te resonant pole frequency as a squared effect, a sligt sift in te pole frequency can ave a significant effect on te trans-admittance. Furtermore, increasing L can ave oter consequences, wic is discussed in more detail in Section IV-C. At tis stage in te design, it is prudent to determine te resonant frequency at wic te filter meets te specified armonic limits. Fig. 7 indicates tat te LCL filter wit te parameters listed above does not meet te VDEW standard. It was necessary to reduce te resonant frequency to ω p = 5, before all armonics (except te 5 t ) met te standard wit sufficient margin. Te 5 t armonic fails, but tis is because it coincides wit te resonant frequency and, for te moment, tere is almost no damping. However, te damping will not remain so low and is dealt wit in Section IV-D. C. Grid-side Inductor and Sunt Capacitor Selection For a specific value of ω p, an increase (or decrease) in L must be accompanied by a corresponding decrease (or increase) in C 3. Te possible range of values of tese two components is evaluated wit respect to teir effect on te inverter voltage, te inverter losses and te component size, wic is also related to component weigt and cost. ) Inverter voltage: As mentioned before, te VDEW limits in tis paper are based on an assumed SCR of. Tis translates to a grid impedance of 5%. Furtermore, te filter is connected to te grid troug te GSU. Tis transformer will ave some leakage inductance associated wit it as well; a typical value is somewere around 5%. Hence, it is assumed tat te minimum effective grid side inductance is %. Now it remains to determine te upper bound. A typical power specification usually consists of a volt-amp (VA) rating accompanied by a power factor range. For example, it is common to require full-power operation to ±.9 power factor. One must ensure tat te full operating range is attainable. Te pasor relationsips between te grid voltage and current and tat of te inverter can be used to understand te effect of L and C 3 in tis regard. Te pasor equations for te lossless LCL filter are given in (8) and (9). [ ( ) ] Ṽ = L ω L ω p Ṽ [ ( ) ] (8) ω + jω (L + L ) ω p Ĩ [ ( ) ] Ĩ = L ω L ω p Ĩ + j ( ) ω ωl ω Ṽ p (9) Equation (8) indicates tat for te given values of L and ω p, and assuming te grid voltage magnitude V does not vary significantly, te inverter voltage magnitude V necessary to provide a given output power S = ṼĨ is directly proportional to te value of L. Te dc-link voltage of.67 PU is limited by te structure of te inverter and te voltage rating of te semiconductors. Furtermore, wit ASR PWM modulation wit 3 rd armonic injection, te maximum modulation index witout going into over-modulation is.5. Assuming over-modulation is to be avoided in te steady-state, tese parameters suggest tat te maximum fundamental inverter voltage magnitude is limited to.74 PU V max = m imax ( V DCmax ) 3 =.74. Using (8) te fundamental inverter voltage magnitude V required for eac operating point over te full specified output power range was computed for a range of values of L. Te results, sown in Fig. 8, suggest tat for V DC =.67 PU, L =.6 PU and ω p = 5, te grid side inductance must be below.5 PU to avoid over-modulation; limited by te case were te inverter is providing maximum output power at.9 PF sourcing. Hence, te grid side inductance must be selected somewere between. and.5 PU. Tis value is including te grid impedance and te transformer leakage inductance. Copyrigt (c) IEEE. Personal use is permitted. For any oter purposes, Permission must be obtained from te IEEE by ing pubs permissions@ieee.org.

8 8 U stored PF (Sourcing). PF.9 PF (Sinking) L Fig.. Total per-unit stored energy in filter at maximum output power over te possible range of L. maximum energy stored in te component per te following two relations, Fig. 8. Per-unit inverter voltage magnitude over te full specified output power range ( S. PU, ±.9 PF) vs. L, sown against te limit imposed by te maximum DC link voltage (L =.6, ω p = 5., V DC =.67, m imax =.5). I PF (Sourcing). PF.9 PF (Sinking) L Fig. 9. Per-unit inverter current magnitude at full rated power over te range of specified power factor (S =. PU, ±.9 PF) vs. L. ) Inverter losses: Te iger te inverter current necessary to supply te specified grid power, te greater te inverter losses. Te trade-off between L and C 3 can ave a significant effect on te amount of reactive power tat te inverter must source over te specified output power range. Te pasor relationsip in (9) can be used to calculate te corresponding effect on te inverter current. For a given ω p, varying te value of L (and tus L as well) reflects te tradeoff between L and C 3. Te magnitude of te inverter current necessary to supply te maximum specified grid power over te range of possible values of L is sown in Fig. 9. Te figure suggests tat increasing te value of L decreases te maximum inverter current necessary to provide te maximum output power. Te current magnitude is igest wen te power factor is.9 PF sinking, but te trend is te same over te entire power factor range. 3) Filter component size: Finally, it is wortwile to investigate te relative size and weigt of te filter due to te L -C 3 trade-off. Te total energy stored in a component can be used as a relative measure of its size. Since te current troug and voltage across eac component can be computed from te state-space model, it is a simple matter to compute te U Lmax = LI max U Cmax = CV max. () Te aggregate total energy stored in te filter components at te maximum output power over te specified power factor range and possible values of L is sown in Fig.. Tis figure suggests tat after L increases past about.8 PU, te total energy stored in te filter begins to increase, suggesting a larger filter. Altoug not discernable from tis figure, as te value of L increases, te energy stored in bot L and C 3 continues to decrease. It is te increased energy stored in L tat is responsible for te overall increase in total stored energy. However, te portion of L made up of te GSU leakage inductance and referred grid impedance sould be taken into account since tese will not contribute to te filter volume. For te purpose of tis investigation, a value of L =. PU (. mh) was cosen as a compromise between filter volume and inverter losses. Ten, for a resonant frequency of ω p = 5 PU (5 Hz), a capacitor value C 3 =.45 PU ( 79 µf) results. D. Passive Damping Hig-order filters, like LCL-filters, ave more state variables tan te simple L-filter. Te dynamics associated wit tese states may become unstable if tey are triggered by a disturbance or by a sudden variation of te operating point; suc as a cange in te power transferred by te converter to te grid troug te filter or a cange in te grid voltage due to a voltage sag caused by a fault. Te proper damping of tese dynamics can be acieved by modifying te filter structure wit te addition of passive elements or by acting on te parameters or on te structure of te controller tat manages te power converter. Te first option is referred to as passive damping wile te second is referred to as active damping. Passive damping causes a decrease of te overall system efficiency because of te associated losses tat are partly caused by te low frequency armonics (fundamental and undesired pollution) present in te state variables and partly by te switcing frequency armonics [4], [5]. Moreover, passive damping reduces te filter effectiveness since it is very difficult to insert te damping in a selective way; only at tose frequencies were te system is resonating due to a lack of impedance. Copyrigt (c) IEEE. Personal use is permitted. For any oter purposes, Permission must be obtained from te IEEE by ing pubs permissions@ieee.org.

9 9 As a consequence, te passive damping is always present and te filter attenuation at te switcing frequency and above is compromised [5]. Active damping consists of modifying te controller parameters or te controller structure [3], [6]; eiter cutting te resonance peak and/or providing a pase-lead around te resonance frequency range [7]. Active damping metods are more selective in teir action, tey do not produce losses but tey are also more sensitive to parameter uncertainties [8], [9]. Moreover te possibility to control te potential unstable dynamics is limited by te controller bandwidt wic is dependent on te controller sampling frequency. In [3] it as been demonstrated tat te sampling frequency sould be at least double te filter s resonance frequency to effectively perform active damping. Tis paper only addresses issues related to te design of te filter, wile control aspects are not treated. Hence only passive damping solutions are investigated ere. Moreover, te selection of te best passive damping solution [] is a very callenging task since te resonance frequency is very low and te damping as not only influence on te stability and on te filter attenuation, but also on te amplitude of te armonics around te resonance frequency. Tis translates to an effect on te overall armonic content and on te losses tat tose armonics can cause. Te VVHS is used to compare tree possible passive damping solutions; one defined as total damping and te oter two as unique selective damping metods. Total damping consists simply of te damping resistor R d in series wit te sunt capacitor. It can be sown tat resistances in series or parallel wit any of te reactive filter elements contribute to damping in te same way as R d ; tey provide damping over all te frequencies; ence, also were it is unnecessary [5]. Muc of te work in tis paper as considered only te effect of te series damping of te LCL-filter capacitor by R d since losses would be quite ig for resistors in series wit te inductors. Te two selective damping solutions, differentiated ere as selective low-pass damping and selective resonant damping, attempt to emulate wit passive elements te selective effect of active damping. In te case of low-pass selective damping, an inductor is inserted in parallel wit te damping resistor (indicated in grey as L d in Fig. 3) in order to inibit lowfrequency losses were te inductor will act as a sort circuit. It as been sown tat te passive damping losses at low frequency can be as muc as alf of te overall filter losses [5]. Selective resonant damping, wic places a parallel RLC circuit in series wit C 3, seeks not only to mitigate te low frequency losses as mentioned above, but also to reduce te losses at te switcing frequency and improve te igfrequency attenuation by again sorting te damping resistor R d troug te damping capacitor C d at ig frequencies. Te values of L, L and C 3 were taken from te prior analysis and are set to.6,. and.45, respectively. In te case of te total damping metod, te resistor value R d was varied to acieve te variation of te damping coefficient according to (). A value of ζ p =.3, corresponding to a value of R d =.67 PU (.484 Ω) was cosen as a good compromise between damping and attenuation. Ten, for te two selective damping metods, te damping resistor R d was set to tat same value, and te oter damping components were varied to acieve te variation in te damping coefficient. In te case of te selective low-pass solution, a value of L d =. PU (. mh) corresponded to an effective damping coefficient of ζ p =.3. In te case of te selective resonant solution, te damping circuit resonant frequency was constrained to be equal to te resonant frequency ω p of te LCL filter. Te value of te damping inductor was varied in conjunction wit te damping capacitor C d to acieve te variation in damping coefficient as determined by te ratio of te resonant pole s real component to its frequency. Te values of L d =.67 PU (389 µh) and C d =.595 PU ( µf) resulted in an effective damping coefficient of ζ p =.3. Fig. sows te bode plot for te forward trans-admittance Y (s) (inverter voltage to grid current transfer function) for te tree different damping solutions, all at ζ p =.3. Also sown, for comparison purposes, is te filter wit almost no damping (ζ p =.). All tree damping solutions compromise te filter s ig-frequency attenuation, but te selective resonant damping at least retains te tird-order admittance roll-off caracteristic of te undamped LCL filter. Ten, to determine te relative effect of te different damping solutions on te filter losses, te VVHS as defined in Section II-B was applied to eac filter model and te losses were computed over te range of damping factor from. to.3. As was stated in Section II-B, te VVHS comprises te worst-case armonic spectrum over te entire feasible operating range and does not indicate te true armonic spectrum at any one operating point. Terefore te losses computed by te VVHS represent only a comparison of te losses (or virtual losses) between te damping metods and do not represent actual losses. Te virtual losses vs. damping factor are sown in Fig.. Te bode plot for te total damping and te selective lowpass damping are very similar since, in bot cases, te same value of R d is used (.67 PU) and te effect of L d is only to by-pass te damping resistor at low frequencies. As Fig. sows, tis significantly reduces te losses incurred in te damping resistor, but results in te same ig frequency attenuation degradation as te total damping solution. Te filter wit selective resonant damping also by-passes te damping resistor at te iger frequencies, resulting in even lower losses as well as improved ig-frequency attenuation. Te resulting current armonics from te application of te VVHS to eac of te filter models is sown in Fig. 3. It demonstrates tat for a damping coefficient of ζ p =.3, te selective resonant solution is te only one tat meets te VDEW limits for armonic current injection. Of course, tis solution requires extra damping components (L d and C d ), but due to te relatively small current and voltage applied to te devices, one would not expect tem to significantly affect te overall filter volume. Te performance of te LCL filter design wit selective damping was computed using te VVHS as te input wile te value of all components was swept between ±% of nominal. Fig. 4 sows te variation in te bode plot for te forward trans-admittance transfer function and Fig. 5 sows te worst case current armonics over te entire parameter Copyrigt (c) IEEE. Personal use is permitted. For any oter purposes, Permission must be obtained from te IEEE by ing pubs permissions@ieee.org.

10 TABLE III FINAL FILTER COMPONENT VALUES AND RATINGS Component PU Value Voltage PU Rating Current L.6..9 L... C R d L d C d Virtual loss (PU) Total damping Sel. low pass Sel. resonant.5 variation. Te only armonic wic fails is te 9 t armonic and it was determined tat tis occurred at te point were all te parameter values were at -% of nominal, a igly unlikely case. A furter investigation sowed tat if te major components (L, L and C 3 ) are eld to witin ±5% te limits are still met. Over te entire ±% parameter variation te damping coefficient, nominally set to.3, varied between. to.37. V. VERIFICATION OF FILTER EFFECTIVENESS Te final parameter values and ratings for te LCL circuit are given in Table III. Te damping circuit parameters L d, C d and R d result in a filter damping coefficient ζ p of.3. It now remains to verify te design at te specification limits. In te simulation, te inverter is assumed lossless wit a constant dclink voltage of.67 PU (5.5 kv) and te primary referred grid voltage (at te filter output) is assumed to be a pure 5 Hz sinusoid at 3.3 kv line-to-line. Te simulation was repeated for te maximum output power S = 6. MVA ( PU) at tree power factor settings;.9 PF sourcing,. PF and.9 PF sinking. In eac case, te resulting armonic spectrum is compared to te German VDEW armonic current injection limits (v B = 3.3 kv, P B = 6 MVA, SCR = ). Fig. 6 sows te simulated results at maximum leading ζ p Fig.. Virtual losses versus te damping coefficient, ζ p. I 3 4 Total damping Sel. low pass Sel. resonant Fig. 3. Worst-case grid current armonics for te tree damping solutions at ζ p =.3 as compared to te VDEW standard limits (sourcing) power factor. One will note tat for tis operating condition, te modulation index is near te maximum at m i =.. Hence, one would expect te worst case ripple current to occur ere since in section IV-A, Fig. 6, it was sown tat te maximum ripple current occurs at te maximum modulation index. Te resulting peak current ripple is approximately % (4% peak-to-peak). Te losses in te damping resistor at tese conditions was computed to be about 9.5 kw per pase (.5 PU). Figs. 7 and 8 sow similar results for unity and.9 power factor lagging (or sinking), respectively. Te damping resistor losses in eac of tese cases was 7.8 kw (.4 PU) and 6.5 kw (.3 PU), respectively. It may be tempting to tink tat since te design meets te standards by suc margin in tese tree cases, te filter may be over designed. However, tese simulations sow only tree specific cases. Tis demonstrates te benefit of designing te filter using te virtual voltage armonic spectrum. Over te entire likely operating range, te margins will not be so large. Figs. 3 and 5, wic sow te armonics based on te VVHS are better indicators in tis regard. Fig.. Bode plot of te forward trans-admittance Y (s) for te tree damping solutions at ζ p =.3 VI. CONCLUSIONS Tis paper as demonstrated a design procedure for a medium-voltage multi-megawatt grid connected LCL filter. Copyrigt (c) IEEE. Personal use is permitted. For any oter purposes, Permission must be obtained from te IEEE by ing pubs permissions@ieee.org.

11 Max. Min. Nom. m i =., i max = ±. P =.9, Q =.9 v Y i P =.9, Q =.43 Y [deg] Max. Min. Nom. v i I 5 3 f [PU] Fig. 4. Bode plots for LCL filter wit resonant damping for all parameters swept witin ±% of nominal. Fig. 6. Simulated converter waveforms for S =. PU,.9 PF sourcing. Top: inverter voltage and current, Mid: grid voltage and current, Bot: grid current armonics vs. VDEW standard. Worst Case Nominal m i =.97, i max = ±.4 P =., Q =. v i I 3 v P =., Q = Fig. 5. Worst-case grid current armonics over ±% parameter variation as compared to te VDEW standard limits. i I Te procedure sougt to ensure tat te full specified output power and te limits for maximum injected armonic currents and peak inverter ripple current could be met given te constraints on te inverter dc-link voltage and maximum switcing frequency. Te procedure centered on minimizing te most costly component, te inverter side inductor; and attempted to acieve te smallest, ligtest, most-efficient design by placing te resonant frequency as ig as possible, minimizing te maximum stored energy and te maximum inverter current and selecting te most efficient damping circuit. Te original contributions of te paper include: ) Te concept of te virtual voltage armonic spectrum (VVHS), simplifying te filter performance assessment over te entire operating range. ) Te demonstration tat te often cited metod for computing te value of te inverter side inductor may underestimate te necessary value wen te resonant frequency must be located were significant armonics exist. 3) Te idea of selective resonant damping wic as been sown to bot reduce losses and improve attenuation over te oter damping metods discussed. Te performance of te final filter design was verified troug simulation Fig. 7. Simulated converter waveforms for S =. PU,. PF. Top: inverter voltage and current, Mid: grid voltage and current, Bot: grid current armonics vs. VDEW standard. ACKNOWLEDGEMENT Te autors would like to tank te Wisconsin Electric Macines and Power Electronics Consortium (WEMPEC) at te University of Wisconsin and te Vestas Power Program at Aalborg University for teir generous support of tis researc. REFERENCES [] R. Teodorescu, M. Liserre, and P. Rodriguez, Grid Converters for Potovoltaic and Wind Power Systems. Wiley,, ISBN: [] K. Amed, S. Finney, and B. Williams, Passive filter design for treepase inverter interfacing in distributed generation, in Compatibility in Power Electronics, 7. CPE 7, Jun 7, pp. 9. [3] Y. Lang, D. Xu, S. Hadianamrei, and H. Ma, A novel design metod of lcl type utility interface for tree-pase voltage source rectifier, in Power Electronics Specialists Conference, 5. PESC 5. IEEE 36t, June 5, pp [4] M. Liserre, F. Blaabjerg, and A. Dell Aquila, Step-by-step design procedure for a grid-connected tree-pase pwm voltage source converter, International Journal of Electronics, vol. 9, no. 8, pp , Aug 4. Copyrigt (c) IEEE. Personal use is permitted. For any oter purposes, Permission must be obtained from te IEEE by ing pubs permissions@ieee.org.

12 4 m i =.8, i max = ±.4 P =.9, Q =.4 v i v i P =.9, Q = Fig. 8. Simulated converter waveforms for S =. PU,.9 PF sinking. Top: inverter voltage and current, Mid: grid voltage and current, Bot: grid current armonics vs. VDEW standard. [5] M. Liserre, F. Blaabjerg, and S. Hansen, Design and control of an LCLfilter-based tree-pase active rectifier, Industry Applications, IEEE Transactions On, vol. 4, no. 5, pp. 8 9, Sep/Oct 5. [6] A.-S. Luiz and B. Filo, Minimum reactive power filter design for ig power tree-level converters, in Industrial Electronics, 8. IECON 8. 34t Annual Conference of IEEE, Nov. 8, pp [7] Pariksit.B.C and V. Jon, Higer order output filter design for grid connected power converters, in Power Systems Conference (NPSC), IIT Bombay, Dec. 8, pp [Online]. Available: ttp: // npsc8/npsc CD/Data/Oral/FIC4/p.pdf [8] Y. Sozer, D. Torrey, and S. Reva, New inverter output filter topology for pwm motor drives, Power Electronics, IEEE Transactions on, vol. 5, no. 6, pp. 7 7, Nov. [9] B. Wang, G. Venkataramanan, and A. Bendre, Unity power factor control for tree-pase tree-level rectifiers witout current sensors, Industry Applications, IEEE Transactions on, vol. 43, no. 5, pp , sep / oct 7. [] T. Wang, Z. Ye, G. Sina, and X. Yuan, Output filter design for a grid-interconnected tree-pase inverter, in Power Electronics Specialist Conference, 3. PESC 3. 3 IEEE 34t Annual, vol., June 3, pp vol.. [] M. Lowenstein and J. Hibbard, Modeling and application of passivearmonic trap filters for armonic reduction and power factor improvement, in Industry Applications Society Annual Meeting, 993., Conference Record of te 993 IEEE, Oct 993, pp vol.. [] D. G. Holmes and T. A. Lipo, Pulse Widt Modulation for Power Converters: Principles and Practice, ser. Power Engineering, M. E. El- Hawary, Ed. IEEE Press, 3. [3] I. Gabe, V. Montagner, and H. Pineiro, Design and implementation of a robust current controller for vsi connected to te grid troug an lcl filter, Power Electronics, IEEE Transactions on, vol. 4, no. 6, pp , June 9. [4] J. Kim, J. Coi, and H. Hong, Output lc filter design of voltage source inverter considering te performance of controller, in Power System Tecnology,. Proceedings. PowerCon. International Conference on, vol. 3,, pp [5] J. Pipps, A transfer function approac to armonic filter design, Industry Applications Magazine, IEEE, vol. 3, no., pp. 68 8, Mar/Apr 997. [6] G. Sen, D. Xu, L. Cao, and X. Zu, An improved control strategy for grid-connected voltage source inverters wit an lcl filter, Power Electronics, IEEE Transactions on, vol. 3, no. 4, pp , July 8. [7] J. Carrasco, L. Franquelo, J. Bialasiewicz, E. Galvan, R. Guisado, M. Prats, J. Leon, and N. Moreno-Alfonso, Power-electronic systems for te grid integration of renewable energy sources: A survey, Industrial Electronics, IEEE Transactions on, vol. 53, no. 4, pp. 6, June 6. [8] D. Krug, S. Bernet, S. Fazel, K. Jalili, and M. Malinowski, Comparison I of.3-kv medium-voltage multilevel converters for industrial mediumvoltage drives, Industrial Electronics, IEEE Transactions on, vol. 54, no. 6, pp , Dec. 7. [9] J. Rodriguez, J.-S. Lai, and F. Z. Peng, Multilevel inverters: a survey of topologies, controls, and applications, Industrial Electronics, IEEE Transactions on, vol. 49, no. 4, pp , Aug. [] N. He, D. Xu, and L. Huang, Te application of particle swarm optimization to passive and ybrid active power filter design, Industrial Electronics, IEEE Transactions on, vol. 56, no. 8, pp , Aug. 9. [] B. Corasaniti, L. Barbieri, I. Arnera, and I. Valla, Hybrid power filter to enance power quality in a medium voltage distribution network, Industrial Electronics, IEEE Transactions on, vol. 56, no. 3, pp , Marc 9. [] V. D. E. VDEW, Eigenerzeugungsanlagen am mittelspannungsnetz, Verlags- und Wirtscaftsgesellscaft der Elecktrizittswerke m.b.h. - VWEW, Tec. Rep., Dec 998. [3] S. Araujo, A. Engler, B. Saan, and F. Antunes, Lcl filter design for grid-connected npc inverters in offsore wind turbines, in Power Electronics, 7. ICPE 7. 7t Internatonal Conference on, Oct. 7, pp [4] A. V. D. Bossce and V. C. Valcev, Inductors and Transformers for Power. CRC Press, 5. [5] V. H. Prasad, Analysis and comparison of space vector modulation scemes for tree-leg and four-leg voltage source inverters, Master s tesis, Virginia Polytecnic Institute and State University, May 997. [6] F. Liu, Y. Zou, S. Duan, J. Yin, B. Liu, and F. Liu, Parameter-design of a two-current-loop controller used in a grid-connected inverter system wit lcl filter, Industrial Electronics, IEEE Transactions on, vol. 56, no., pp , Nov. 9. [7] M. Liserre, A. Dell Aquila, and F. Blaabjerg, Stability improvements of an lcl-filter based tree-pase active rectifier, in Power Electronics Specialists Conference,. pesc. IEEE 33rd Annual, vol. 3,, pp. 95 vol.3. [8] M. Liserre, R. Teodorescu, and F. Blaabjerg, Stability of potovoltaic and wind turbine grid-connected inverters for a large set of grid impedance values, Power Electronics, IEEE Transactions on, vol., no., pp. 63 7, Jan. 6. [9] F. Blaabjerg, E. Ciarantoni, A. Dell Aquila, M. Liserre, and S. Vergura, Sensitivity analysis of an LCL-filter-based tree-pase active rectifier via a virtual circuit approac. Journal of Circuits, Systems & Computers, vol. 3, no. 4, pp , 4. A.A. Rockill (S 87-M 9-GS 4) received te Bacelor of Science degree in Electrical Engineering from te University of Wisconsin, Milwaukee USA in 99, and te Master of Science degree in Electrical Engineering from te University of Wisconsin, Madison in 6. He is currently working toward te P.D. degree at te University of Wisconsin, Madison under te direction of Prof. Tomas A. Lipo. Mr. Rockill as approximately years of industry experience in te area of ig power macines and drives and in te development of special application power electronics solutions for te industrial, medical and telecom/datacom markets. Currently, Mr. Rockill is a Principal Power Electronics Engineer wit American Superconductor, Inc., Middleton, WI USA, were e is working in te Advanced Tecnology department of teir Power Systems Division. His present researc interests include ig-power medium voltage macines and drives and te utility application of power electronics. Mr. Rockill is a Registered Professional Engineer in te State of Wisconsin and is a member of IEEE Industry Applications, IEEE Power Electronics, and IEEE Power Engineering Societies, and Tau Beta Pi Engineering Honor Society. Copyrigt (c) IEEE. Personal use is permitted. For any oter purposes, Permission must be obtained from te IEEE by ing pubs permissions@ieee.org.

13 3 Marco Liserre (S -M -SM 7) received te MSc and PD degree in Electrical Engineering from te Bari Polytecnic, respectively in 998 and. From January 4 e is an assistant professor of te Bari Polytecnic teacing courses of power electronics, industrial electronics and electrical macines. He as publised 3 tecnical papers, 3 of tem in international peer-reviewed journals, and tree capters of a book. Tese works ave received more tan 5 citations. He as been visiting Professor at Aalborg University (Denmark) at Alcala de Henares University (Spain) and Cristian-Albrects University of Kiel, Germany. Dr. Liserre is a senior member of IEEE. He is an Associate Editor of te IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS. He is te Founder and e as been Editor-in-Cief of te IEEE INDUSTRIAL ELECTRONICS MAGAZINE, 7-9. He is te Founder and te Cairman of te Tecnical Committee on Renewable Energy Systems of te IEEE Industrial Electronics Society. He is Associate Editor of te IEEE TRANSACTIONS ON SUSTAINABLE ENERGY. He as received te IES 9 Early Career Award. Dr. Liserre was Co-Cairman of te International Symposium on Industrial Electronics (ISIE ). He is Vice-President responsible of te publications of te IEEE Industrial Electronics Society. Pedro Rodrguez (S 99-M 4) received te M.S. and P.D. degrees in electrical engineering from te Universitat Politecnica de Catalunya (UPC), Barcelona, Spain, in 994 and 4, respectively. In 99, e joined te faculty of UPC as an Assistant Professor, were e is currently an Associate Professor in te Department of Electrical Engineering, te Head of te Researc Group on Renewable Electrical Energy Systems. In 5, e was a Visiting Researcer at te Center for Power Electronics Systems, Virginia Polytecnic Institute and State University, Blacksburg. In 6 and 7, e was a Postdoctoral Researcer at te Institute of Energy Tecnology, Aalborg University (AAU), were e as been lecturing P.D. courses since 6. Currently, e is a Cosupervisor of te Vestas Power Program at te AAU. He as coautored about papers in tecnical journals and conference proceedings. He is te older of four patents. His researc interest is focused on applying power electronics to improve grid integration of renewable energy systems. Dr. Rodriguez is a member of te IEEE Power Electronics Society, IEEE Industry Applications Society, IEEE Industrial Electronics Society (IES), and te IEEE IES Tecnical Committee on Renewable Energy Systems. He is an Associate Editor of te IEEE TRANSACTIONS ON POWER ELECTRONICS and te Cair of te IEEE-IES Student and GOLD Members Activities Committee. Remus Teodorescu received te Dipl.Ing. degree in electrical engineering from Polytecnical University of Bucarest, Romania in 989, and PD. degree in power electronics from University of Galati, Romania, in 994. In 998, e joined Aalborg University, Institute of Energy Tecnology, power electronics section were e currently works as full professor. He as more tan 5 papers publised in IEEE conferences and transactions, book and 4 patents (pending). He is te co-recipient of te Tecnical Committee Prize Paper Awards at IEEE IAS Annual Meeting 998. He is a Senior Member of IEEE, Associate Editor for IEEE Power Electronics Letters and cair of IEEE Danis joint IES/PELS/IAS capter. His areas of interests are: design and control of power converters used in grid connected renewable energy systems mainly wind power and potovoltaics converters for utility applications FACTS/HVDC. Remus Teodorescu is te coordinator of te Vestas Power Program, a 5 year researc program involving PD students in te area of power electronics, power systems and storage. Copyrigt (c) IEEE. Personal use is permitted. For any oter purposes, Permission must be obtained from te IEEE by ing pubs permissions@ieee.org.