IR Receiver Lab. General Instructions. System Overview. 55:041 Electronic Circuits The University of Iowa Fall 2014

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1 General Instructions IR Receiver Lab Students work in teams of two. Teams must demonstrate before 5 p.m. on Thursday November 20 th that the following parts of their circuit works: detector block, buffer block, and driver for the load. Teams must demonstrate the complete receiver circuit by Thursday December 4 th. Each team member must submit an individual Post-Lab report, but the reports can be identical. Students must submit their individual reports on ICON by 5 p.m. on the last day of class. At end of this document is a checklist that will be used during lab demonstration. Teams have access to the lab during any of the lab sessions posted on the class website. There will be several questions related to this lab on the final exam. System Overview In this lab students design and build an IR receiver that is compatible with the IR transmitter that they built in a previous lab. This lab is about designing and demonstrating a proof-of-concept circuit. A successful design will meet the specifications and adhere to constraints placed on the design. It will be useful if students imagine themselves as working at a company, say ACME IR Controls, which markets IR remote controls. Figure 1 is a block diagram of the IR receiver which the design should follow. From left to right in the diagram, the circuit works as follows. The photodetector receives the 5-kHz IR signal from the transmitter. However, the photodetector will also respond to the much larger ambient light, which will result in a slowly varying dc component. The photodetector will also respond to the light generated by indoor fluorescent lighting and incandescent lights that which generate light fluctuations at 120 Hz. The signal-to-noise ratio at the detector is poor a very small 5- khz signal superimposed on a large dc component, and mixed with a large 120-Hz signal. The detector block will remove the dc component and provide some filtering, suppressing the 120- Hz signal. The buffer block will provide significant filtering, further suppressing the 120-Hz signal. It has a low output resistance and can drive the gain block. The gain block further filters the signal and amplifies the signal from mv-levels to V-levels. The output of the gain block is a (albeit possibly distorted) 5-kHz square wave. The AC DC convert block converts this square wave to a dc voltage that is the input to the output driver. When the output from this block is high enough, it turns on the driver which activates a load. Version 1.4 1

2 55:041 Electronic Circuits The University of Iowa Fall 2014 Figure 1. Block diagram of IR receiver. Specifications and Constraints The requirement thatt the IR receiver should follow the design in Figure 1 is a design constraint. Another constraint is that designss may only use certain components, and yet another constraint is the following. Students design all the blocks, except the AC DC convert block. The design for this block is given (see below) and must be used. specification ns and constraints are those that are required, and secondary specifications/constraints are those that are desired. As an example, if the receiver does not respond the 5-kHz signal from the transmitter (previouslyy built), the designed is fatally flawed. If this flawed design were presented at ACME s design meeting, the team leader may reassign the project to another designer. On the other hand, a secondary constraint for this design n is that the number of components should be less than 35. If a design uses, say 37 components, but adheres to all primary constrains and meet all primary specification ns, the team leader will probably sign off on the design. Table 1 summarizes the specifications for the design andd Table 2 summarizes the design constraints. Figure 2 shows the AC DC convert blockk that the design must incorporate. Figure 2. The ACDC conversion circuit that must be used. The diode is a 1N914 diode. Version 1.4 2

3 Item Specification /Secondary Operating frequency Must detect 5-kHz transmitter from previous lab Sensitivity Must respond across 6 feet Noise rejection Load Short-circuit protection at load Power-on LED indicator Must operate in brightly-lit fluorescent lab (2251 SC), situated 1 feet away from 100 W incandescent light Must be able to drive a 5 V, 50 ma noninductive load Must limit output current to 50 ma when load is shorted Light a green LED when the circuit is powered up Secondary Secondary Power supply Dual 15V or single 15V Table 1. Specifications for IR receiver. Item Constraint /Secondary Components available Cost AD/DC conversion and detection LM358 op-amp, 2N7000 MOSFET, 2N2222 BJT, 1N914 diodes, 5% resistors, standard selection of capacitors. Cost of all materials, excluding plastic breadboard and power supplies < $20. Use Digikey s 1-off pricing for calculations. Use supplied design (see below) Phototransistor Use LTR-4206E Secondary Number of components 35 Secondary Buffer amplifier configuration Common source MOSFET amplifier Secondary Main voltage amplifier configuration Can be MOSFET, BJT, or Op-Amp Table 2. Design constraints. Version 1.4 3

4 Receiver Demonstration and Grading Teams must demonstrate their design to the instructor or T.A. in the lab. The fluorescent lights will be turned on, and students circuit will sit 1 foot away from a 100 W incandescent light. Students will use their previously-designed and built IR transmitter. The specifications require that the design has a range of 6 feet, so the initial test distance will be 6 feet. If the receiver does not respond, we will reduce the distance to 5 feet and test again. If the receiver still does not work, we will reduce the distance to 4 feet and so on. As the distance decreases, so does the maximum possible grade. Designs that operate across 6 feet are eligible for an A grade, assuming an acceptable post-lab report. Designs that fail to work across 1 foot can still receive a D grade assuming the post-lab report is solid. Post Lab Report Students work in teams on the design and demonstration, but must submit individual post-lab reports. Mandatory elements are the following. Complete schematic of the overall circuit. It should contain all the information needed to build the circuit: component values, pinouts of semiconductors, and so on. All relevant design details. This will generally mean design calculations, but in some instances it may be solid motivation for design values. For example, assuming a design uses a BJT amplifier, the design should show calculations for the bias resistors. By contrast, it not required to calculate values for decoupling capacitors which one would place close to op-amps. From experience we know that 0.1 F capacitors will most likely suffice. Frequency-response calculations and measurements for the buffer and main amplifier. A consideration of an alternate design for at least one block. For example, assume that the design uses a BJT amplifier for the main gain block. The post-lab report should include some analysis/discussion of an op-amp based gain block. Cost estimate and component count. Photograph of the built circuit. Extra Credit Designs that significantly exceed the criteria in one or more aspect will receive extra credit, assuming the primary criteria are met. Here are some examples: In addition to the mandatory consideration of an alternate design for the gain block, analyze alternate designs for the buffer- or driver block. Use SPICE to optimize the design with respect to either distance or noise immunity. Create a PCB for and build the circuit on the PCB. Version 1.4 4

5 IR Link Check-off Sheet Team Member Present for Demonstration Yes Yes No No Item Check Notes 5 khz 20%? # of TX diodes Value of TX Tested range with Range without noise lamp Range with noise lamp Drive 50 ma load? Current Limiting? Short circuit protection at load? Power on LED at receiver? Number of components < 35? Coupling Cap Designed? (or trial-and-error) Yes No Own Tx Lab Tx Coupling Cap Designed? (or trial-and-error) ft ft Yes No Yes No Yes No Yes No Yes No Yes No Circuit Construction. Does the circuit layout follow a logical left-to-right flow, is the power supply at the top, and the ground at the bottom, are components laid out neatly, etc. Very neat, logical layout Acceptable Needs improvement Rats nest, sloppy Extra Credit, Additional Comments List and/or describe things that are worthy of extra credit. For example, particularly neat construction on a perforated board, very long range, reverse polarity protection, Version 1.4 5

6 Appendix The table below contains SPICE parameters for the 2N7000 MOSFET. For the transistor, use the $GENERIC_N part, and set the values as in the table below. SPICE Parameter Value 20.78u 2 9.7m 2u LAMBDA 267u For hand calculations, use 0.05 A V 2, V, and 2 V. Version 1.4 6