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- Clifton Harris
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9 PACKAGE OPTION ADDENDUM 17-Mar-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) Device Marking EA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to EA SNJ54LS592J FA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type -55 to FA SNJ54LS592W FA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type -55 to FA SNJ54LS592W SN54LS592J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS592J (4/5) Samples SN54LS592J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS592J SN54LS593J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS593J SN54LS593J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS593J SN74LS592D ACTIVE SOIC D Green (RoHS SN74LS592D ACTIVE SOIC D Green (RoHS SN74LS592DE4 ACTIVE SOIC D Green (RoHS SN74LS592DE4 ACTIVE SOIC D Green (RoHS SN74LS592DG4 ACTIVE SOIC D Green (RoHS SN74LS592DG4 ACTIVE SOIC D Green (RoHS SN74LS592N ACTIVE PDIP N Pb-Free (RoHS) SN74LS592N ACTIVE PDIP N Pb-Free (RoHS) SN74LS592NSR ACTIVE SO NS Green (RoHS SN74LS592NSR ACTIVE SO NS Green (RoHS SN74LS593DW ACTIVE SOIC DW Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS592 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS592 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS592 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS592 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS592 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS592 CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS592N CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS592N CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS592 CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS592 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS593 Addendum-Page 1
10 PACKAGE OPTION ADDENDUM 17-Mar-2017 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan SN74LS593DW ACTIVE SOIC DW Green (RoHS SN74LS593DWR ACTIVE SOIC DW Green (RoHS SN74LS593DWR ACTIVE SOIC DW Green (RoHS SN74LS593N ACTIVE PDIP N Pb-Free (RoHS) SN74LS593N ACTIVE PDIP N Pb-Free (RoHS) (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS593 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS593 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS593 CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS593N CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS593N Device Marking SNJ54LS592J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to EA SNJ54LS592J SNJ54LS592J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to EA SNJ54LS592J SNJ54LS592W ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type -55 to FA SNJ54LS592W SNJ54LS592W ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type -55 to FA SNJ54LS592W SNJ54LS593J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54LS593J (4/5) Samples SNJ54LS593J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54LS593J (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS - please check for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS : TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 2
11 PACKAGE OPTION ADDENDUM 17-Mar-2017 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54LS592, SN54LS593, SN74LS592, SN74LS593 : Catalog: SN74LS592, SN74LS593 Military: SN54LS592, SN54LS593 NOTE: Qualified Version Definitions: Catalog - TI's standard catalog product Military - QML certified for Military and Defense Applications Addendum-Page 3
12 PACKAGE MATERIALS INFORMATION 17-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant SN74LS592NSR SO NS Q1 SN74LS593DWR SOIC DW Q1 Pack Materials-Page 1
13 PACKAGE MATERIALS INFORMATION 17-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LS592NSR SO NS SN74LS593DWR SOIC DW Pack Materials-Page 2
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20 SCALE DW0020A PACKAGE OUTLINE SOIC mm max height SOIC C TYP 9.97 SEATING PLANE A 1 PIN 1 ID AREA 20 18X C NOTE 3 2X B NOTE X C A B 2.65 MAX 0.33 TYP 0.10 SEE DETAIL A 0.25 GAGE PLANE DETAIL A TYPICAL /A 05/2016 NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm per side. 5. Reference JEDEC registration MS
21 DW0020A EXAMPLE BOARD LAYOUT SOIC mm max height SOIC 20X (2) SYMM X (0.6) 18X (1.27) SYMM (R 0.05) TYP (9.3) LAND PATTERN EXAMPLE SCALE:6X SOLDER MASK OPENING METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING 0.07 MAX ALL AROUND NON SOLDER MASK DEFINED 0.07 MIN ALL AROUND SOLDER MASK DEFINED SOLDER MASK DETAILS /A 05/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
22 DW0020A EXAMPLE STENCIL DESIGN SOIC mm max height SOIC 20X (0.6) 20X (2) 1 SYMM 20 18X (1.27) SYMM (9.3) SOLDER PASTE EXAMPLE BASED ON mm THICK STENCIL SCALE:6X /A 05/2016 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design.
Data sheet acquired from Harris Semiconductor SCHS038C Revised October 2003
Data sheet acquired from Harris Semiconductor SCHS038C Revised October 2003 The CD4035B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages
Data sheet acquired from Harris Semiconductor SCHS083B Revised March 2003
Data sheet acquired from Harris Semiconductor SCHS083B Revised March 2003 The CD4536B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages
SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES
SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SDAS113B APRIL 1982 REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers
SN74LVC138A-Q1 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER SCAS708B SEPTEMBER 2003 REVISED FEBRUARY 2008
1 1FEATURES Qualified for Automotive Applications ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pf, R = 0) Operates From 2 V to 3.6 V Inputs Accept
SN5406, SN5416, SN7406, SN7416 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS SDLS031A DECEMBER 1983 REVISED DECEMBER 2001
SN5406, SN5416, SN7406, SN7416 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS SDLS031A DECEMBER 1983 REVISED DECEMBER 2001 Convert TTL Voltage Levels to MOS Levels High Sink-Current
ORDERING INFORMATION. QFN RGY Tape and reel SN74CBT3257RGYR CU257. SOIC D Tape and reel SN74CBT3257DR
SN74CBT3257 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER SCDS017M MAY 1995 REVISED JANUARY 2004 5-Ω Switch Connection Between Two Ports TTL-Compatible Input Levels D, DB, DBQ, OR PW PACKAGE (TOP VIEW) RGY
CD74HC4051-Q1 ANALOG MULTIPLEXER/DEMULTIPLEXER
CD74HC4051-Q1 ANALOG MULTIPLEXER/DEMULTIPLEXER Qualified for Automotive Applications Wide Analog Input Voltage Range of ±5 V Max Low ON Resistance 70 Ω Typical (V CC V EE = 4.5 V) 40 Ω Typical (V CC V
SN74CBT3253C DUAL 1-OF-4 FET MULTIPLEXER/DEMULTIPLEXER 5-V BUS SWITCH WITH 2-V UNDERSHOOT PROTECTION
FEATURES SN74CBT3253C Functionally Identical to Industry-Standard 3253 Function Undershoot Protection for Off-Isolation on A and B Ports up to 2 V Bidirectional Data Flow, With Near-Zero Propagation Delay
GENERAL-PURPOSE LOW-VOLTAGE COMPARATORS
1 LMV331-Q1 SINGLE, LMV393-Q1 DUAL SLOS468D MAY 2005 REVISED AUGUST 2011 GENERAL-PURPOSE LOW-VOLTAGE COMPARATORS Check for Samples: LMV331-Q1 SINGLE, LMV393-Q1 DUAL 1FEATURES Qualified for Automotive Applications
SN54ABT125, SN74ABT125 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
Typical V OLP (Output Ground Bounce)
CY74FCT2373T 8-BIT LATCH WITH 3-STATE OUTPUTS
Function and Pinout Compatible With the Fastest Bipolar Logic 25-Ω Output Series Resistors Reduce Transmission-Line Reflection Noise Reduced V OH (Typically = 3.3 V) Version of Equivalent FCT Functions
ORDERING INFORMATION. QFN RGY Tape and reel SN74CBT3257RGYR CU257. SOIC D Tape and reel SN74CBT3257DR
SN74CBT3257 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER SCDS017M MAY 1995 REVISED JANUARY 2004 5-Ω Switch Connection Between Two Ports TTL-Compatible Input Levels D, DB, DBQ, OR PW PACKAGE (TOP VIEW) RGY
SN54ABT241, SN74ABT241A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 ma Per JEDEC Standard JESD-17 ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015;
description/ordering information
Controlled Baseline One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of 40 C to 25 C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification
DUAL RS-232 DRIVER/RECEIVER WITH IEC PROTECTION
1 TRS232E www.ti.com... SLLS791C JUNE 2007 REVISED SEPTEMBER 2008 DUAL RS-232 DRIVER/RECEIVER WITH IEC61000-4-2 PROTECTION 1FEATURES 2 Meets or Exceeds TIA/RS-232-F and ITU Recommendation V.28 Operates
description TPS3836, TPS3838 DBV PACKAGE (TOP VIEW) V DD GND RESET TPS3837 DBV PACKAGE (TOP VIEW)
М TPS3836E18-Q1 / J25-Q1 / H30-Q1 / L30-Q1 / K33-Q1 Qualified for Automotive Applications Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval ESD Protection Exceeds
SN54AC574, SN74AC574 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
2-V to 6-V V CC Operation Inputs Accept Voltages to 6 V Max t pd of 8.5 ns at 5 V 3-State Outputs Drive Bus Lines Directly description/ordering information These 8-bit flip-flops feature 3-state outputs
MC1489, MC1489A, SN55189, SN55189A, SN75189, SN75189A QUADRUPLE LINE RECEIVERS
MC489, MC489A, SN5589, SN5589A, SN7589, SN7589A QUADRUPLE LINE RECEIVERS SLLS095D SEPTEMBER 973 REVISED OCTOBER 998 Input Resistance...3 kω to 7 kω Input Signal Range...±30 V Operate From Single 5-V Supply
ORDERING INFORMATION. TOP-SIDE MARKING PDIP N Tube SN74S1051N SN74S1051N
Designed to Reduce Reflection Noise Repetitive Peak Forward Current to 200 ma 12-Bit Array Structure Suited for Bus-Oriented Systems description/ordering information This Schottky barrier diode bus-termination
description/ordering information
µ SLVS060K JUNE 1976 REVISED APRIL 2005 3-Terminal Regulators Output Current Up To 500 ma No External Components High Power-Dissipation Capability Internal Short-Circuit Current Limiting Output Transistor
1OE 1Y1 1A1 1A2 1Y2 1Y3 1A3 1A4 1Y4 2OE 2Y1 2A1 2Y2 2A2 2A3 2Y3 2Y4 2A4 POST OFFICE BOX DALLAS, TEXAS 75265
SDAS040B DECEMBER 983 REVISED JANUARY 995 Open-Collector Outputs Drive Bus Lines or Buffer Memory Address Registers Eliminate the Need for 3-State Overlap Protection pnp Inputs Reduce dc Loading Open-Collector
SN54LS373, SN54LS374, SN54S373, SN54S374, SN74LS373, SN74LS374, SN74S373, SN74S374 OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS
SN54LS373, SN54LS374, SN54S373, SN54S374, SN74LS373, SN74LS374, SN74S373, SN74S374 OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS SDLS165B OCTOBER 1975 REVISED AUGUST 2002 Choice of Eight
VOLTAGE PROTECTION FOR 2-, 3-, OR 4-CELL Lion BATTERIES (2 nd PROTECTION)
Not Recommended for New Designs: bq900, bq900a, bq90 FEATURES FUNCTION -, -, or -Cell Secondary Protection Each cell in a multiple cell pack is compared to an Low Power Consumption I CC < µa internal reference
SN74LVC1G32-Q1 SINGLE 2-INPUT POSITIVE-OR GATE
FEATURES Qualified for Automotive Applications Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval Supports 5-V V CC Operation Inputs Accept Voltages to 5.5 V Low
description/ordering information
SCLS087E DECEMBER 1982 REVISED AUGUST 2003 Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 20-µA Max I CC Typical t pd = 11 ns ±4-mA Output Drive
CD54HC4017, CD74HC4017
CD54HC4017, CD74HC4017 Data sheet acquired from Harris Semiconductor SCHS200D November 1997 - Revised October 2003 High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs [ /Title (CD74 HC401
General-Purpose FET-INPUT OPERATIONAL AMPLIFIERS
OPA3 OPA3 OPA23 OPA23 OPA43 OPA43 OPA43 OPA3 OPA23 OPA43 SBOS4A NOVEMBER 994 REVISED DECEMBER 22 General-Purpose FET-INPUT OPERATIONAL AMPLIFIERS FEATURES FET INPUT: I B = 5pA max LOW OFFSET VOLTAGE: 75µV
SN54HC574, SN74HC574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
Wide Operating Voltage Range of 2 V to 6 V High-Current 3-State Noninverting Outputs Drive Bus Lines Directly or Up To 15 LSTTL Loads Low Power Consumption, 80-μA Max I CC Typical t pd = 22 ns ±6-mA Output
description/ordering information
The SN5405 is obsolete and no longer is supplied. Package Options Include Plastic Small-Outline (D, NS), Shrink Small-Outline (DB), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard
ORDERING INFORMATION ORDERABLE PART NUMBER SN74CBTS3306PWR
5-Ω Switch Connection Between Two Ports TTL-Compatible Input Levels description/ordering information The SN74CBTS3306 features independent line switches with Schottky diodes on the I/Os to clamp undershoot.
SN54HCT540, SN74HCT540 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
Operating Voltage Range of 4.5 V to 5.5 V Low Power Consumption, 80-µA Max I CC Typical t pd = 12 ns ±6-mA Output Drive at 5 V Low Input Current of 1 µa Max Inputs Are TTL-Voltage Compatible High-Current
CD54HC4060, CD74HC4060, CD54HCT4060, CD74HCT4060
CD54HC4060, CD74HC4060, CD54HCT4060, CD74HCT4060 Data sheet acquired from Harris Semiconductor SCHS207G February 1998 - Revised October 2003 High-Speed CMOS Logic 14-Stage Binary Counter with Oscillator
SN74CB3T3253 DUAL 1-OF-4 FET MULTIPLEXER/DEMULTIPLEXER 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V TOLERANT LEVEL SHIFTER
SN74CB3T3253 DUAL 1-OF-4 FET MULTIPLEXER/DEMULTIPLEXER 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V TOLERANT LEVEL SHIFTER FEATURES Low Power Consumption (I CC = 20 µa Max) Output Voltage Translation Tracks
±24-mA Output Drive at 3.3 V Operates from 1.65 V to 3.6 V Latch-Up Performance Exceeds 250 ma Per Max t pd of 3.4 ns at 3.
www.ti.com SN74ALVC245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES271D APRIL 1999 REVISED JULY 2004 FEATURES ±24-mA Output Drive at 3.3 V Operates from 1.65 V to 3.6 V Latch-Up Performance Exceeds
CY74FCT257T QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS
Function, Pinout, and Drive Compatible With FCT and F Logic Reduced V OH (Typically = 3.3 V) Version of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
CD54HCT373, CD74HCT373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
4.5-V to 5.5-V V CC Operation Wide Operating Temperature Range of 55 C to 125 C Balanced Propagation Delays and Transition Times Standard Outputs Drive Up To 10 LS-TTL Loads Significant Power Reduction
SINGLE INVERTER GATE Check for Samples: SN74LVC1G04
1 SN74LVC1G04 www.ti.com SCES214Z APRIL 1999 REVISED NOVEMBER 2012 SINGLE INVERTER GATE Check for Samples: SN74LVC1G04 1FEATURES 2 Available in the Texas Instruments NanoFree I off Supports Live Insertion,
5-V/3.3-V CMOS Outputs 5-V/3.3-V Input Down to 2.5-V Output Level I off Supports Partial-Power-Down Mode Shift With 2.5-V V CC
SN74CB3T3257 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER FEATURES Low Power Consumption (I CC = 20 µa Max) Output Voltage Translation Tracks
CD4070B, CD4077B. CMOS Quad Exclusive-OR and Exclusive-NOR Gate. Features. Ordering Information. [ /Title (CD40 70B, CD407 7B) /Subject
[ /Title (CD40 70B, CD407 7B) /Subject (CMO S Quad Exclu- sive- OR and Exclu- sive- NOR Gate) /Autho r () /Keywords (Harris Semiconductor, CD400 0, metal gate, CMOS, pdip, cerdip, mil, Data sheet acquired
SN5406, SN5416, SN7406, SN7416 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
Convert TTL Voltage Levels to MOS Levels High Sink-Current Capability Input Clamping Diodes Simplify System Design Open-Collector Drivers for Indicator Lamps and Relays Inputs Fully Compatible With Most
ORDERING INFORMATION T A PACKAGE ORDERABLE PART NUMBER. SOIC D Tape and reel SN74CBTD3306DR 40 C to85 C
5-Ω Switch Connection Between Two Ports TTL-Compatible Input Levels Designed to Be Used in Level-Shifting Applications description/ordering information The SN74CBTD3306 features two independent line switches.
SN54ALS09, SN74ALS09 QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS
SN54ALS09, SN74ALS09 QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS SDAS084B APRIL 1982 REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip
2.5-V INTEGRATED REFERENCE CIRCUIT
1 1FEATURES Excellent Temperature Stability Wide Operating Current Range Initial Tolerance: 0.2% Max Directly Interchangeable With LM136 Dynamic Impedance: 0.6 Ω Max Needs No Adjustment for Minimum Temperature
CD4051B-Q1, CD4052B-Q1, CD4053B-Q1 CMOS ANALOG MULTIPLEXERS/DEMULTIPLEXERS WITH LOGIC LEVEL CONVERSION
Features Qualified for Automotive Applications Wide Range of Digital and Analog Signal Levels Digital: V to 0 V Analog: 0 V P-P Low ON Resistance, Ω (Typ) Over V P-P Signal Input Range for = V High OFF
CD54/74HC540, CD74HCT540, CD54/74HC541, CD54/74HCT541
CD54/74HC540, CD74HCT540, CD54/74HC541, CD54/74HCT541 Data sheet acquired from Harris Semiconductor SCHS189C January 1998 - Revised July 2004 High-Speed CMOS Logic Octal Buffer and Line Drivers, Three-State
description/ordering information
Operating Voltage Range of 4.5 V to 5.5 V High-Current 3-State True Outputs Can Drive Up To 15 LSTTL Loads Low Power Consumption, 80-µA Max I CC Typical t pd = 22 ns ±6-mA Output Drive at 5 V Low Input
SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
1 SN74LVC1G126-Q1 www.ti.com... SCES467B JULY 2003 REVISED APRIL 2008 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT 1FEATURES Qualified for Automotive Applications ESD Protection Exceeds 2000 V Per MIL-STD-883,
TL494 PULSE-WIDTH-MODULATION CONTROL CIRCUITS
FEATURES Complete PWM Power-Control Circuitry Uncommitted Outputs for 200-mA Sink or Source Current Output Control Selects Single-Ended or Push-Pull Operation Internal Circuitry Prohibits Double Pulse
CD54HC373, CD74HC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
2-V to 6-V V CC Operation Wide Operating Temperature Range of 55 C to 125 C Balanced Propagation Delays and Transition Times Standard Outputs Drive up to 15 LS-TTL Loads Significant Power Reduction Compared
CD54HC273, CD74HC273, CD54HCT273, CD74HCT273
Data sheet acquired from Harris Semiconductor SCHS174B February 1998 - Revised May 2003 CD54HC273, CD74HC273, CD54HCT273, CD74HCT273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset [ /Title (CD74
LM723/LM723C Voltage Regulator
1 LM723, LM723C LM723/LM723C Voltage Regulator Check for Samples: LM723, LM723C 1FEATURES DESCRIPTION 2 150 ma Output Current Without External Pass The LM723/LM723C is a voltage regulator designed Transistor
SN74CB3Q OF-8 FET MULTIPLEXER/DEMULTIPLEXER 2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
SN74CB3Q3251 1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER 2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH SCDS173A AUGUST 2004 REVISED MARCH 2005 FEATURES Data and Control Inputs Provide Undershoot High-Bandwidth
SN54ALS38B, SN74ALS38B QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS
SN54ALS38B, SN74ALS38B QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS SDAS196B APRIL 1982 REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline (D) Packages, Ceramic
ORDERING INFORMATION. QFN RGY Tape and reel SN74CBT3253RGYR CU253. SOIC D Tape and reel SN74CBT3253DR
SN74CBT3253 DUAL 1-OF-4 FET MULTIPLEXER/DEMULTIPLEXER TTL-Compatible Input Levels D, DB, DBQ, OR PW PACKAGE (TOP VIEW) SCDS018O MAY 1995 REVISED JANUARY 2004 RGY PACKAGE (TOP VIEW) 1OE S1 1B4 1B3 1B2 1B1
SN54HCT373, SN74HCT373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
Operating Voltage Range of 4.5 V to 5.5 V High-Current 3-State True Outputs Can Drive Up To 15 LSTTL Loads Low Power Consumption, 80-µA Max I CC Typical t pd = 21 ns ±6-mA Output Drive at 5 V Low Input
74ACT11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
74ACT11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS031C JULY 1987 REVISED APRIL 1996 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes
CD54HC7266, CD74HC7266
CD54HC7266, CD74HC7266 Data sheet acquired from Harris Semiconductor SCHS219D August 1997 - Revised September 2003 High-Speed CMOS Logic Quad 2-Input EXCLUSIVE NOR Gate [ /Title (CD74H C7266) /Subject
SN74ALVCHR16601DL 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS FEATURES DESCRIPTION/ORDERING INFORMATION
FEATURES Member of the Texas Instruments Widebus Family UBT Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Modes Operates From 1.65 V to 3.6
SN74S BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY
Designed to Reduce Reflection Noise Repetitive Peak Forward Current to 200 ma 16-Bit Array Structure Suited for Bus-Oriented Systems Package Options Include Plastic Small-Outline Packages and Standard
SN54LS373, SN54LS374, SN54S373, SN54S374, SN74LS373, SN74LS374, SN74S373, SN74S374 OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS
SN54LS373, SN54LS374, SN54S373, SN54S374, SN74LS373, SN74LS374, SN74S373, SN74S374 OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS SDLS165B OCTOBER 1975 REVISED AUGUST 2002 Choice of Eight
description/ordering information
µ SLVS060K JUNE 1976 REVISED APRIL 2005 3-Terminal Regulators Output Current Up To 500 ma No External Components High Power-Dissipation Capability Internal Short-Circuit Current Limiting Output Transistor
ORDERING INFORMATION. 0 C to 70 C Reel of 2000 TRSF3232ECDWR SSOP DB Reel of 2000 TRSF3232ECDBR RT32EC
www.ti.com FEATURES Operates With 3-V to 5.5-V V CC Supply Operates up to 1 Mbit/s Low Supply Current... 300 μa Typ External Capacitors... 4 0.1 μf Accept 5-V Logic Input With 3.3-V Supply Latch-Up Performance
TL7770-5, TL DUAL POWER-SUPPLY SUPERVISORS
TL7770-5, TL7770-12 DUAL POWER-SUPPLY SUPERVISORS Power-On Reset Generator Automatic Reset Generation After Voltage Drop RESET Defined When V CC Exceeds 1 V Wide Supply-Voltage Range... 3.5 V to 18 V Precision
SN54ACT374, SN74ACT374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
4.5-V to 5.5-V V CC Operation Inputs Accept Voltages to 5.5 V Max t pd of 10 ns at 5 V Inputs Are TTL-Voltage Compatible description/ordering information These 8-bit flip-flops feature 3-state outputs
SN54AC04, SN74AC04 HEX INVERTERS
SN54AC04, SN74AC04 HEX INVERTERS 2-V to 6-V V CC Operation Inputs Accept Voltages to 6 V Max t pd of 7 ns at 5 V SN54AC04...J OR W PACKAGE SN74AC04...D, DB, N, NS, OR PW PACKAGE (TOP VIEW) 1A 1Y 2A 2Y
description logic diagram (positive logic) logic symbol
SDAS074B APRIL 1982 REVISED JANUARY 1995 AS1004A Offer High Capacitive-Drive Capability Driver Version of ALS04B and AS04 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers
74ACT11244 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS
3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin V CC and GND Configurations to Minimize High-Speed
DUAL RS-232 DRIVER/RECEIVER WITH IEC PROTECTION
1 TRS232E www.ti.com... SLLS791C JUNE 2007 REVISED SEPTEMBER 2008 DUAL RS-232 DRIVER/RECEIVER WITH IEC61000-4-2 PROTECTION 1FEATURES 2 Meets or Exceeds TIA/RS-232-F and ITU Recommendation V.28 Operates
CD54HC280, CD74HC280, CD54HCT280, CD74HCT280
Data sheet acquired from Harris Semiconductor SCHS175D November 1997 - Revised October 2003 Features CD54HC280, CD74HC280, CD54HCT280, CD74HCT280 High-Speed CMOS Logic 9-Bit Odd/Even Parity Generator/Checker
description/ordering information
2-V to 6-V V CC Operation Inputs Accept Voltages to 6 V Max t pd of 9 ns at 5 V SN54AC86... J OR W PACKAGE SN74AC86... D, DB, N, NS, OR PW PACKAGE (TOP VIEW) 1A 1B 1Y 2A 2B 2Y GND 1 2 3 4 5 6 7 14 13 12
SN74LVC1G00-EP SINGLE 2-INPUT POSITIVE-NAND GATE
FEATURES DESCRIPTION/ORDERING INFORMATION SN74LVC1G00-EP SINGLE 2-INPUT POSITIVE-NAND GATE SCES450D DECEMBER 2003 REVISED SEPTEMBER 2006 Controlled Baseline I off Supports Partial-Power-Down Mode One Assembly/Test
SINGLE 2-INPUT POSITIVE-AND GATE
1 SN74LVC1G08-Q1 www.ti.com... SCES556F MARCH 2004 REVISED APRIL 2008 SINGLE 2-INPUT POSITIVE-AND GATE 1FEATURES Qualified for Automotive Applications Latch-Up Performance Exceeds 100 ma Per Supports 5-V
SN74LVC1G14-EP SINGLE SCHMITT-TRIGGER INVERTER SCES674 MARCH 2007
1 SN74LVC1G14-EP SINGLE SCHMITT-TRIGGER INVERTER SCES674 MARCH 2007 1FEATURES Controlled Baseline JESD 78, Class II One Assembly/Test Site, One Fabrication ESD Protection Exceeds JESD 22 Site 2000-V Human-Body
OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
1 SN74LV541AT www.ti.com SCES573B JUNE 2004 REVISED JULY 2013 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS Check for Samples: SN74LV541AT 1FEATURES DESCRIPTION Inputs Are TTL-Voltage Compatible The SN74LV541AT
SINGLE-SUPPLY OPERATIONAL AMPLIFIERS MicroAmplifier Series
SSOP 1 Quad (Obsolete) SO Single/Dual MSOP Dual SOT 3 Single OPA37 OPA37 OPA37 SBOS7A OCTOBER 199 REVISED FEBRUARY 7 SINGLE-SUPPLY OPERATIONAL AMPLIFIERS MicroAmplifier Series FEATURES MICRO-SIZE, MINIATURE
Supports Partial-Power-Down Mode 4.5-V to 5.5-V V Operation. (Output Ground Bounce) <0.8 V at V ESD Protection Exceeds JESD 22
FEATURES SN74LV373AT OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCES630B JULY 2005 REVISED AUGUST 2005 Inputs Are TTL-Voltage Compatible I off Supports Partial-Power-Down Mode 4.5-V to 5.5-V V
SN74AUC1G14-EP SINGLE SCHMITT-TRIGGER INVERTER
FEATURES DESCRIPTION/ORDERING INFORMATION SN74AUC1G14-EP SINGLE SCHMITT-TRIGGER INVERTER NC A GND DBV PACKAGE (TOP VIEW) 1 2 3 5 4 SCES673 SEPTEMBER 2006 Controlled Baseline Latch-Up Performance Exceeds
UC1846-EP CURRENT-MODE PWM CONTROLLER
FEATURES Controlled Baseline Soft-Start Capability One Assembly/Test Site, One Fabrication Shutdown Terminal Site 500-kHz Operation Extended Temperature Performance of 55 C to 125 C Enhanced Diminishing
SN54ALS139, SN74ALS139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SN54ALS9, SN74ALS9 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporate Two Enable Inputs to Simplify Cascading and/or
CD54HC283, CD74HC283, CD54HCT283, CD74HCT283
CD54HC283, CD74HC283, CD54HCT283, CD74HCT283 [ /Title (CD74 HC283, CD74 HCT28 3) /Subject (High Speed CMOS Logic 4-Bit Binary Full Adder Data sheet acquired from Harris Semiconductor SCHS176D November
PRECISION MICROPOWER SHUNT VOLTAGE REFERENCE
CATHODE DBZ (SOT-23) PACKAGE (TOP VIEW) ANODE 2 * Pin 3 is attached to substrate and must be connected to ANODE or left open. 3* LM4040-EP SLOS746A SEPTEMBER 20 REVISED SEPTEMBER 20 PRECISION MICROPOWER
description/ordering information
SCAS528D AUGUST 1995 REVISED OCTOBER 2003 2-V to 6-V V CC Operation Inputs Accept Voltages to 6 V Max t pd of 7.5 ns at 5 V SN54AC32...J OR W PACKAGE SN74AC32... D, DB, N, NS, OR PW PACKAGE (TOP VIEW)
Undershoot Protection for OFF Isolation on A Control Inputs Can Be Driven by TTL or. ) Characteristics Latch-Up Performance Exceeds 100 ma Per (r on
FEATURES SN74CBT3305C DUAL FET BUS SWITCH 5-V BUS SWITCH WITH 2-V UNDERSHOOT PROTECTION D, DGK, OR PW PACKAGE (TOP VIEW) SCDS125B SEPTEMBER 2003 REVISED AUGUST 2005 Undershoot Protection for OFF Isolation
CD74FCT245 BiCMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
BiCMOS Technology With Low Quiescent Power Buffered Inputs Noninverted Outputs Input/Output Isolation From V CC Controlled Output Edge Rates 64-mA Output Sink Current Output Voltage Swing Limited to 3.7
description logic symbol
SDAS187A APRIL 1982 REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs description These
ua9637ac DUAL DIFFERENTIAL LINE RECEIVER
ua9637ac DUAL DIFFERENTIAL LINE RECEIVER Meets or Exceeds the Requirements of ANSI Standards EIA/TIA-422-B and EIA/TIA-423-B and ITU Recommendations V.10 and V.11 Operates From Single 5-V Power Supply
description/ordering information
Qualified for Automotive Applications Operates With 3-V to 5.5-V V CC Supply Operates Up To 1 Mbit/s Low Standby Current...1 µa Typical External Capacitors...4 0.1 µf Accepts 5-V Logic Input With 3.3-V
SN54ABT125, SN74ABT125 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
Typical V OLP (Output Ground Bounce)
CD4066B CMOS QUAD BILATERAL SWITCH
15-V Digital or ±7.5-V Peak-to-Peak Switching 125-Ω Typical On-State Resistance for 15-V Operation Switch On-State Resistance Matched to Within 5 Ω Over 15-V Signal-Input Range On-State Resistance Flat
description logic diagram (positive logic) logic symbol
SDAS112B APRIL 1982 REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs description These
description/ordering information
Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V CC ) Typical V OLP (Output Ground Bounce)
SN54LS373, SN54LS374, SN54S373, SN54S374, SN74LS373, SN74LS374, SN74S373, SN74S374 OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS
SN54LS373, SN54LS374, SN54S373, SN54S374, SN74LS373, SN74LS374, SN74S373, SN74S374 OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS SDLS165B OCTOBER 1975 REVISED AUGUST 2002 Choice of Eight
CD54/74HC374, CD54/74HCT374, CD54/74HC574, CD54/74HCT574
CD54/74HC374, CD54/74HCT374, CD54/74HC574, CD54/74HCT574 Data sheet acquired from Harris Semiconductor SCHS183C February 1998 - Revised May 2004 Features High-Speed CMOS Logic Octal D-Type Flip-Flop, 3-State
CD74HC4017-Q1 HIGH-SPEED CMOS LOGIC DECADE COUNTER/DIVIDER WITH 10 DECODED OUTPUTS
Qualified for Automotive Applications Fully Static Operation Buffered Inputs Common Reset Positive Edge Clocking Typical f MAX = 60 MHz at = 5 V, = 5 pf, T A = 25 C Fanout (Over Temperature Range) Standard
SN54ALS240A, SN54AS240A, SN74ALS240A, SN74AS240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
3-State Outputs Drive Bus Lines or Buffer Memory Address Registers pnp Inputs Reduce dc Loading SN54ALS240A, SN54AS240A, SN74ALS240A, SN74AS240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SDAS214E DECEMBER
OUTPUT INPUT ADJUSTMENT INPUT INPUT ADJUSTMENT INPUT
www.ti.com FEATURES LM237, LM337 3-TERMINAL ADJUSTABLE REGULATORS SLVS047I NOVEMBER 1981 REVISED OCTOBER 2006 Output Voltage Range Adjustable From Peak Output Current Constant Over 1.2 V to 37 V Temperature
description/ordering information
3-Terminal Regulators Output Current Up To 100 ma No External Components Required Internal Thermal-Overload Protection Internal Short-Circuit Current Limiting Direct Replacement for Industry-Standard MC79L00
CD54/74HC240, CD54/74HCT240, CD74HC241, CD54/74HCT241, CD54/74HC244, CD54/74HCT244 High-Speed CMOS Logic Octal Buffer/Line Drivers, Three-State
Data sheet acquired from Harris Semiconductor SCHS167E November 1997 - Revised October 2004 CD54/74HC240, CD54/74HCT240, CD74HC241, CD54/74HCT241, CD54/74HC244, CD54/74HCT244 High-Speed CMOS Logic Octal
SN54ABT573, SN74ABT573A OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
Typical V OLP (Output Ground Bounce)
LF411 JFET-INPUT OPERATIONAL AMPLIFIER
LF411 JFET-INPUT OPERATIONAL AMPLIFIER Low Input Bias Current, 50 pa Typ Low Input Noise Current, 0.01 pa/ Hz Typ Low Supply Current, 2 ma Typ High Input impedance, 10 12 Ω Typ Low Total Harmonic Distortion