PAN1760A. Design Guide. Wireless Modules. Bluetooth Low Energy Module. Rev.1.2

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1 PAN76A Bluetooth Low Energy Module Design Guide Rev.. Wireless Modules

2 PAN76A Design Guide By purchase of any of the products described in this document the customer accepts the document's validity and declares their agreement and understanding of its contents and recommendations. Panasonic Industrial Devices Europe GmbH (Panasonic) reserves the right to make changes as required at any time without notification. Please consult the most recently issued Design Guide before initiating or completing a design. Panasonic Industrial Devices Europe GmbH 7. This specification sheet is copyrighted. Reproduction of this document is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Do not disclose it to a third party. All rights reserved. This Design Guide does not lodge the claim to be complete and free of mistakes. Engineering Samples (ES) If Engineering Samples are delivered to the customer, these samples have the status Engineering Samples. This means that the design of this product is not yet concluded. Engineering Samples may be partially or fully functional, and they may differ from the published Product Specification. Engineering Samples are not qualified and they are not to be used for reliability testing or series production. Disclaimer The customer acknowledges that samples may deviate from the Design Guide and may bear defects due to their status of development and the lack of qualification mentioned above. Panasonic rejects any liability or product warranty for Engineering Samples. In particular, Panasonic disclaims liability for damages caused by: The use of the Engineering Sample other than for evaluation purposes, particularly the installation or integration in another product to be sold by the customer, Deviation or lapse in function of the Engineering Sample, Improper use of the Engineering Sample. Panasonic Industrial Devices Europe GmbH disclaims any liability for consequential and incidental damages. In case of any queries regarding the Engineering Samples, please contact your local sales partner or the related product manager. Design Guide Rev.. Page

3 PAN76A Design Guide Table of Contents About This Document.... Purpose and Audience.... Revision History.... Use of Symbols.... Related Documents... 5 Overview Block Diagram Pin Configuration UART Interface... 9 Reference Design.... Schematic.... Placement Recommendations.... Building Blocks.... Configuration Settings... 5 Life Support Policy Appendix Ordering Information Contact Details... 8 Design Guide Rev.. Page

4 PAN76A Design Guide About This Document About This Document. Purpose and Audience This Design Guide applies to the Bluetooth development platform PAN76A USB. The intention is to enable our customers to easily integrate our module PAN76A in their product. This guide describes the hardware and gives useful hints.. Revision History Revision Date Modifications/Remarks...7 st version Added information about GPIO functionality Reference Design for Host- / Stand Alone Mode. Use of Symbols Symbol [chapter number] [chapter title] Description Note Indicates important information for the proper use of the product. Non-observance can lead to errors. Attention Indicates important notes that, if not observed, can put the product s functionality at risk. Tip Indicates useful information designed to facilitate working with the Module. Cross reference Indicates cross references within the document. Example: Description of the symbols used in this document. Use of Symbols. Requirement Indicates a requirement that must be met before the corresponding tasks can be completed. Result Indicates the result of a task or the result of a series of tasks. Design Guide Rev.. Page

5 PAN76A Design Guide About This Document. Related Documents [] PAN76A Software Guide Please refer to the Panasonic website for more information as well as related documents 5.. Product Information. Design Guide Rev.. Page 5

6 PAN76A Design Guide Overview Overview The PAN76A USB is a development platform for the PAN76A Bluetooth low energy module to implement Bluetooth functionality into various electronic devices. This guide describes the hardware. For the software refer to the Software Guide. Please refer to the Panasonic website for related documents 5.. Product Information. Further information on the variants and versions 5. Ordering Information.. Block Diagram Design Guide Rev.. Page 6

7 PAN76A Design Guide Overview. Pin Configuration Pin Assignment Top View 5.6 mm F F F F F5 F6 F7 F8 F9 F F E E E E E5 E6 E7 E8 E9 D D D D D5 D6 D7 D8 D9 C C C C C5 C6 C7 C8 C9 B B B B B5 B6 B7 B8 B mm A A A A A5 A6 A7 A8 A9 A A.6 Pin Functions No Pin Name Pin Type Description A Ground Pin Connect to ground A GPIO Digital I/O A RESET Digital Input Reset, active low A Not connected A5 VCC Power Analog/digital power supply connection A6 VCC Power Analog/digital power supply connection A7 Ground Pin Connect to ground A8 Not connected A9 Ground Pin Connect to ground A Ground Pin Connect to ground A Ground Pin Connect to ground B GPIO9 Digital I/O B GPIO Digital I/O Design Guide Rev.. Page 7

8 PAN76A Design Guide Overview No Pin Name Pin Type Description B Not connected, leave open B Not connected, leave open B5 GPIO7/UART CTS Digital I/O UART CTS B6 GPIO8/UART RTS Digital I/O UART RTS B7 GPIO5 Digital I/O B8 Not connected, leave open B9 Not connected, leave open C Not connected, leave open C Not connected, leave open C GPIO Digital I/O C SWDIO JTAG C5 SWDCLK JTAG C6 GPIO Digital I/O C7 Not connected, leave open C8 Ground Pin Connect to ground C9 Ground Pin Connect to ground D Not connected, leave open D Not connected, leave open D Not connected, leave open D GPIO/WakeUp Digital I/O D5 Not connected, leave open D6 GPIO5/WakeUp Digital I/O D7 Ground Pin Connect to ground D8 Ground Pin Connect to ground D9 ANT RF-Signal Antenna pin (not connected for standard version) E GPIO/SDA Digital I/O IC interface E GPIO/SCL Digital I/O IC interface E Not connected, leave open E Not connected, leave open E5 SLPXOIN Digital Input khz clock input, leave open E6 GPIO6/UARTRXD Digital Input UART RXD Design Guide Rev.. Page 8

9 PAN76A Design Guide Overview No Pin Name Pin Type Description E7 Not connected, leave open E8 Ground Pin Connect to ground E9 Ground Pin Connect to ground F Ground Pin Connect to ground F Not connected, leave open F Not connected, leave open F Not connected, leave open F5 GPIO Digital Input F6 GPIO Digital I/O F7 GPIO5/UARTTXD Digital Output UART TX F8 GPIO Digital Output F9 Ground Pin Connect to ground F Ground Pin Connect to ground F Ground Pin Connect to ground Minimal configuration VCC UART Rx, Tx, no flow control. UART Interface Default baud rate: 5 bps Data format: 8N, LSB first Rx, Tx, no flow control Design Guide Rev.. Page 9

10 PAN76A Design Guide Reference Design Design Guide Rev.. Page Reference Design. Schematic.. Host Mode +V 9 %.5R +5V µ µ7 BLM5BBSN µ7 Green 7 ATSAMUCA-CU MHz 6k8 pf 8pF 8pF 9 % +V µ µ nf nf nf nf nf +V Red 7 +V nf nf nf nf k7 k7 k7 k +V +5V IC TPS769 EN IN OUT 5 R7 R C C L C7 LED R6 IC VBG A XIN A XOUT A PB7 A PB A5 PB A6 TCK/SWCLK A7 VDDIN A8 VDDOUT A9 XIN A VDDCORE_ D UTMI B VDDUTMI B PB B PB8 B5 PB B6 NRST B7 TDO/TRACESWO B8 TDI B9 XOUT B DFSDP C DHSDP C PLL C PB C PB9 C5 PB C6 TMS/SWDIO C7 NRSTB C8 JTAGSEL C9 VDDBU C DFSDM D DHSDM D VDDPLL D VDDCORE_ E7 PB D5 ERASE D6 TST D7 FWUP D8 PA/PGMD D9 PA/PGMD D PA9 E _ F6 PA8 E PB9 E BU E5 VDDIO_ F VDDCORE_ B PA/PGMD E8 PA9/PGMD E9 PA8/PGMD E PB F PB F VDDIO_ F5 PA F VDDIO_ E6 _ E PB6 F7 PA6/PGMM F8 VDDCORE_ F9 PA7/PGMM F PB G PB G PB G PB G VDDCORE_5 G5 _ G6 PB5 G7 PA/PGMNVALID G8 PA5/PGMM G9 PA/PGMM G VDDCORE_6 H PB5 H PA7 H PA/PGMD H PA/PGMD5 H5 PA5/PGMD7 H6 PA8/PGMD H7 PA/PGMRDY H9 PA/PGMNOE H PB6 J PB8 J ADVREF J PA J PB J5 PA6/PGMD8 J6 PA9/PGMD J7 PA/PGMD J8 PA6 J9 PA H8 PA/PGMMD J PB7 K VDDANA K ANA K ADBVREF K PB K5 PA/PGMD6 K6 PA7/PGMD9 K7 PA/PGMD K8 PA/PGMD5 K9 PA5 K X R C C6 C9 R8 C C C C5 C6 C7 C R9 LED R R R R8 R9 R C C C5 C8 R R R R5 TP TP TP TP TP5 TP6 TP7 TP8 R5 R6 R7 DP DM SWDCLK_OB SWDIO_OB RESET_OB RX_OB TX_OB V. PAN76A_ETU Reference Design DS-DG-76A-ETU For programming SAMUC J-Link OB Date: nicht gespeichert! Sheet: / REV: TITLE: Document Number: PAN76A_USB_V._HostMode PAN76A PAN76A USB5B USB_A +5V nf nf BLM5BBSN µ7 nf nf nf nf nf nf MHz 8pF 8pF k % µ nf nf k k k nf IPCZ6 k k k k Green.5R µ µ7 BLM5BBSN µ7 FTRQ nf nf +5V k k k BU-P k +V nf nf +V n.c. nf MOD_PORTS RF D9 GPIO F6 GPIO A GPIO B GPIO7 B5 GPIO8 B6 GPIO9 B GPIO C GPIO5 B7 GPIO/SCL E GPIO/SDA E GPIO5/UARTTX F7 GPIO6/UARTRX E6 GPIO F8 GPIO/WAKEUP D GPIO5/WAKEUP D6 SWDIO C SWDCLK C5 RESET A GPIO F5 GPIO C6 SLPXOIN E5 MOD_SUPLY VCC A6 VCC A5 D5 F F F9 F E9 E8 D8 D7 C9 C8 A A A9 A7 A A8 B B B8 B9 C A C C7 D D D E E E7 F F F USBDM_DN USBDP_DN USBDM_DN USBDP_DN VDDA 5 VDDA VDDA 5 VDDA VDDA 9 VDDA 6 CRFILT RESET_N 6 VBUS_DET 7 USBDM_UP USBDP_UP RBIAS 5 OCS_N OCS_N 7 TEST XTALOUT XTALIN/CLKIN PLLFILT PRTPWR/BC_EN PRTPWR/BC_EN 6 CFG_SEL CFG_SEL 5 SUSP_IND/NON_REM 8 NON_REM EP_ EP IC5 X C9 C L C C8 C C C C5 C6 X C C R6 C5 C C R R5 R7 C7 IC I/O I/O I/O I/O 6 VP 5 R R R6 R7 LED R55 IC TPS769 EN IN OUT 5 R C6 C9 L C IC6 VCC 9 VOUT 6 USBDP USBDM 5 OSCO 8 OSCI 7 TXD RXD RTS# CTS# 8 DTR# DSR# 6 DCD# 7 RI# CBUS CBUS CBUS CBUS CBUS 9 VCCIO RESET# 8 7 TEST 6 C9 C7 R68 R69 R6 R6 R5 S R C C8 JP JP5 JP6 JP7 JP8 JP9 JP JP JP JP JP JP5 JP6 JP7 JP8 JP9 JP JP JP JP R R R8 R9 R R R R R R5 R6 R7 R8 R9 R R R8 R9 R5 R5 R5 R5 R5 R56 R57 R58 R59 R6 R6 R6 R65 R66 R67 R7 R7 R7 JP R JP JP JP C8 JP5 USB_V DP DM DP DM M_RESET M_V M_V M_V M_V M_V M_V GPIO5 GPIO5 GPIO5 GPIO6 GPIO6 GPIO6 GPIO7 GPIO7 GPIO7 GPIO8 GPIO8 GPIO8 GPIO GPIO GPIO GPIO GPIO GPIO GPIO5 GPIO5 GPIO GPIO GPIO GPIO GPIO9 GPIO9 GPIO GPIO GPIO GPIO GPIO GPIO GPIO5 GPIO5 GPIO GPIO GPIO GPIO RESET_OB SWDIO_OB SWDCLK_OB TX_OB RX_OB " Host Mode " Date: nicht gespeichert! Sheet: / REV: TITLE: Document Number: PAN76A_USB_V._HostMode X

11 PAN76A Design Guide Reference Design Design Guide Rev.. Page.. Stand Alone Mode +V 9 %.5R +5V µ µ7 BLM5BBSN µ7 Green 7 ATSAMUCA-CU MHz 6k8 pf 8pF 8pF 9 % +V µ µ nf nf nf nf nf +V Red 7 +V nf nf nf nf k7 k7 k7 k +V +5V IC TPS769 EN IN OUT 5 R7 R C C L C7 LED R6 IC VBG A XIN A XOUT A PB7 A PB A5 PB A6 TCK/SWCLK A7 VDDIN A8 VDDOUT A9 XIN A VDDCORE_ D UTMI B VDDUTMI B PB B PB8 B5 PB B6 NRST B7 TDO/TRACESWO B8 TDI B9 XOUT B DFSDP C DHSDP C PLL C PB C PB9 C5 PB C6 TMS/SWDIO C7 NRSTB C8 JTAGSEL C9 VDDBU C DFSDM D DHSDM D VDDPLL D VDDCORE_ E7 PB D5 ERASE D6 TST D7 FWUP D8 PA/PGMD D9 PA/PGMD D PA9 E _ F6 PA8 E PB9 E BU E5 VDDIO_ F VDDCORE_ B PA/PGMD E8 PA9/PGMD E9 PA8/PGMD E PB F PB F VDDIO_ F5 PA F VDDIO_ E6 _ E PB6 F7 PA6/PGMM F8 VDDCORE_ F9 PA7/PGMM F PB G PB G PB G PB G VDDCORE_5 G5 _ G6 PB5 G7 PA/PGMNVALID G8 PA5/PGMM G9 PA/PGMM G VDDCORE_6 H PB5 H PA7 H PA/PGMD H PA/PGMD5 H5 PA5/PGMD7 H6 PA8/PGMD H7 PA/PGMRDY H9 PA/PGMNOE H PB6 J PB8 J ADVREF J PA J PB J5 PA6/PGMD8 J6 PA9/PGMD J7 PA/PGMD J8 PA6 J9 PA H8 PA/PGMMD J PB7 K VDDANA K ANA K ADBVREF K PB K5 PA/PGMD6 K6 PA7/PGMD9 K7 PA/PGMD K8 PA/PGMD5 K9 PA5 K X R C C6 C9 R8 C C C C5 C6 C7 C R9 LED R R R R8 R9 R C C C5 C8 R R R R5 TP TP TP TP TP5 TP6 TP7 TP8 R5 R6 R7 DP DM SWDCLK_OB SWDIO_OB RESET_OB RX_OB TX_OB V. PAN76A_ETU Reference Design DS-DG-76A-ETU For programming SAMUC J-Link OB Date: nicht gespeichert! Sheet: / REV: TITLE: Document Number: PAN76A_USB_V._StandaloneMode PAN76A PAN76A USB5B USB_A +5V nf nf BLM5BBSN µ7 nf nf nf nf nf nf MHz 8pF 8pF k % µ nf nf k k k nf IPCZ6 k k k k Green.5R µ µ7 BLM5BBSN µ7 FTRQ nf nf +5V k k k BU-P k +V nf nf +V n.c. nf MOD_PORTS RF D9 GPIO F6 GPIO A GPIO B GPIO7 B5 GPIO8 B6 GPIO9 B GPIO C GPIO5 B7 GPIO/SCL E GPIO/SDA E GPIO5/UARTTX F7 GPIO6/UARTRX E6 GPIO F8 GPIO/WAKEUP D GPIO5/WAKEUP D6 SWDIO C SWDCLK C5 RESET A GPIO F5 GPIO C6 SLPXOIN E5 MOD_SUPLY VCC A6 VCC A5 D5 F F F9 F E9 E8 D8 D7 C9 C8 A A A9 A7 A A8 B B B8 B9 C A C C7 D D D E E E7 F F F USBDM_DN USBDP_DN USBDM_DN USBDP_DN VDDA 5 VDDA VDDA 5 VDDA VDDA 9 VDDA 6 CRFILT RESET_N 6 VBUS_DET 7 USBDM_UP USBDP_UP RBIAS 5 OCS_N OCS_N 7 TEST XTALOUT XTALIN/CLKIN PLLFILT PRTPWR/BC_EN PRTPWR/BC_EN 6 CFG_SEL CFG_SEL 5 SUSP_IND/NON_REM 8 NON_REM EP_ EP IC5 X C9 C L C C8 C C C C5 C6 X C C R6 C5 C C R R5 R7 C7 IC I/O I/O I/O I/O 6 VP 5 R R R6 R7 LED R55 IC TPS769 EN IN OUT 5 R C6 C9 L C IC6 VCC 9 VOUT 6 USBDP USBDM 5 OSCO 8 OSCI 7 TXD RXD RTS# CTS# 8 DTR# DSR# 6 DCD# 7 RI# CBUS CBUS CBUS CBUS CBUS 9 VCCIO RESET# 8 7 TEST 6 C9 C7 R68 R69 R6 R6 R5 S R C C8 JP JP5 JP6 JP7 JP8 JP9 JP JP JP JP JP JP5 JP6 JP7 JP8 JP9 JP JP JP JP R R R8 R9 R R R R R R5 R6 R7 R8 R9 R R R8 R9 R5 R5 R5 R5 R5 R56 R57 R58 R59 R6 R6 R6 R65 R66 R67 R7 R7 R7 JP R JP JP JP C8 JP5 USB_V DP DM DP DM M_RESET M_V M_V M_V M_V M_V M_V GPIO5 GPIO5 GPIO5 GPIO6 GPIO6 GPIO6 GPIO7 GPIO7 GPIO7 GPIO8 GPIO8 GPIO8 GPIO GPIO GPIO GPIO GPIO GPIO GPIO5 GPIO5 GPIO GPIO GPIO GPIO GPIO9 GPIO9 GPIO GPIO GPIO GPIO GPIO GPIO GPIO5 GPIO5 GPIO GPIO GPIO GPIO RESET_OB SWDIO_OB SWDCLK_OB TX_OB RX_OB " Standalone Mode " Date: nicht gespeichert! Sheet: / REV: TITLE: Document Number: PAN76A_USB_V._StandaloneMode X

12 C C5 C C R6 C5 C8 R8 R9 R R R R R R8 R9 R5 R5 R5 R6 C R6 C9 R55 C8 C7 C C IC R7 R6 L R5 R R R I C C6 C9 C7 C C5 C C R R S R6 L C7 C C R IC R R JP JP R R5 R5 R5 R65 R66 R67 PAN76A Design Guide Reference Design. Placement Recommendations C C8 R8 R R LED JP5 JP6 JP7 JP8 JP9 JP R9 R5 R R C C C6 IC R7 R6 R6 R6 C R7 R7 R7 JP R9 C R8 C5 LED L C R C8 C6 C9 C C9 X MOD JP X C X X JP JP JP IC6 C LED R7 R R5 R6 R7 R8 R9 R R R56 R57 R58 R59 R69 R68 IC5 R R7 R5 C7 C6 R R6 JP JP5 JP6 JP7 JP8 JP9 JP JP JP JP JP JP5 The module shall be placed as close as possible to the edge of the application. It is important to have the keep out area below the antenna. Keep out area To download the design files go to the download area on the product website. Energy-Module.html Design Guide Rev.. Page

13 PAN76A Design Guide Reference Design PAN76A WITH ANTENNA PLACEMENT If possible place the module in the center of mother PCB. Min. 5mm Min. 5mm Min. mm. Restricted Area No copper any layer Top View 5.6 Place the module at the edge of mother PCB. Use a Ground plane in the area surrounding the module wherever possible. Dimensions are in mm. Design Guide Rev.. Page

14 PAN76A Design Guide Reference Design. Building Blocks JTAG SWD for programming and debugging USB HUB IO breakout area: IOs are switchable to or VDD to control e.g. host mode or standalone IOs can be connected to external e.g. sensor boards FTDI USB to UART conversion for host mode Design Guide Rev.. Page

15 PAN76A Design Guide Reference Design. Configuration Settings There are two different modes available. After each different configuration the reset button needs to be pressed. The V Jumper can be removed for current measurements. Design Guide Rev.. Page 5

16 PAN76A Design Guide Life Support Policy Life Support Policy This Panasonic Industrial Devices Europe GmbH product is not designed for use in life support appliances, devices, or systems where malfunction can reasonably be expected to result in a significant personal injury to the user, or as a critical component in any life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Panasonic customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Panasonic Industrial Devices Europe GmbH for any damages resulting. Design Guide Rev.. Page 6

17 PAN76A Design Guide 5 Appendix 5 Appendix 5. Ordering Information Variants and Versions Order Number Brand Name Description MOQ ENW8987AZKF PAN76A-ETU USB Evaluation Board ENW8987AYKF PAN76A-EMK USB Evaluation Boards Design Guide Rev.. Page 7

18 PAN76A Design Guide 5 Appendix 5. Contact Details 5.. Contact Us Please contact your local Panasonic Sales office for details on additional product options and services: For Panasonic Sales assistance in the EU, visit wireless@eu.panasonic.com For Panasonic Sales assistance in North America, visit the Panasonic Sales & Support Tool to find assistance near you at Please visit the Panasonic Wireless Technical Forum to submit a question at Product Information Please refer to the Panasonic Wireless Connectivity website for further information on our products and related documents: For complete Panasonic product details in the EU, visit For complete Panasonic product details in North America, visit Design Guide Rev.. Page 8

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