Typical R DS (on) (mω), Gate-to-Source Voltage (V) l RoHS Compliant l Lead-Free (Qualified up to 260 C Reflow) l pplication Specific MOSFETs l Ideal for High Performance Isolated Converter Primary Switch Socket l Optimized for Synchronous Rectification l Low Conduction Losses l High Cdv/dt Immunity l Dual Sided Cooling Compatible l Compatible with existing Surface Mount Techniques PD - 972 IRF6643TRPbF DirectFET Power MOSFET Typical values (unless otherwise specified) V DSS R DS(on) 50V max ±20V max 29mΩ@ V Q g tot Q gd V gs(th) 39nC nc 4.0V pplicable DirectFET Outline and Substrate Outline (see p.7,8 for details) SH SJ SP MZ MN Description The IRF6643PbF combines the latest HEXFET Power MOSFET Silicon technology with the advanced DirectFET TM packaging to achieve the lowest on-state resistance in a package that has the footprint of an Micro8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note N-35 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6643PbF is optimized for primary side sockets in forward and push-pull isolated DC-DC topologies, for 48V and 36V-60V input voltage range systems. The reduced total losses in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability improvements, and makes this device ideal for high performance isolated DC- DC converters. bsolute Maximum Ratings 70 60 50 40 30 20 I D = 7.6 T J = 25 C T J = 25 C 4 6 8 2 4 6, Gate-to-Source Voltage (V) 0 0 20 30 40 Q G Total Gate Charge (nc) Fig. Typical On-Resistance vs. Gate Voltage Fig 2. Typical Total Gate Charge vs. Gate-to-Source Voltage Notes: Click on this section to link to the appropriate technical paper. T C measured with thermocouple mounted to top (Drain) of part. Click on this section to link to the DirectFET Website. Repetitive rating; pulse width limited by max. junction temperature. ƒ Surface mounted on in. square Cu board, steady state. Starting T J = 25 C, L = 0.43mH, R G = 25Ω, I S = 7.6. www.irf.com 2 8 6 4 2 MZ I D = 7.6 V DS = 20V V DS = 75V V DS = 30V DirectFET ISOMETRIC Parameter Max. Units V DS Drain-to-Source Voltage 50 V Gate-to-Source Voltage ±20 I D @ T = 25 C Continuous Drain Current, @ V e 6.2 I D @ T = 70 C Continuous Drain Current, @ V e 5.0 I D @ T C = 25 C Continuous Drain Current, @ V f 35 I DM Pulsed Drain Current g 76 E S Single Pulse valanche Energy h 50 mj I R valanche Currentg 7.6 /28/06
IRF6643TRPbF Electrical Characteristic @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions BV DSS Drain-to-Source Breakdown Voltage 50 V = 0V, I D = 250µ ΒV DSS / T J Breakdown Voltage Temp. Coefficient 0.8 V/ C Reference to 25 C, I D = m R DS(on) Static Drain-to-Source On-Resistance 29 34.5 mω = V, I D = 7.6 i (th) Gate Threshold Voltage 3.0 4.0 4.9 V V DS =, I D = 50µ (th) / T J Gate Threshold Voltage Coefficient - mv/ C I DSS Drain-to-Source Leakage Current 20 µ V DS = 50V, = 0V 250 V DS = 20V, = 0V, T J = 25 C I GSS Gate-to-Source Forward Leakage n = 20V Gate-to-Source Reverse Leakage - = -20V gfs Forward Transconductance 6 S V DS = V, I D = 7.6 Q g Total Gate Charge 39 55 Q gs Pre-Vth Gate-to-Source Charge 9.6 V DS = 75V Q gs2 Post-Vth Gate-to-Source Charge 2.2 nc = V Q gd Gate-to-Drain Charge 7 I D = 7.6 Q godr Gate Charge Overdrive 6 See Fig. 5 Q sw Switch Charge (Q gs2 Q gd ) 3 Q oss Output Charge 4 nc V DS = 6V, = 0V R G Gate Resistance 0.8 Ω t d(on) Turn-On Delay Time 9.2 V DD = 75V, = Vi t r Rise Time 5.0 I D = 7.6 t d(off) Turn-Off Delay Time 3 ns Clamped Inductive Load t f Fall Time 4.4 C iss Input Capacitance 2340 = 0V C oss Output Capacitance 300 pf V DS = 25V C rss Reverse Transfer Capacitance 6 ƒ =.0MHz C oss Output Capacitance 950 = 0V, V DS =.0V, f=.0mhz C oss Output Capacitance 40 = 0V, V DS = 80V, f=.0mhz Diode Characteristics Parameter Min. Typ. Max. Units Conditions I S Continuous Source Current 58 (Body Diode) T J = 25 C I SM Pulsed Source Current 76 (Body Diode)g V SD Diode Forward Voltage.3 V t rr Reverse Recovery Time 67 ns Q rr Reverse Recovery Charge 90 280 nc MOSFET symbol showing the integral reverse p-n junction diode. D G S T J = 25 C, I S = 7.6, = 0V i T J = 25 C, I F = 7.6, V DD = 50V di/dt = /µs c Notes: Repetitive rating; pulse width limited by max. junction temperature. Pulse width 400µs; duty cycle 2%. 2 www.irf.com
bsolute Maximum Ratings IRF6643TRPbF Parameter Max. Units P D @T = 25 C Power Dissipation e 2.8 W P D @T = 70 C Power Dissipation e.8 P D @T C = 25 C Power Dissipation f 89 T P Peak Soldering Temperature 270 C T J Operating Junction and -40 to 50 T STG Storage Temperature Range Thermal Resistance Parameter Typ. Max. Units R θj Junction-to-mbient el 45 R θj Junction-to-mbient jl 2.5 R θj Junction-to-mbient kl 20 C/W R θjc Junction-to-Case fl.4 R θj-pcb Junction-to-PCB Mounted.0 D = 0.50 Thermal Response ( Z thj ) 0. 0.20 0. 0.05 0.02 0.0 R R 2 R 3 R R 2 R 3 τ J τ J τ τ τ 2 τ 2 τ 3 τ 3 Ci= τi/ri Ci i/ri SINGLE PULSE Notes: ( THERML RESPONSE ). Duty Factor D = t/t2 2. Peak Tj = Pdm x Zthja Ta 0.0 E-006 E-005 0.000 0.00 0.0 0. t, Rectangular Pulse Duration (sec) R 4 Ri ( C/W) τi (sec) R 4 0.6784 0.00086 Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-mbient τ 4 τ 4 τ C τ 7.299 0.57756 7.566 8.94 9.470 6 Notes: ƒ Surface mounted on in. square Cu board, steady state. T C measured with thermocouple incontact with top (Drain) of part. ˆ Used double sided cooling, mounting pad with large heatsink. Mounted on minimum footprint full size board with metalized back and with small clip heatsink. Š R θ is measured at T J of approximately 90 C. ƒ Surface mounted on in. square Cu board (still air). Mounted on minimum footprint full size board with metalized back and with small clip heatsink. (still air) www.irf.com 3
C, Capacitance(pF) I D, Drain-to-Source Current (Α) Typical R DS(on) (Normalized) I D, Drain-to-Source Current () I D, Drain-to-Source Current () IRF6643TRPbF 7.0V VGS TOP 5V V 8.0V BOTTOM 7.0V 7.0V VGS TOP 5V V 8.0V BOTTOM 7.0V 60µs PULSE WIDTH Tj = 25 C 0. V DS, Drain-to-Source Voltage (V) Fig 4. Typical Output Characteristics 60µs PULSE WIDTH Tj = 50 C 0. V DS, Drain-to-Source Voltage (V) Fig 5. Typical Output Characteristics T J = 50 C T J = 25 C T J = -40 C 2.5 2.0 I D = 7.6 = V.5 V DS = V 60µs PULSE WIDTH 0. 4.0 5.0 6.0 7.0 8.0, Gate-to-Source Voltage (V) Fig 6. Typical Transfer Characteristics.0 0.5-60 -40-20 0 20 40 60 80 20 40 60 T J, Junction Temperature ( C) Fig 7. Normalized On-Resistance vs. Temperature 000 = 0V, f = MHZ C iss = C gs C gd, C ds SHORTED 00 C rss = C gd C oss = C ds C gd C iss 0 C oss Typical R DS(on) (mω) 45 T J = 25 C 40 = 7.0V = 8.0V = V = 5V 35 C rss 30 V DS, Drain-to-Source Voltage (V) 25 0 20 30 40 50 I D, Drain Current () Fig 8. Typical Capacitance vs.drain-to-source Voltage Fig 9. Typical On-Resistance vs. Drain Current 4 www.irf.com
E S, Single Pulse valanche Energy (mj) I D, Drain Current () (th) Gate threshold Voltage (V) I D, Drain-to-Source Current () IRF6643TRPbF I SD, Reverse Drain Current () T J = 50 C T J = 25 C T J = -40 C = 0V 0. 0.0 0.4 0.8.2.6 2.0 V SD, Source-to-Drain Voltage (V) Fig. Typical Source-Drain Diode Forward Voltage 0 T = 25 C OPERTION IN THIS RE LIMITED BY R DS (on) µsec msec Tj = 50 C msec Single Pulse 0. 0..0.0.0 0.0 V DS, Drain-toSource Voltage (V) Fig. Maximum Safe Operating rea 7.0 5.0 6.0 4.5 5.0 4.0 4.0 3.0 2.0 3.5 3.0 I D = 250µ I D = 50µ.0 2.5 0.0 25 50 75 25 50 T J, mbient Temperature ( C) Fig 2. Maximum Drain Current vs. mbient Temperature 2.0-75 -50-25 0 25 50 75 25 50 T J, Temperature ( C ) Fig 3. Typical Threshold Voltage vs. Junction Temperature 200 60 I D TOP.5 3.0 BOTTOM 5 20 80 40 0 25 50 75 25 50 Starting T J, Junction Temperature ( C) Fig 4. Maximum valanche Energy vs. Drain Current www.irf.com 5
IRF6643TRPbF Id Vds Vgs 0 20K K DUT L VCC Vgs(th) Qgodr Qgd Qgs2 Qgs Fig 5a. Gate Charge Test Circuit Fig 5b. Gate Charge Waveform V (BR)DSS 5V tp V DS L DRIVER VR GS G 20V tp D.U.T I S 0.0Ω - V DD I S Fig 6a. Unclamped Inductive Test Circuit Fig 6b. Unclamped Inductive Waveforms L D V DS V DD - 90% D.U.T % Second Pulse Width < µs Duty Factor < 0.% V DS t d(off) t f t d(on) t r Fig 7a. Switching Time Test Circuit Fig 7b. Switching Time Waveforms 6 www.irf.com
IRF6643TRPbF - R G D.U.T * ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD ** - Reverse Recovery Current Re-pplied Voltage Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt Inductor Curent Body Diode Forward Drop D = P.W. Period *** =V V DD Ripple 5% I SD * Use P-Channel Driver for P-Channel Measurements ** Reverse Polarity for P-Channel *** = 5V for Logic Level Devices Fig 8. Diode Reverse Recovery Test Circuit for HEXFET Power MOSFETs DirectFET Substrate and PCB Layout, MZ Outline (Medium Size Can, Z-Designation). Please see DirectFET application note N-35 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs. www.irf.com 7
IRF6643TRPbF DirectFET Outline Dimension, MZ Outline (Medium Size Can, Z-Designation). Please see DirectFET application note N-35 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs. CODE B C D E F G H J K L M R P DIMENSIONS METRIC IMPERIL MIN 6.25 4.80 3.85 0.35 0.68 0.68 0.93 0.63 0.28.3 2.53 0.66 0.020 0.08 MX 6.35 5.05 3.95 0.45 0.72 0.72 0.97 0.67 0.32.26 2.66 0.676 0.080 0.7 MX 0.246 0.89 0.52 0.04 0.027 0.027 0.037 0.025 0.0 0.044 0. 0.0235 0.0008 0.003 MX 0.250 0.20 0.56 0.08 0.028 0.028 0.038 0.026 0.03 0.050 0.5 0.0274 0.003 0.007 DirectFET Part Marking 8 www.irf.com
IRF6643TRPbF DirectFET Tape & Reel Dimension (Showing component orientation). LODED TPE FEED DIRECTION NOTE: CONTROLLING DIMENSIONS IN MM CODE B C D E F G H MIN 7.90 3.90.90 5.45 5. 6.50.50.50 DIMENSIONS METRIC MX 8. 4. 2.30 5.55 5.30 6.70 N.C.60 MIN 0.3 0.54 0.469 0.25 0.20 0.256 0.059 0.059 IMPERIL MX 0.39 0.6 0.484 0.29 0.209 0.264 N.C 0.063 NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6643TRPBF). For 0 parts on 7" reel, order IRF6643TRPBF REEL DIMENSIONS STNDRD OPTION (QTY 4800) TR OPTION (QTY 0) METRIC IMPERIL METRIC IMPERIL CODE MIN MX MIN MX MIN MX MIN MX 330.0 N.C 2.992 N.C 77.77 N.C 6.9 N.C B 20.2 N.C 0.795 N.C 9.06 N.C 0.75 N.C C 2.8 3.2 0.504 0.520 3.5 2.8 0.53 0.50 D.5 N.C 0.059 N.C.5 N.C 0.059 N.C E.0 N.C 3.937 N.C 58.72 N.C 2.3 N.C F N.C 8.4 N.C 0.724 N.C 3.50 N.C 0.53 G 2.4 4.4 0.488 0.567.9 2.0 0.47 N.C H.9 5.4 0.469 0.606.9 2.0 0.47 N.C Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR s Web site. IR WORLD HEDQURTERS: 233 Kansas St., El Segundo, California 90245, US Tel: (3) 252-75 TC Fax: (3) 252-7903 Visit us at www.irf.com for sales contact information./06 www.irf.com 9
Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/