The MC452B consists of a chain of 24 flip flops with an input circuit that allows three modes of operation. The input will function as a crystal oscillator, an RC oscillator, or as an input buffer for an external oscillator. Each flip flop divides the frequency of the previous flip flop by two, consequently this part will count up to 2 24 = 6,777,26. The count advances on the negative going edge of the clock. The outputs of the last seven stages are available for added flexibility. All Stages are Resettable Reset Disables the RC Oscillator for Low Standby Power Drain RC and Crystal Oscillator Outputs Are Capable of Driving External Loads Test Mode to Reduce Test Time V DD and V SS Pins Brought Out on Crystal Oscillator Inverter to Allow the Connection of External Resistors for Low Power Operation Supply Voltage Range = 3. Vdc to 8 Vdc Capable of Driving Two Low power TTL Loads or One Low power Schottky TTL Load over the Rated Temperature Range. PDIP 6 P SUFFIX CASE 648 SOIC 6 D SUFFIX CASE 75B SOEIAJ 6 F SUFFIX CASE 966 MARKING DIAGRAMS 6 6 6 MC452BCP AWLYYWW 452B AWLYWW MC452B ALYW MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) Symbol Parameter Value Unit V DD DC Supply Voltage Range.5 to +8. V V in, V out Input or Output Voltage Range (DC or Transient).5 to V DD +.5 V A WL, L YY, Y WW, W = Assembly Location = Wafer Lot = Year = Work Week I in, I out P D Input or Output Current (DC or Transient) per Pin Power Dissipation, per Package (Note 3.) ± ma 5 mw T A Ambient Temperature Range 55 to +25 C T stg Storage Temperature Range 65 to + C T L Lead Temperature (8 Second Soldering) 26 C 2. Maximum Ratings are those values beyond which damage to the device may occur. 3. Temperature Derating: Plastic P and D/DW Packages: 7. mw/c From 65C To 25C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, V in and V out should be constrained to the range V SS (V in or V out ) V DD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V SS or V DD ). Unused outputs must be left open. ORDERING INFORMATION Device Package Shipping MC452BCP PDIP 6 2/Box MC452BD SOIC 6 48/Rail MC452BDR2 SOIC 6 25/Tape & Reel MC452BF SOEIAJ 6 See Note. MC452BFEL SOEIAJ 6 See Note. MC452BFR2 SOEIAJ 6 See Note.. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative. Semiconductor Components Industries, LLC, 2 August, 2 Rev. 4 Publication Order Number: MC452B/D
PIN ASSIGNMENT BLOCK DIAGRAM Output Count Capacity Q8 2 8 = 262,44 Q9 2 9 = 524,288 Q2 2 2 =,48,576 Q2 2 2 = 2,97,2 Q22 2 22 = 4,94,34 Q23 2 23 = 8,388,68 Q24 2 24 = 6,777,26 2
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELECTRICAL CHARACTERISTICS (Voltages Referenced to V SS ) Characteristic Output Voltage V in = V DD or Level Symbol V OL V Level V in = or V DD OH Input Voltage Level (V O = 4.5 or.5 Vdc) (V O = 9. or. Vdc) (V O = 3.5 or.5 Vdc) (V O =.5 or 4.5 Vdc) (V O =. or 9. Vdc) (V O =.5 or 3.5 Vdc) Level Output Drive Current (V OH = 2.5 Vdc) Source (V OH = 4.6 Vdc) Pins 4 & 7 (V OH = 9.5 Vdc) (V OH = 3.5 Vdc) (V OH = 2.5 Vdc) Source (V OH = 4.6 Vdc) Pins,, (V OH = 9.5 Vdc), 2, 3, 4 (V OH = 3.5 Vdc) and (V OL =.4 Vdc) Sink (V OL =.5 Vdc) (V OL =.5 Vdc) V IL V IH I OH 55C 25C 25C V DD Vdc Min Max Min Typ (4.) Max Min Max Unit I OL 4.95 9.95 4.95 3.5 7..2.25.62.8 3..64.6 4.2.64.6 4.2.5.5.5.5 3. 4. 4.95 9.95 4.95 3.5 7...2.5.5 2.4.5.3 3.4 2.25 4.5 6.75 2.75 5.5 8.25.7.36.9 3.5 4.2.88 2.25 8.8.5.5.5.5 3. 4. 4.95 9.95 4.95 3.5 7..7.4.35..7.36.9 2.4 Input Current I in ±. ±. ±. ±. µadc Input Capacitance (V in = ).5.3 3.4.88 2.25 8.8.5.5.5 C in 7.5 pf.36.9 2.4.5 3. 4. Vdc Vdc Vdc Vdc madc madc madc Quiescent Current (Per Package) Total Supply Current (5.) (6.) (Dynamic plus Quiescent, Per Package) (C L = 5 pf on all outputs, all buffers switching) I DD I T 2.5.. 2 I T = (.42 µa/khz) f + I DD I T = (.85 µa/khz) f + I DD I T = (.4 µa/khz) f + I DD 4. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. 5. The formulas given are for the typical characteristics only at 25C. 6. To calculate total supply current at loads other than 5 pf: I T (C L ) = I T (5 pf) + (C L 5) Vfk where: I T is in µa (per package), C L in pf, V = (V DD V SS ) in volts, f in khz is input frequency, and k =.3. 3 6 µadc µadc 3
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ SWITCHING CHARACTERISTICS (7.) (C L = 5 pf, T A = 25C) Characteristic Output Rise and Fall Time (Counter Outputs) t TLH, t THL = (.5 ns/pf) C L + 25 ns t TLH, t THL = (.75 ns/pf) C L + 2.5 ns t TLH, t THL = (.55 ns/pf) C L + 2.5 ns Propagation Delay Time Clock to Q8 t PHL, t PLH = (.7 ns/pf) C L + 44 ns t PHL, t PLH = (.66 ns/pf) C L + 667 ns t PHL, t PLH = (.5 ns/pf) C L + 275 ns Symbol t TLH, t THL t PHL, t PLH V DD Vdc Min Typ (8.) Max Unit 5 4 4.5.7.3 2 8 9. 3.5 2.7 ns µs Clock to Q24 t PHL, t PLH = (.7 ns/pf) C L + 59 ns t PHL, t PLH = (.66 ns/pf) C L + 267 ns t PHL, t PLH = (.5 ns/pf) C L + 675 ns Propagation Delay Time Reset to Q n t PHL = (.7 ns/pf) C L + 2 ns t PHL = (.66 ns/pf) C L + 467 ns t PHL = (.5 ns/pf) C L + 35 ns t PHL Clock Pulse Width t WH(cl) Clock Pulse Frequency f cl Clock Rise and Fall Time t TLH, t THL Reset Pulse Width t WH(R) Reset Removal Time t rem 385 2 4 6 45 3 4 6. 2.2.7 3 5 375 4 55 4 3.5 9. 2 7 3 225 2 6 7. The formulas given are for the typical characteristics only at 25C. 8. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. 2 4.5 3.5 26 75 2. 6.5 4. ns ns MHz µs ns ns µ µ Figure. Power Dissipation Test Circuit and Waveform 4
Figure 2. Switching Time Test Circuit and Waveforms * Optional for low power operation, kω R 7 kω. Figure 3. Crystal Oscillator Circuit Characteristic 5 khz Circuit Crystal Characteristics Resonant Frequency Equivalent Resistance, R S 5. External Resistor/Capacitor Values R o C T C S Frequency Stability Frequency Change as a Function of V DD (T A = 25C) V DD Change from V to V V DD Change from V to V Frequency Change as a Function of Temperature (V DD = V) T A Change from 55C to + 25C MC452 only Complete Oscillator* T A Change from +25C to+25c MC452 only Complete Oscillator* 47 82 2 + 6. + 2. 4. + 2. 6 5 khz Circuit 5 6.2 75 82 2 + 2. + 2. 2. + 2 2. 56 Unit khz kω kω pf pf ppm ppm ppm ppm ppm ppm *Complete oscillator includes crystal, capacitors, and resistors. ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Figure 4. Typical Data for Crystal Oscillator Circuit 5
Figure 5. RC Oscillator Stability Ω Ω Ω µ Figure 6. RC Oscillator Frequency as a Function of R TC and C Figure 7. RC Oscillator Circuit Figure 8. Functional Test Circuit 6
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ FUNCTIONAL TEST SEQUENCE A test function (see Figure 8) has been included for the reduction of test time required to exercise all 24 counter stages. This test function divides the counter into three 8 stage sections, and 255 counts are loaded in each of the 8 stage sections in parallel. All flip flops are now at a logic. The counter is now returned to the normal 24 stages in series configuration. One more pulse use is entered e ed into Input 2 (In 2) which will cause the counter to ripple from an all state to an all state. Inputs Outputs Comments Reset In 2 Out 2 V SS V DD Q8 thru Q24 Counter is in three 8 stage sections in parallel mode Counter is reset. In 2 and V DD Gnd Out 2 are connected together First to transition on In 2, Out 2 node. Gnd V DD 255 to transitions are clocked into this In 2, Out 2 node. The 255th to transition. Counter converted back to 24 stages in series mode. Out 2 converts back to an output. Counter ripples from an all state to an all stage. 7
LOGIC DIAGRAM 8
PACKAGE DIMENSIONS H A G B F C S K D 6 PL PDIP 6 P SUFFIX PLASTIC DIP PACKAGE CASE 648 8 ISSUE R T J L M 9
PACKAGE DIMENSIONS T G A D 6 PL K B C SOIC 6 D SUFFIX PLASTIC SOIC PACKAGE CASE 75B 5 ISSUE J P 8 PL M R X 45 J F
PACKAGE DIMENSIONS e Z D b E A H E A SOEIAJ 6 F SUFFIX PLASTIC EIAJ SOIC PACKAGE CASE 966 ISSUE O VIEW P M L E Q L DETAIL P c
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