MOS Varactors With n- and p-type Gates and Their Influence on an LC-VCO in Digital CMOS

Transcription

1 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 7, JULY MOS Varactors With n- and p-type Gates and Their Influence on an LC-VCO in Digital CMOS Judith Maget, Marc Tiebout, Member, IEEE, and Rainer Kraus Abstract The influence of the gate doping type of the MOS varactor on frequency tuning, phase noise, and frequency sensitivity to supply-voltage variations of a fully integrated inductance-capacitance voltage-controlled oscillator (LC-VCO) is presented. Three varactors in multifinger layout with shallow trench isolation (STI) are compared. The polysilicon gate is either entirely n- or p-doped or the fingers have alternating n and p doping. Differences in capacitance and quality factor are shown. Two identical VCOs with the varactors having n gates or np gates are realized. Homogenous doping increases the VCO tuning range to 1.31 GHz ( 20%) in comparison to 1.06 GHz ( 15%) obtained by mixed doping. However, mixed doping has the advantages of more linear VCO frequency tuning, lower close-in phase noise, and reduced maximum sensitivity to variations in supply voltage. Several varactor parameters are introduced. They allow prediction of the influence of varactors on the performance of a given VCO. With a current consumption of only 1 ma from a supply voltage of 1.5 V, both VCOs show a phase noise of 115 dbc/hz at 1-MHz offset from a 4-GHz carrier and a VCO figure of merit of dbc/hz. Index Terms Frequency tuning, MOS varactor, phase noise, RF CMOS, voltage-controlled oscillator (VCO). I. INTRODUCTION THE design of single-chip transceivers has already been demonstrated in low-cost CMOS technologies [1] [11] and industrial solutions are already available [12]. Among the key elements of the important transceivers for wireless communications are voltage-controlled oscillators (VCOs). They are part of the frequency synthesizer to generate the local oscillator (LO) signal for upconversion from and downconversion to the baseband. At a given power consumption, inductance-capacitance (LC) tank oscillators achieve lower phase noise than ring oscillators [13]. Thus, for monolithic integration in CMOS, LC-VCOs are preferred over ring oscillators which are easier to integrate and less area consuming. The interest in fully integrated LC-tank CMOS VCOs for RF systems is demonstrated by the large number of publications in the last few years [14] [23]. Despite the continuous improvement, VCOs still remain the bottleneck and, thus, the main challenge of RF transceivers. This is due to the combination of very demanding VCO parameters: low phase noise, low power consumption, and high frequency Manuscript received November 11, 2002; revised February 24, J. Maget and M. Tiebout are with Infineon Technologies, Corporate Research, D Munich, Germany ( Judith.Maget@gmx.de; Marc.Tiebout@infineon.com). R. Kraus is with the University of Bundeswehr Munich, D Neubiberg, Germany ( Rainer.Kraus@unibw-muenchen.de). Digital Object Identifier /JSSC tuning range. In LC-tank VCOs, phase noise and power consumption depend primarily on the quality factor of the tank. The frequency tuning range is determined by the capacitance tuning range of the varactor and parasitics in the VCO. Hence, a main task is to optimize the performance of inductors and varactors. A great effort has been undertaken to increase the quality factor of spiral inductors by reducing losses [23] [31]. However, many solutions use nonstandard CMOS features and still, in most cases, the inductor limits the phase-noise performance of fully integrated VCOs. The concept of switched capacitors [32] (use of switches for connecting and disconnecting capacitors to the tank) offers wide tuning ranges, but increases circuit complexity and power consumption. Single device varactors are readily realized as junction diodes, but in CMOS technologies only source/drain-to-well junctions are available. Quality factors can be quite high but the tuning ranges are unacceptably low. The approach of differential diode operation increases the quality factor but leaves the absolute capacitance tuning range ( ) still below 2 [33]. Downscaling of the supply voltage further aggravates the tuning problem of junction diodes [34]. More promising is the approach of tuning with the voltage-controlled gate capacitance of the MOS structure [21]. Quality factors are generally high and absolute capacitance tuning ranges well above 2 are possible [33]. Strong capacitance variation within a few hundreds of millivolts makes the MOS varactor devices useful at low supply voltages. However, VCO parasitics deteriorate the effective tuning capabilities of varactors. Further, process variations in the capacitor itself (up to 15% [35]) and in the inductors (5% to above 20% with bondwires) need to be compensated. Therefore, highly tunable varactors are required to guarantee specified center frequencies and frequency tuning ranges. Additionally, for low-power low-phase-noise VCO optimization, the inductance value needs to be increased and, hence, varactors need to be scaled down [23]. VCO parasitics do not scale down to the same extent as the varactor. Also, the reduction of process variations is time-consuming and difficult, last but not least due to the rapid development of technologies with smaller minimum feature sizes. Clearly, this intensifies the demand for varactors with wide tuning ranges. This paper documents the influence of the gate doping on a MOS varactor with high capacitance tuning range. It considers the capacitance voltage ( ) characteristic and quality factor. The resulting differences in frequency tuning, phase noise, and frequency sensitivity to supply-voltage variations ( ) of fully integrated VCOs in a standard digital m CMOS technology are investigated. Varactor parameters that /03$ IEEE

2 1140 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 7, JULY 2003 Fig. 1. Cross sections of the three varactors with different gate doping. Fig. 3. Die photograph and layout of one VCO. Fill structures are suppressed in the area of the inductor and the VCO core. Fig. 2. VCO topology. The staggered winding width (widest outer winding) reduces its series resistance [23]. There is no capacitive penalty as the outer winding is at common mode. No substrate structure of any kind or (patterned) ground shields have been used, and the substrate resistivity was low ( 10 cm, [37]). Fig. 3 shows a die photo and layout of one VCO. Die and inductor size are 450 m 1 mm and 190 m 190 m, respectively. can be extracted from device measurements are introduced. They allow comparison of the varactors via their influence on a VCO s frequency tuning range, and regions of phase noise, and frequency sensitivity to supply-voltage variations. III. MEASUREMENT RESULTS The varactors and the inductor were separately characterized by -parameter measurements (HP8510, HP4156). Values for the capacitance and quality factor of the varactors are retrieved by II. DESIGN The varactors are of accumulation type in n well [34]. Shallow trench isolations (STIs) reduce parasitic capacitances [36]. Small grounded p regions prevent inversion and increase tuning range by enabling deep depletion with a deeper depletion region underneath the gate [35], [36]. Cross sections of the varactors with different gate doping in identical multifinger layouts are shown in Fig. 1. Gate length ( distance of the STIs) is 0.32 m. Tuning voltages are applied to the n regions in the n well. During device measurements, a constant (but variable) voltage is applied to the gates. In the VCO, the high-frequency VCO ouput signal appears at the gates. Fig. 2 shows the topology of the fully integrated symmetric VCO with the 180 phase-shifted outputs and. For low power consumption, a complementary solution was chosen, where a differential pair compensates the losses in the tank. A current source was omitted to maximize the signal swing and eliminate an important phase-noise source. However, compared to topologies with current source at, the sensitivity to variations in power-supply voltage is increased [23]. Two varactors with common tuning input are directly connected to the tank. The octagonal symmetrical inductor utilizes metals 4, 5, and 6 (copper) of the six-metal-layer process in parallel. with the series resistance of the varactor. The inductor features an inductance of 4.5 nh and a dc series resistance of 4.7. The quality factor according to bandwidth definition [38] is between 11.6 and 14.8 in the range of 3 4 GHz with higher quality factors at higher frequencies. Two identical fully integrated VCOs differing only in the varactor (n or np), have been manufactured in standard m CMOS technology. They consume 1 ma from a 1.5-V supply voltage. Phase noise was measured with a Europtest PN9000 (delay-line method). A. Capacitance and Frequency Tuning Fig. 4 compares the characteristics of the three varactors. Differences arise from the shift in flatband voltage introduced by the different gate doping. For n gates, the flatband voltage is low (close to 0 V), but is shifted by 1 V when using p doping for the gate (in both cases, n well beneath the gate). The varactor with mixed gate doping (50% n, 50% p) resembles (1)

3 MAGET et al.: MOS VARACTORS WITH n- AND p-type GATES 1141 Fig. 4. Measured capacitance of the varactors with different gate doping for V =0V, 1.5 V at 2 GHz. two varactors in parallel, each with half the gate width but different gate doping. Thus, its capacitance is an average between those of the two varactors with entirely n or p doping of the gate. With homogenous doping, the slope of the characteristics becomes very steep at the transition from depletion to accumulation, whereas the np-doped varactor features two transition voltages, which correspond to those of its n and p half. Therefore, it reaches its maximum capacitance in two less high and less steep stages. At zero tuning voltage, all varactors reach accumulation and the gate-oxide and the parasitic capacitances determine their maximum capacitance. At the maximum tuning voltage of 1.5 V, all varactors remain in depletion for a wide range of gate voltages. The capacitance of the varactors with n and mixed doping increases at the onset of accumulation only close to V. To predict frequency tuning ranges of the VCO realistically, swing-averaged capacitance tuning ranges provide more insight than the absolute values [36]. Hereby denotes the absolute capacitance tuning range with the absolute maximum capacitance and the absolute minimum capacitance extracted directly from the small-signal capacitance plot (Fig. 4). This is the figure which has been mainly published by authors in previous publications. Swing-averaged capacitances are obtained via with the measured small-signal capacitance as in Fig. 4. These averaged capacitances mimic the large-signal situation in the VCO and determine the oscillation frequency. At the same time, the integral in (3) yields the total charge which is necessary to charge or discharge the varactor during each cycle. The averaged capacitance tuning range is determined by the maximum averaged capacitance (here at V) and the minimum averaged capacitance (2) (3) (4) Fig. 5. (a) Measured absolute and averaged varactor capacitance tuning ranges (f =2GHz). (b) Absolute VCO frequencies. (here at V). Therefore, the averaged capacitance tuning range provides a more solid basis for predicting the frequency tuning range than the absolute capacitance tuning range. Fig. 5(a) summarizes the results for both absolute and averaged capacitance tuning ranges. The varactor with p gates reaches the highest absolute value of 5.5, because it has a very low absolute minimum capacitance (at V). However, the averaged value is considerably lower, as the averaging process leads to a strongly reduced maximum averaged capacitance value compared to the absolute value. The varactor with n gates suffers less from averaging and the absolute tuning range of 4.7 is only reduced to 3.1 after averaging. Obviously, the varactor with mixed gate doping reaches values between the two other devices. The difference between absolute and averaged values can be high. Further, a device with higher absolute capacitance tuning range may even lead to a lower averaged value and, thus, to a lower frequency tuning range. The above results show that it is not sufficent to consider only the absolute value of the capacitance tuning range, although it is unfortunately often the only reported figure in publications about varactors. The varactor with completely p-doped gates has not been used in a VCO, because of its low averaged capacitance tuning range. Fig. 5(b) summarizes the absolute oscillation frequencies of both VCOs. With the n-doped varactor, the VCO offers a tuning range of 1.31 GHz ( 20%), with mixed doping 1.06 GHz ( 15%) is reached. Additionally, lower averaged capacitance values with np gates shift VCO frequencies to higher values (Fig. 6). The normalized frequencies of the VCOs (Fig. 7) show the lower frequency tuning range but more linear tuning for mixed gate doping. The lower value is a direct consequence of the lower averaged capacitance tuning range of the np varactor. Comparing the varactor and VCO tuning proves once again that the averaged capacitance is a more meaningful figure than the absolute value. Using the absolute capacitance tuning range would lead to an inconsistent view: the mixed doped varactor features a higher absolute capacitance tuning range, but lower VCO frequency tuning. The more linear behavior results from the flatter and, therefore, smoother characteristic of the varactor. Usually, the easiest way to achieve reduced steepness of the varactor s

4 1142 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 7, JULY 2003 Fig. 6. Measured averaged capacitances (f =2GHz). Fig. 8. Measured averaged quality factors of the varactors (f =2 GHz). Averaged capacitances corresponding to f = 3:06, 3:67, and 3:98 GHz are marked. TABLE I MEASURED ABSOLUTE AND AVERAGED SMALL-SIGNAL QUALITY FACTORS AT SEVERAL TUNING VOLTAGES Fig. 7. Measured normalized VCO frequencies. the capacitance). Fig. 8 depicts the averaged quality factor as a function of the averaged capacitance. Via characteristic is by adding large parasitic capacitances. However, this approach has the important disadvantage of extremely reduced tuning range. Hence, in commonly used phase-locked loops (PLLs), linearization circuits are employed to reduce the influence of the VCO nonlinearity. These can be omitted when using the proposed varactor design as it provides a simple solution at the device level. The measured frequency tuning ranges are significantly lower than would be expected from averaged capacitance tuning ranges. Parasitic capacitances of the rest of the circuitry (inductor, wiring, etc.) lower the effective capacitance tuning range to Therefore, parasitic capacitances must be reduced wherever possible. B. Phase Noise Phase-noise measurements have been carried out over the whole range of frequencies. To obtain a meaningful comparison of the performance, equal carrier frequencies have been selected: 3.1, 3.7, and 4.0 GHz. For equal carrier frequencies, the varactors need to have equal averaged capacitances [see (6)]. Thus, the necessary tuning voltage for the n-doped varactor is higher (Fig. 6). Phase noise due to thermal noise is mainly determined by the quality factors of the devices in the VCO. Again, due to the large VCO signal swing at the gate, averaged quality factors are more meaningful than absolute values (similarly to (5) where is the constant parasitic circuit capacitance and is the constant inductance, the axis corresponds to a frequency axis. At large averaged capacitances (low frequencies), the n-doped varactor features higher quality factors than the device with np gates. However, below 0.65 pf (above 3.56 GHz), the situation is reversed. In the frequency range of interest (3 4 GHz), the quality factor of the inductor is always lower than the values the varactors achieve. Hence, it is expected that the inductor determines the quality factor of the complete tank. This expectation is further solidified when realizing that the frequency-determining capacitance consists not only of the varactor s capacitance but also of parasitic circuit capacitances [see (6)]. That is, it is the quality factor of the total capacitance ( ) that has to be compared to the inductor s quality factor. The parasitic circuit capacitances, especially the winding winding capacitances of the symmetric inductor, have extremely high quality factors. Thus, the relevant quality factor of the total capacitance is even higher than the quality factor of the varactor alone. This underlines the limiting effect of the inductor s. For completeness, Table I lists absolute and averaged quality factors of the varactors at several tuning voltages. The value (at V) of all varactors is equal, as it occurs for all in accumulation with comparable capacitances and equal resistances which are determined by the path through the n well. The shift in flatband voltage for p gates and the flatter characteristic for mixed doping explains the differences (6)

5 MAGET et al.: MOS VARACTORS WITH n- AND p-type GATES 1143 Fig. 9. Phase-noise measurements at 3.98 GHz. V = 1:50 V, V = 1:28 V. Arrows indicate the type of varactor and the corresponding 1=1f corner frequency. in minimum averaged quality factors (at V). The varactor with p gates is in depletion for a wide range of gate voltages with simultaneously low capacitance and resistance (shorter path through well) resulting in high absolute quality factors. In contrast, the n-doped varactor is in accumulation with simultaneously high capacitance and resistance for almost all gate voltages. Therefore, the averaged quality factor differs little from the absolute value. Again, the varactor with mixed gate doping reaches values between the other two devices. Figs show the measured phase noise for carrier frequencies between 3 and 4 GHz. At high frequencies, the gate type does not play a role for the quality factor of the varactors, and both VCOs reach the same phase noise (Fig. 9). At a 4-GHz carrier frequency, both VCOs show a phase noise of 115 dbc/hz at 1-MHz offset and a figure of merit (FOM) of dbc/hz. The FOM is defined as normalized phase noise [39] FOM mw is the single-sideband phase noise at the offset frequency from the carrier frequency. denotes the total power consumption of the VCO. The performance of a VCO is regarded to be better with a higher absolute value of the FOM. At 3.67 GHz (Fig. 10), however, mixed doping strongly reduces phase noise. This cannot be attributed to quality factor differences, as even the quality factors of the varactors alone without considering parasitic circuit capacitances are above 80, compared to 13 of the inductor (Fig. 8). Identical results at far-offset frequencies confirm this. The measurement results converge around 5-MHz offset, indicating a wider region with n doping. At 3.06 GHz (Fig. 11), the mixed doping varactor allows significantly lower phase noise throughout the entire offset frequency range. The difference in phase noise of the two VCOs is even more pronounced than at 3.67 GHz. The results for both VCOs only converge well above 5-MHz offset, indicating an even wider region with the n varactor. At all frequencies, the far-off phase noise is similar with both varactors. The VCO with mixed doping varactor shows the same phase noise for all carrier frequencies. This also implies that phase (7) Fig. 10. Phase-noise measurements at 3.67 GHz. V = 1:13 V, V = 0:84 V. Arrows indicate the type of varactor and the corresponding 1=1f corner frequency. Fig. 11. Phase-noise measurements at 3.06 GHz. V = 0:61 V, V = 0V. Arrows indicate the type of varactor and the corresponding 1=1f corner frequency. noise with homogenous doping depends strongly on carrier frequency. The above phase-noise results can be understood by noting that the quality factor of the devices mainly describes their influence on the region of the VCO phase noise. For the region, the varactor s characteristic, i.e., the variation of capacitance over gate voltage, plays an important role [40]. Due to the large signal swing of the VCO, the instantaneously active capacitance can deviate strongly from the frequency-determining averaged capacitance. This worsens distortion of the output signal and increases upconversion of flicker noise, which is most present at low offset frequencies [18]. This phenomenon is not captured by the quality factors. We propose a measure for the capacitance variation with gate voltage (and its influence on the phase noise): the tuning voltage dependent relative capacitance variation with the swing-averaged deviation from (8) (9)

6 1144 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 7, JULY 2003 Fig. 12. Relative capacitance variation of the varactors extracted from measurements. Averaged capacitances corresponding to f =3:06, 3:67, and 3:98 GHz are marked. Fig. 13. Measured small-signal capacitances of the varactors with n and np doping at tuning voltages leading to a VCO carrier frequency of 3.06 GHz. Lower relative capacitance variation corresponds to less upconversion of flicker noise due to the varactor and lower close-in phase noise of the VCO. Fig. 12 shows this parameter for the varactors. ( ff results from comparing measured frequency tuning ranges with averaged capacitances.) At a given VCO frequency (given ), mixed doping offers lower (or comparable) capacitance variation than the n varactor. These results can be applied in the following way. At a carrier frequency of 3.98 GHz, the relative capacitance variation of the varactors is comparable and, thus, the close-in phase noise of the VCOs is comparable, confined by the measurement system (Fig. 9). At medium carrier frequencies (Fig. 10), lower phase noise with np gates is explained by the fact that making the waveform more symmetric by lowering the relative capacitance variation of the varactor reduces upconversion of noise [18]. This advantageous effect on the phase noise is most present at low carrier frequencies (Fig. 11). Stronger distortion of the output signal due to higher capacitance variation with homogenous doping increases close-in phase noise further above the results with the np varactor. As an example serves the case of 3.06 GHz. Fig. 13 clearly visualizes that the deviation of instantaneous capacitance from Fig. 14. Measured frequency sensitivity to supply-voltage variations (K ) of both VCOs. the averaged value is lower with mixed doping. For the indicated tuning voltages, both varactors feature the same averaged capacitance and, thus, lead to the same VCO carrier frequency. The relative capacitance variation with mixed doping has similar values over the complete averaged capacitance range, hence, explaining the comparable VCO phase noise over the complete carrier frequency range. C. Frequency Sensitivity to Supply-Voltage Variations Variations in supply voltage result in variations of the oscillation frequency, as varying leads to varying values of the varactor s averaged capacitance [see (6) and (3)]. Pushing, the sensitivity of oscillation frequency to variations of supply voltage, is defined as (10) with units in megahertz per volt (Fig. 14). Fig. 14 shows measured results of both VCOs (with mv). Mixed doping reduces the maximum sensitivity to variations in supply voltage by 20% from 800 MHz/V with n gates to 600 MHz/V. With (6) and (3), it can be shown that the variation of frequency with supply voltage ( ) is determined by the varactor parameter (11) is the tuning voltage dependent capacitance at, and is the corresponding averaged capacitance. Fig. 15 compares this parameter for the two varactors with n- and np-doped gates. A good agreement between the varactor data (Fig. 15) and the VCO data (Fig. 14) is obtained and proves the usefulness of the varactor parameter. The above proposed varactor parameters have been applied to other VCOs, e.g., those of [36], including conventional varactors (nmos). Excellent agreement between varactor and VCO data has been obtained, underlining the value of the parameters. IV. PHASE NOISE WITH SUBDIVIDED VARACTORS The influence of the quality factor of the passive elements on VCO phase noise in the region is generally accepted.

7 MAGET et al.: MOS VARACTORS WITH n- AND p-type GATES 1145 Fig. 15. Varactor parameter 0(C(V )0C ) extracted from measurements. TABLE II BIAS CONDITIONS FOR f = 3:06 GHz (NOT COMPLETE) Fig. 16. Measured phase-noise results with subdivided varactor. (VCO with n varactor.) However, there is an ongoing discussion about the mechanisms that lead to the region of the VCO phase noise. In the previous sections, it has been proposed that the characteristic of the varactor is one of the reasons for phase noise and that it can be described by the varactor parameter, relative capacitance variation. To gain more insight and proof for this thesis, the varactors were subdivided (40%, 60%). This means that both varactors in each VCO are divided into two parts, one with 40% and the second with 60% of the total gate area. The tuning inputs of the corresponding parts are connected, i.e., the smaller parts have a common input as well as the larger parts. Both tuning inputs can be varied separately. Thus, for each frequency (except and ), there are numerous ways to bias the two parts of the varactors. The frequency GHz of the VCO with n-doped varactor results (for example) from the three bias conditions listed in Table II. Although the oscillation frequency is the same, the phase-noise results for the different tuning possibilities can vary considerably (Fig. 16). Tuning the entire varactor with the same voltage leads to the highest close-in phase noise and corner. Biasing the small varactor part at highest voltage results in overall lowest phase noise. As in each case the frequency determining averaged capacitance has to be equal (and also ), the extent to which capacitance variation of the varactor contributes to flicker noise upconversion is described by the total (from both varactor parts) capacitance variation over signal period ( ). This figure can be calculated from the measurement results of the entire varactor by, e.g. (12) with according to (9) and shown in Fig. 17. of the n varactor is low at low tuning voltages, since the device is in accumulation at almost all gate voltages and shows a flat Fig C of the varactors with different gate doping extracted from measurements (f =2GHz). TABLE III BIAS CONDITIONS AND CORRESPONDING TOTAL 1C EXTRACTED FROM MEASUREMENTS (f = 3:06 GHz) characteristic. At medium tuning voltages, the transition from depletion to accumulation occurs during the signal swing, resulting in high. At high tuning voltages, the varactor stays in depletion for a wide range of gate voltages and, again, the characteristic is flat and, thus, is small. Table III summarizes for the various biasing conditions and relates them to the phase-noise results. This underlines again how lower corresponds to lower close-in phase noise. Further advantages of partial tuning of the varactors are reduced sensitivity to variations in supply and tuning voltage. These effects are not covered herein. It should be mentioned that maximum sensitivity to supply-voltage variations is divided by two if only half of the varactor is tuned continuously and the other half is fixed to zero tuning voltage.

8 1146 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 7, JULY 2003 V. CONCLUSION The influence of the gate type of the MOS varactor on the tuning range and phase noise of a fully integrated LC-VCO is presented. This influence is described by the varactor parameters proposed herein, which are generally applicable. Three varactors with different gate doping, n, p, or mixed np, are compared. Mixed doping results in smoother capacitance and resistance behavior because of two depletion accumulation transitions. Quality factors and tuning ranges are always between the values of the entirely n- or p-doped devices, with the lowest quality factor but highest tuning range for n doping. The devices with n gates and mixed doping are tested in otherwise identical VCOs. The higher tuning range of the n varactor increases the VCO tuning range from 1.06 GHz ( 15%) with mixed doping to 1.31 GHz ( 20%). The np gates offer several important advantages due to the smoother characteristic. Upconversion of flicker noise is significantly lower with mixed doping, since less capacitance variations with gate voltage reduce signal distortion. Further, np gates lead to highly linear frequency tuning of the VCO, thereby easing PLL design. This also results in a reduction of the maximum sensitivity to variations in supply voltage by 20%. The mixed doped varactor should be first choice for analog tuning and applications where low upconversion of flicker noise is necessary. The proposed varactor parameters and viewing varactor data as function of the averaged capacitance (i.e., VCO frequency) allow an accurate comparison of varactors via their anticipated influence on VCOs. The usefulness of the parameters has been tested and confirmed with various VCOs and for varactors with STIs as well as for conventional varactors. REFERENCES [1] H. Darabi et al., A 2.4-GHz CMOS transceiver for Bluetooth, IEEE J. Solid-State Circuits, vol. 36, pp , Dec [2] M. S. J. Steyaert, B. DeMuer, P. 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9 MAGET et al.: MOS VARACTORS WITH n- AND p-type GATES 1147 [37] T. Schiml et al., A 0.13-m CMOS platform with Cu/low-k interconnects for system on chip applications, in Symp. VLSI Technology Dig. Tech. Papers, Kyoto, Japan, June 2001, pp [38] K. K. O, Estimation methods for quality factors of inductors fabricated in silicon integrated circuit process technologies, IEEE J. Solid-State Circuits, vol. 33, pp , Aug [39] P. Kinget, Integrated GHz Voltage Controlled Oscillator Design. Norwell, MA: Kluwer, 1999, pp [40] S. Levantino et al., Frequency dependence on bias current in 5-GHz CMOS VCOs: Impact on tuning range and flicker noise upconversion, IEEE J. Solid-State Circuits, vol. 37, pp , Aug Marc Tiebout (M 90) was born in Asse, Belgium, in He received the M.S. degree in electrical and mechanical engineering from the Katholieke Universiteit Leuven, Leuven, Belgium, in He joined Siemens AG, Corporate Research and Development, Microelectronics, Munich, Germany, in 1992, designing analog integrated circuits in CMOS and BiCMOS technologies. In 1997, he started to work on the design of radio-frequency devices and building blocks in sub-m CMOS technologies. From 1999 to 2001, he was with Infineon Technologies AG, Wireless Products, Munich, where he worked on RF CMOS circuits for wireless communications transceivers. He was the Workpackage Leader for the CMOS part of the EC-funded LEMON project (single-chip UMTS transceiver). Since 2001, he has been with Infineon Technologies, Corporate Research, Munich, where his research focuses on low-power high-frequency circuits and transceivers in deep-submicrometer CMOS. He has authored or coauthored many RF CMOS publications and many patents. Judith Maget was born in Parsberg, Germany. She received the Dipl.-Phys. degree from the University of Regensburg, Germany, in 1999 and the Ph.D. degree in eletrical engineering from the University of Bundeswehr Munich, Neubiberg, Germany, in The topic of her Ph.D. dissertation was the improvement of varactors and inductors for LC-VCOs in standard MOS technologies. For Infineon Technologies AG, Munich, Germany, she is currently involved in the design of CMOS circuits for wireless applications. Rainer Kraus was born in Lauingen, Germany. He received the Dipl.-Phys. degree from the University of Munich, Munich, Germany, in 1982 and the Ph.D. degree in eletrical engineering from the University of Bundeswehr Munich, Neubiberg, Germany, in Since 1984, he has been with the Institute of Electronics, University of Bundeswehr Munich, working as a Researcher and, since 1992, also as a Lecturer. From 1984 to 1990, he worked on design and analysis of DRAM and SRAM circuits in cooperation with Siemens Semiconductors, Memory Products (now Infineon Technologies), Munich. At the same time, he was involved in the modeling of MOS transistors for analog applications. Since 1990, he has been engaged in analysis and modeling of power semiconductor devices in cooperation with Siemens, Corporate Technology. His main present research interest is in the design of RF circuits in CMOS technologies.