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1 crrent-injection Josephson atch empoying a single-flx qantm. Jn'ichi Sone and Toshishige Yamada Microelectronics Research Laboratories NEC Corporation Miyazaki Miyamae-k. Kawasaki. Kanagawa 213. Japan (Received 5 November 1985; accepted for pblication 17 Janary 1986) A new crrent-injection Josephson latch employing a single-flx qantm is proposed. t has a master-slave circit configration and operates nder ac power spply. n the circit data are stored as a circlating crrent in a spercondcting loop consisting of a single jnction and indctances. A two-jnction interferometer gate directly copled to the l.oop reads ot the stored data. Dal-rail signals are generated from the read-ot data by Josephson jnctions and resistercopled Josephson logic gates. The isolation between a master circit and a slave circit is realized sing high-impedance states in the Josephson jnctions. The circit design and comptersimlation reslts on the circit operation are described in this paper.. NTRODUCTON Josephson devices are attractive circit elements for ltrahigh performance compter applications. Their high performance is based on the high intrinsic switching speeds low-power dissipation and impedance-matched spercondcting transmission lines inherent to the Josephson technology. These featres have been demonstrated by varios types of Josephson logic circits. - 7 Among them crrent injection Josephson logic gates3-7 have varios advantages over magnetically copled Josephson logic gates2 with regards to small device sizes intrinsically damped resonance phenomena and redced fan-ot delay time. These Josephson logic gates operate most commonly in a latching mode. n order to reset these latching logic gates to the "off" state (spercondcting state) lowering their spply crrents to zero is reqired. Ths Josephson latch circits which store data dring the time interval when the spply crrents are trned off are reqired to implement the Josephson logic circits. Several kinds of the latch circits have been reported. 8.9 Most of them se the magnetically copled interferometer circits. Becase of the magnetically copled transformer sed these circits may occpy relatively large areas on a chip. The Josephson logic circits constrcted from the magnetically copled latches and the crrent injection logic gates make the circit design and fabrication complicated and the advantages of the crrent injection ogic gates described above cannot be fny taken. From the points of the smallness in the device size and the compatibility in the circit design and fabrication processes crrent injection Josephson latches are desirabl.e to be realized for flly crrent injection 1.ogic circits. Recently we have originated a crrent injection Josephson latch circit employing a single-flx qantm and sccessflly verified its proper operation in a experimentally fabricated latch circit. ts main featres are the capability of high-speed operation and the smallness of the device size. n this paper we present the operation principle and circit design of the novel crrent injection Josephson latch circit. n the circit data are stored as a circlating crrent in a loop consisting of a single jnction and indctances. A twojnction interferometer gate is directly copled to the loop and reads ot the stored data. The dal-rail signals are generated from the read-ot data by Josephson jnctions and the resistor-copled Josephson logic (RCJL) gates. 7 The circit design as well as operation principle are described in Sec. n. ts proper operation is investigated sing compter simlations in Sec.. Conclsions are given finally in Sec. V. Experimental verifications of this latch circit inclding'its high-speed operation will be presented in a companion paper. O U. LATCH CRCUT OPERATiON The basic circit configration of the crrent injection latch is shown in Fig. 1. t has a master-slave configration and is designed to operate nder a trapezoidal ac power spply shown in Fig. 2. The fnction of the present latch circit is the same as those of the magnetically copled latch circits previosly reported. 9 The flat portion of the power spply waveform called the active portion of the machine cycle is the nominal operating region for the logic gates. The otpts of these logic gates are stored in the master circit before the power spply begins its transition into the opposite polarity. The master circit holds the data dring the time interval when the ac power spply changes its polarity. Moster : Slave FG. 1. Eqivalent circit of a latch circit. G.Gz.G).G.-OR gates. D- AND gate. DATA-Data signal. LATCH ENABLE-..atch enable signal. =.3 mao 12 = 13 =.15 mao. = s =.21 mao L = 5.3 ph L2 = 2.3 ph. R D = 1..n. R D = 1..n R) = R. = 6..n. Rs = 2..n. RL = 6..n. R M = 4..n. R = R2 = 5..n J. Appl. Phys. 59 (9).1 May American nstitte of Physics 3196

2 o g DATA ;:-: WRTE DATA 'ACTVE HOLD PORTON' DATA V READ /i 1 1 MACHNE CYCLE: 14. ACTVE 1 PORTON 1 1 FG. 2. The operation of a latch circit nder ac power spply. A slave circit detects the data stored in the master circit dring the power spply ramp of the next cycle and holds the data at its otpt ntil the end of the cycle allowing the latch to accept new data dring the cycle. 9 A. Master circit The master circit consists of two RCJL OR gates G and G 2 a RCJL AND gate D a spercondcting loop and a sense gate Q' The loop is composed of a single-jnction J and indctances L L 2 and L 3 A damping resistor R D is connected paranel to the jnction J. The interferometer sense gate Q consists of the indctances L2 and L 3 jnctions J 2 and J 3 and a damping resistor R D2 and is directly connected to the loop throgh L2 and L 3 The write operation of the master circit is as follows. A latch enable signal (LE) is injected into the loop and the gate G 2 in the active region of the cycle. Then Gz switches from the spercondcting state ("off") to the voltage state ("on") and an otpt crrent is delivered to the AND gate D. The gate G switches to the voltage state pon the application of a data signal (DATA) and delivers an otpt crrent to the gate D j Ths only when DATA = LE = 1 the gate D j switches and a data otpt crrent D is injected into the loop casing magnetic flx to enter the loop. Then the data is written as a circlating crrent in the loop. Here let s investigate the variation of the qantm phase difference OJ of the Josephson jnction J 1 in the loop against the external crrent e injected at the node A in Fig. L As explained later in the slave-circit operation crrent injection into the loop from the slave circit is prohibited in the write operation. t is becase either a jnction J 4 in the slave circit or jnctionsjz andj 3 in the sense gate Q switch into the voltage state and present a high resistance. When the jnction J 4 is in the high-resistance state the flx qantization condition and the crrent contination condition give the eqations for e and the qantm phase differences OJ O 2 and 3 of the jnctions J 1 J 2 and J 3 as (<po/21r)( n1r) = (1e - sin ( 1 )L (1) (<po/21r ) ( m1r) = (1e - sin 1 - z sin (2)Lz - ( sin sin (3)L 3 (2) (3) t where ' z and 13 are the Josephson critical crrents of the jnctions J 1 J 2 and J 3 respectively <Po is the magnetic-flx qantm L > L 2 and L3 are the indctances shown in Fig. 1 and nand m are integers for restricting the phases to the range - 1r < OJ 1r. The stability condition de to a minimm of potential energy is obtained as lz <Po (COS O2 cos ( 3) cos 8 cos 82 cos cos r 13 2 X (_1_ + 1 ) +!i _1_ cos O 2 cos 3 L L2 + L3 21r Lli + (li)2 _1_( 1 )(COS 82 + cos (3». (4) 21r Lli L2 + L n the derivation of the above eqations we have neglected the sbgap crrent flowing in the jnction J 4 Here we assme 12 = 13 and L2 = L 3 therefore the sense gate Q has a symmetric threshold characteristics. From the Eqs. (1) ( 3 ) we can obtain Oz = 2k1r (5) (./) - sin 1 =A1( n'1r) (6) ( ) - 2 sin (1211 ) sin O2 = Az( m'1r) (7) A = tpo/21rll' A2 = <po/21rlzll> (8) (9) where k n' and m are integers. ntrodcing <p = n'1r Eqs. (5)-(7) can be rewritten as Then (1) e/ = 2A 2 Z + 2(12/ )sin O sin tp + 2A 2 m'1r. (11 ) 2(A +A Z )2 + 2(2/)sin 82 = AjtP - sin <p - 2A 2 m'1r. (12) Since Eq. (12) gives Oz as a fnction of tpl' there1ationship of <p against e can be nmerically calclated. n Fig. 3 are shown the calclated e - <p characteristics with typical circit parameters depicted in the caption of Fig. 1. Solid lines show the thermodynamically stable operating regions while broken lines show the nstable ones. There were no soltions of O 2 in Eq. (12) except with m' = ± 1. n the absence of the external crrent e' five stable operating points sch as A B C all with m' = D with m' = 1 and E with m' = - 1 are present. Therefore a setp operation described as follows is reqired to restrict the m' vale of the operating point to zero. There are no operating points with m' = 1 and m' = - 1 for e < - fo and e > "' respectively where fo and - io are the external crrents for the operating point F and G in Fig. 3. Ths once the bipolar external crrent e with the amplitude larger than fo is applied the operating point only with m' = is allowed to be present. Here the damping resistance RD2 has been asmed to be sfficiently low so that direct transitions of the operating point between m' = 1 and m' = - 1 have not been allowed. When the external crrent increases from zero the operating point B moves withot changing its m' vale ntil 82( = - ( 3 ) reaches 1r/2 from zero. Similarly the operat J. Appl. Phys. Vol. 59 No.9 1 May 1986 J. Sone and T. Yamada 3197

3 -2 (' (" \1 m.. O m=- \ 1\ \ -1 " ' ' 1\ nl.- \ 2-2 \ ( "' m=1 \.J m=o rr\\ ' \'.1 ) '-2 \ n_ "= \ c > FG. 3. External crrent vs a qantm phase difference.p of a jnction J with a jnction J. in the resistive state. Solid lines show thermodynamically stable operating region. Broken lines show thermodynamically nstable operating region. FG. 4. External crrent and a qantm phase difference.pl of a jnction J. A solid line represents the operating region when jnctions J 2 and J 3 are in the resistive state. ing point B moves withot changing its m' vale ntil (J2 reaches - 1T /2 from zero as the external crrent decreases from zero. n the storage loop with the typical parameters shown in Fig. 1 the operating point with m' = moves among modes with n' = ± 1 ± 2 withot changing its m' vale when the external crrent varies. When the jnctions J 2 and J 3 are in the resistive state the flx qantization condition and the stability condition are e (L) + L 2 ) - )(L) + 2L 2 ) sin (J = (tfjo21t) «(J + 2n"1T) = (tfjo21t)tfj) (L + 2L 2 )cos (J + (tfjo21t) > (13) (14) where n W is an integer. Here we have also neglected the sbgap crrents flowing in the jnctions Jz and J 3 The relationship of e and tp) with jnctions J 2 and J 3 in the resistive state are also nmerically calclated with the same circit parameters and are shown in Fig. 4 by a solid crve. For reference.. - tfjl characteristics for m' = with the jnctionj. in the resistive state are also shown by a broken crve. t can be seen that the differences between those crves are small ths the operation described in the next paragraph can be applied to these two cases. n the absence of the crrent injected into the loop H and J in Fig. 4 are stable operating points. As is evident in the following explanation the operating point stays at either H or when the power spply crrent inclding the external crrent e' had negative polarity in the last machine cycle. n order to reset the storage loop the latch enable signal is applied in the next cycle with positive polarity and the operat- ing point moves from H or to K. When the data signal is applied the operating point moves from K to M throgh L and the magnetic flx is cased to enter the loop. On the other hand in the absence of the data signal the operating point stays at K. At the end of the cycle au the signals are trned off. Then the operating point moves to J for DATA "1" while it moves to H for DATA "." Similar operations are repeated in the following cycle with negative polarity. Ths DATA" 1" is represented by the state at or J depending pon the power spply polarity. DATA "" is represented by the state at H. From the vales of tpl at and J the amplitde of the circlating crrent eit can be estimated as l eir =1 sin tplo.7o (15) Since the data otpt crrent D and the latch enable crrent LE are additively injected into the l.oop the proper write operation of this latch is not affected by the seqence of the activation in the data signal and the latch enable signal. B. Slave circit The slave circit consists of jnctions J 4 and J s with critical crrents 14 and s the sense gate Q) and RCJL OR gates G 3 and G 4' ResistorsR 3 and R4 are designed to have the same resistance. The critical crrents 14 and s are chosen to satisfy the relationships of!2 <14 = s < (16). (fcir) <14 = 15 <1m () (17) where is the absolte vale of the gate crrent in the fiat portion of the power spply 1m () and 1m (fcir) are threshold gate crrents of the gate Q in the absence and presence of the circlating crrent l eir in the loop respectively. When DATA "" is stored in the form ofa circlating 3196 J. Appl. Phys. Vol. 59 No.9 1 May 1986 J. Sone and T. Yamada 3196

4 crrent Q switches before J 4 dring the power spply ramp and an otpt crrent is injected into the gate G 4 and the jnctionj s. Then G 4 switches providing "1" at the tre otpt. On the other hand J 4 and J s remain in the spercondcting state since the maximm crrents /2 flowing in the jnctions J 4 and J s are less than their critical crrents. Ths the otpt on the complement branch is "." Since the gates operate in a latching mode these otpt states remain nchanged even if the circlating crrent changes its vale dring the same cycle. When DATA "" is stored in the loop J 4 switches before the gate Q and the spply crrent to Q is diverted to the jnction Js Then J s and G3 switches to the voltage state in this seqence providing" 1 " at the complement otpt. The gate Ql does not switch even if the data signal is later entered in the latch dring the same cycle since Q has no spply crrent after J 4 switching. Here let s investigate the threshold characteristics of the gate Q). The relationships of the qantm phase differences ) 2 and 3 ofthejnctionsjj2' andj 3 and the gate crrent g spplied from node B in Fig. 1 are described as sin ) + (4)o21TL)) () O 2 + 2n1T) = (18) 12 sin O 2 + (2 - ) - 3-2n1T) 21TL + ( m1T) + g = (19) 41TL sin 3 + (O) O2 + 2n1T) 21TL j 4> g +--(3-2-2m1T) +-= 41TL2 2 (2) Z - -lmo)/12 _ rg/z '\-.L (a) 19/ (b) :3 4 x cos ) cos O 2 cos 3 +.!&.. cos ) (cos O 2 + cos ( 3 ) 21T X (_1_ + _1_) +.!&.. _1_ cos 2 cos 3 12L) 21zL2 21T )L) + ( fj)2 1 _ (cos Oz + cos ( 3». 21T 21);tL L2 (21) The condition (21) assres that the soltion ofeqs. (18) (2) is thermodynamically stable. Here let s notice that no external crrents are injected from the node A in Fig. 1 dring the read operation. ntrodcing new variables 4» = 1 + 2n1T x = O2 + 3 and y = z - 3 we can rewrite Eqs. (18)-(2) as (22) 2. x Y g 23 sm"'2 cos "' = ( ) 2 cos sin L + 2.(y - fj) +..!..(y + 2m1T) = 2 2 V 2 V3 (24) where The soltion for n = m = is evident i.e. ) =y = 2 sin (x/2) + (g/z) = O J. Appl. Phys. Vol. 59 No.9 1 May 1986 (25) (26) FG. 5. Gate crrent for a sense gate Q vs the sm of the qantm phase dift'erencesofjnctionsj 2 andj 3 x = (J2 + (J3' (a) A crve shows the operating region in the absence of a circlating crrent in the storage loop. (b) A crve shows the operating region in the presence of a circlating crrent in the loop. Solid lines in (a) and (b) represent the thermodynamically stable operating region while broken lines represent the thermodynamically nstable operating region. n Fig. 5Ca) the gate crrent g is plotted verss x by a solid line. The broken line shows the thermodynamically nstable soltions. The operating point S in Fig. 5(a) where 1 = z = OJ = corresponds to the point B in Fig. 3 where no circlating crrent is present. Therefore the sense gate Q remains in the spercondcting state p to Jg = 21z! = 1m ()] when the absolte vale of the gate crrent increases. The soltions for n = 1 m = n = - 1 and m = are nmerically calclated and the threshold gate crrent is plotted verss x in Fig. 5 (b) by a solid line. The operating point T with fj = 5.4 z =.83 OJ = -.83 and U with 4>1 = O 2 = =.83 correspond to the points A and C in Fig. 3 respectively where the nominal circlating crrent is present. Therefore the gate Q switches to the voltage state when the absolte vale of the gate crrent exceeds e [ = 1m (cir)] in Fig. 5(b). J. Sane and T. Yamada 3199

5 C. Circit design The circit parameters of the latch were chosen sch as to make the latch compatible with the 5-J.Lm resistor-copled Josephson logic described earlier. \3 The circit elements which constitte the storage loop are d.esigned as follows. (a) n the absence of the crrent injected into the storage loop there shold be three stable operating points like H and J in Fig. 4. n the optimm design the absolte vales of the external crrents for the operating points P and Q in Fig. 4 shold be the same. As a reslt (L + 2L2)i o. (27) (b) The discrepancies between the solid crve and the broken crve in Fig. 4 shold be small in order to obtain a wide operating margin for the latch enable crrent LE and the data crrent D (c) The soltion for ()2 in Eq. (12) with -1T12<()z<rr12 and m' = shold be present over the wide range of ' This assres that the external crrent injected into the storage loop can be varied in a wide range with the m' vale kept to zero reslting in a wide operating margin for the data crent. To satisfy the above two reqirements (b) and (c) smaller vales of L21L and 12/11 are desirable. (d) To maximize the operating margin for the circlating crrent cir in the loop (28) The for conditions of (a)-(d) are not always compatible i.e. if we follow the reqirements (27) and (28) thel21 L vale is determined as which is not necessarily small to satisfy the reqirements (b) and (c). The 12/11 vale also cannot be redced nlimitedly since the otpt crrent of the sense gate 1 has to drive the OR gate G 4 and the otpt crrent of the AND gate D has to case the flx qantm to enter the loop. n the present design the critical crrent ratio of 121/1 = 1/2 was chosen. The vale of L21 L was chosen sch that when the external crrent e is varied the operating point can move among the modes of n' = ± 1 ± 2 in Fig. 3 with the m' vale kept to zero i.e. witbot the absolte vale of ()2 and ()3 exceeding rr/2 even if ± 5% deviations of indctances L > L2 and ± 1% deviations of critical crrent ) and 12 are present. The circit parameters for a 5-J.Lm lead-anoyl4 Josephson latch circit with a Josephson critical crrent density of 8 A/cm 2 were optimized to obtain wide operating crrent N..J +..J Q... t N 2 2'Tl LE L+L 2'/ f#oo FG. 6. Operating margins for a latch enable crrent! LE and a data crrent D Shaded area shows the crrent region for the proper latch operation. margins following the conditions described above. The typical reslts are shown in the caption of Fig. 1. The optimm damping resistances of R and R depend on the dynamics of the storage loop and were determined by compter simlations tbe d.etail of which is described in Sec. H. As is known in Figs. 3 4 and 5 the designed operating crrent margins for the data crrent D' the latch enable crrent LE' and the spply crrent g for the jnction J 3 and the sense gate 1 are comparable to the previosly reported magnetic copled Josephson latches. 9 The crrent margins for 1 and he are shown in Fig. 6. The shaded region represents the proper operating region. The designed. vales and margins for the operating crrents are listed. as D =.43 rna ± 39% (29) L.E =.3 rna ± 38% g =.3 rna ± 33% 1m (lcir )m () =.44.. COMPUTER SiMULATONS (3) (31) (32) The amont of the magnetic fix generated in the loop deeply depends on the damping resistance R. Appropriate damping resistance R D for the proper operation was determined by compter simlations. n Fig. 7 is shown the sim- <l. en z w n: :J a.. Z -.5 o DATA 5 g TME (psec) (a) 1 <l E.5 5.". -e. en Z :J U a -.5 " L ". o 5 1 w en TME (psec) (b) FG. 7. A two cycle compter simlation of the latch with a clamping resistance of 1. n. The simlation begins with a zero stored in the latch. (a). -Gate crrent for the jnction J. and the sense gate Q 1. DATA-Data crrent. LE--Latch enable crrent. (b) TRUE COMP-Tre and complement otpt crrents of the slave circit. l-qantm phase dilference ofthejnctionj. a 32 J. Appl. Phys. Vol. 59 No.9 1 May 1986 J. Sane and T. Yamada 32

6 (f) - Z W :::> - :::> D... z -.5 E.5 (f) - Z W :::> - :::> D TME (psec) COMP ( ) 5 TME (psec) (b) ". w z w o i. Cl W (f) <t D... FG. 8. A two cycle compter simlation of the latch with a damping resistance of 4... The simlation begins with a zero stored in the latch. (a) 1. -Gate crrent for the jnction '4 and the sense gate Q. DATA-Data crrent. LE-Latch enable crrent. (b) TRUE COMP-Tre and complement otpt crrents of the slave circit. tb-qantm phase difference of the jnction '' lated typical reslt of proper two-cyc1e operations. The inpt DA T A seqence is "1" "." The damping resistance R D of 1 n and the power spply rise time of 1 ps and the cycle time of 5 ps were chosen for the simlations. The latch enab:le signal is activated in the middle of the active portion every cycle. The simlation begins with "" stored in the latch circit. t can be seen that the latch circit operates properly as the static design in Sec. expects. The circit with damping resistance R D larger than 4 n operated improperly as shown in Fig. 8. The improper operation reslts from the direct shifts of the operating point from L to and from Q to R in Fig. 4. As a reslt when the power spply is trned off the operating point moves to H in spite of the application of the data signal and DATA "" is read ot in the next dock cycle. The critical vale of 4 n for the damping resistance hardly depends on the power spply rise time. The damping resistance of 1 n was chosen in this design to assre the proper operation even if the circit parameters deviate from the designed vales in a practical device. V. CONCLUSONS A new crrent injection Josephson latch employing a single-flx qantm is proposed. t has a master-slave circit configration and operates nder the ac power spply. ts main featres are the capability of high-speed operation the smallness of the device size and the compatibility in circit design and fabrication processes with the crrent injection Josephson logic gates. The operation principle and the circit design have been described in detail with stress on wider operating margins for varios inpt crrents. Finally dynamical behaviors of the latch circit have been investigated sing compter simlations. The vale of the damping resistor assring the proper operation has been determined from the simlation reslts. The experimental verifications of this latch indding the high-speed capability will be shown in a companion paper. ACKNOWLEDGMENTS The athors wold like to thank J. S. Tsai for his valable discssions. They also wold like to thank Y. Takayama and H. Abe for their continos encoragement dring this work. The present research effort is part of the National Research and Development Program on "Scientific Compting System" condcted nder a program set by the Agency oflndstrial Science and Technology Ministry of nternational Trade and ndstry. 'H. R. Zappe EEE Trans. Magn. MAG (1977). 2T. Gheewala Appl. Phys. Lett (1979). 3T. A. Flton S. S. Pei and L. N. Dnkelberger Appl. Phys. Lett ( 1979). "T. Gheewala and A. Mkherjee Technical Digest of the nternational Electron Devices Meeting (EEE Piscataway Nl 1979) p 's. Takada S. Kosaka and H. Hayakawa lpn. 1. Appl. Phys. 19 W7 (198). OK. Hohkawa M. Okada and A. shida Appl. Phys. Lett ( 1981). 1J. Sone T. Yoshida and H. Abe Appl. Phys. Lett (1982). A. Davidson EEE J. Solid-State Circits SC (1978). 9R. C. Jones and T. R. Gheewala EEE 1. Solid-State Circits SC-t7 \21 ( 1982). "'T. Yamada and J. Sone 1. Appl. Phys (1986). "M. B. Ketchen Technical Digest of the nternational Electron Devices Meeting (EEE Piscataway Nl 1979) p '2E. O. Shltz-DBois and P. Wolf Appl. Phys. t6 317 (1978). 3J. Sone T. Yoshida S. Tahara and H. Abe Appl. Phys. Lett (1982). '4J. H. Greiner C. 1. Kircher S. P. Klepner S. K. Lahiri A. 1. Warnecke S. Basavaiah E. T. Yen J. M. Baker P. R. Brosios H. W. Hang M. Mrakami and. Annes BM J. Res. Dev (198). 321 J. Appl. Phys. Vol. 59 No.9 1 May 1986 J. Sone and T. Yamada 321

m_ FUNCTIONAL. TESTS

m_ FUNCTIONAL. TESTS Current-injection Josephson latch empoying a single-flux quantum. n Toshishige Yamada and Jun'ichi Sane Microelectronics Research Laboratories, NEC Corporation, Miyazaki, 4-1-1, Miyamae-ku, Kaasaki, Kanagaa

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