A Novel Three Value Logic for Computing Purposes

Transcription

1 Iteratioal Joural o Iormatio ad Electroics Egieerig, Vol. 3, No. 4, July 23 A Novel Three Value Logic or Computig Purposes Ali Soltai ad Saeed Mohammadi Abstract The aim o this article is to suggest a ew threevalued logic amed SADEGH logic istead o the biary logic or desigig digital systems. The methodology employed i this logic ivolves usig three operators, ad - or explaiig the meaigs o correctess, icorrectess, ad udeied. By usig some deied relatios, systems could be desiged which have the advatages o icreasig addressig model, cotrol, precisio o samplig ad decreasig calculatig operatios i additio to beig compatible with the biary logic []. The results o this study suggest the possibility o applyig the SADEGH logic to desigig combiatioal ad sequetial circuits. Idex Terms Domiat operad, idetity operad, udeied operad, three-valued logic, SADEGH three-valued logic. I. INTRODUCTION Traditioally, logical calculi are bivalet. There are oly two possible truth values: true ad alse. The law o the excluded dle is oe o the oudatios o the classical two valued logic: a propositio P is either true or alse, there is o other choice. At the begiig o the year 92, the irst o-classic illogical calculatio became possible rom a third value. Later o, at the o the year 93s, logical three values were itroduced or the aalysis o partial-recursive predicates. I these logics, three values true (T udeied (U ad alse (F are preseted. Amog the studies doe about the three-value logic we ca reer to a article itroducig ot3, ext3, ad3, or3, imp3, equ3, xor3, les3, gre3, leq3, geq3 operators [2]. I aother article [3], the three-value logic is cosidered urther ad the sigle ad double iput operators are deied as the ollowig. TABLE I: DEFINED OPERANDS II. SADEGH THREE-VALUE LOGIC A. The Primitive Operators i This Logic Are Deied as the Followig Deiitio : The double-iput PG operator idicated by the symbol (+. I this operator,, ad - are deied as the domiated, idetity ad udeied operads respectively as preseted i Table II. +( - TABLE II: PG TABLE Deiitio 2: The double-iput PG operator idicated by the symbol I this operator,, ad - are deied as the udeied, domiated ad idetity operads respectively as preseted i Table III. (. - TABLE III: PG TABLE Deiitio 3: The double-iput PG- operator idicated by the symbol. (<>, I this operator,, ad - are deied as the idetity, udeied ad domiated operads respectively as preseted i Table IV. (<> - TABLE IV:PG- TABLE TABLE V: SG - To desig digital systems, a iterpolatio relatio is required or developmet. I the articles cited beore, it is ot possible to develop systems based o the three-value logic. Mauscript received November 4, 22; revised December 23, 22. The authors are with Alghadir ceter o higher educatio Zaja, Ira ( ali.s@roozbeh.ac.ir,saeedm@roozbeh.ac.ir. TABLE VI: SG - - * TABLE VII: SG * - - Similarly, we deied the sigle-iput operators as ollows: i the Tables V, VI, VII, VIII, IX, X, XI, XII, XIII, colum X is the iput that ca take the three values, ad - DOI:.7763/IJIEE.23.V

2 Iteratioal Joural o Iormatio ad Electroics Egieerig, Vol. 3, No. 4, July 23 ad secod colum shows the results ater the values o X have bee aected by the sigle-iput operators. TABLE VIII: SG - TABLE IX: SG TABLE X: SG - - TABLE XI: SG - - TABLE XII: SG - - TABLE XIII: SG B. The basic rules o the SADEGH logic. X is a variable that ca take the three values, ad -. The relatios o the PG operator: XX X I the PG operator, the operad - was itroduced as udeied. But sice the combiatio o this operad with the other two operads ad with itsel results i X, - loses its udeied quality. The relatios o the PG operator: XX X I the PG operator, the operad was itroduced as udeied. But sice the combiatio o this operad with the other two operads ad with itsel results i X, loses its udeied quality. The relatios o the PG- operator: X XX I the PG- operator, the operad was itroduced as udeied. But sice the combiatio o this operad with the other two operads ad with itsel results i X, loses its udeied quality. TABLE XIV: NUMBERS IN BASE-3 Base-3 Base III. NUMBER BASE CONVERSIONS A. Coversio rom Base-3 to Base-: Numbers, ad - are used i three-value systems ad they reer to oe, zero ad mius oe as mathematical quatities. To represet bigger or smaller umbers, we put the three umbers successively ollowig some speciied rules. I the three-value systems, each umber ca be writte as the ollowig i the three-value system [4]: X a 3 a 3 a 3 a 3 Here, each o the actors a, a,... a, a ca be, or -. I the SADEGH logic, each o the umbers, ad - is called a TET (Terary Digit. B. Coversio rom Base- to Base-3: We explai this by poit by a example: Thereore, the aswer is ( 6 = ( a 2 aa 3 = ( 3 The arithmetic process ca be maipulated more coveietly as ollows: First we divide -6 by 3. As the quotiet we write a umber the multiplicatio o which by the divisor produces a umber that is dieret rom the divided by less tha or more tha -; i.e. we take -2 as the quotiet. I the ext 387

3 Iteratioal Joural o Iormatio ad Electroics Egieerig, Vol. 3, No. 4, July 23 stage, -2 must be divided by 3. Agai, we write a umber as the quotiet so that the product o its multiplicatio by the divisor diers rom the divided by less tha or more tha -, that is -. We cotiue the process util the quotiet becomes, or -. Ater reachig this stage, we write the last quotiet ad the remaiders rom the ed to begiig to get the ial result. rows whose output is, we write the sub-relatio as preseted i the igure. IV. GETTING THE OUTPUT RELATION To desig a circuit or a block i digital systems, we eed to produce the output relatio accordig to the dieret iputs. We use a truth table to obtai such a output relatio ad the develop it i the orm a logical diagram [5]. I base-2 digital systems, there are two geeral methods o obtaiig the output relatio kow as the miterm ad term methods [6]. To clariy the way we obtai the output relatio i SADEGH logic, we irst oer a example o how the output relatio is produced i the biary logic ad the explai how the output relatio is obtaied i the SADEGH logic. We irst produce a relatio or oe o the two operad type or operad, or example we do as the ollowig: Fig.. Example o truth table or biary digital For each row, we obtai a sub-relatio. Sice is the idetity operad i the AND operator, we use this operator betwee the two operads A ad B, ad sice i the AND operator oly.=, we eed to chage each o the operad A ad B to. To do so the NOT operator is applied. Similarly, we obtai the sub-relatio or each o the outputs o ad the we put the sub-relatio to gather i the geeral relatio usig OR due to the act that is the domiat operad i the OR operator. Thus, i oe o the sub-relatios becomes, the output o the geeral relatio will be certaily. Otherwise, it will be equal to. F A B We ollow the same procedure i the SADEGH logic. This procedure cosists o the ollowig three major outputs each o which ca be used to obtai the output relatio: F F F mi A. the Method o Obtaiig F F * We explai this method by a example: i the F relatio, reers to the sub-relatio or the output o. Fig. 3 presets a radom-output truth table. For each o the Fig. 2. Radom-output truth table Sice is the idetity operad i the PG- operator, we use this operator betwee the operads A ad B ad sice i the PG- operator oly, we eed to chage each o the operads A ad B to. To chage ad - to, we use the sigle-iput operators SG ad SG respectively. For example, i row 7 o the truth table above, B must be chaged rom - to usig SG ad i row 6 A must be chaged rom to usig SG. To obtai, we eed to combie the sub-relatios by usig a operator i which is the domiat operad, that is operator PG. Thus, the relatio will be as ollow: A B It is ot suiciet to use oly to obtai the geeral relatio because is valid i output o but ot i the output o ad -. Thereore, we eed a dieret relatio such as or, ad sice we are applyig the relatio, we also eed to use. I this relatio, reer to the sub-relatio or the output o -. We write the sub-relatio or each o the rows whose output is -. Sice - is the idetity operad i the PG operator, we use this operator betwee the operads A ad B ad sice i the PG operator oly -. -= -, we eed to chage each o the operads A ad B to -. To chage ad to -, we use the sigle-iput operators SG ad SG respectively. To obtai, we eed to combie the sub-relatios by usig a operator i which - is the domiat operad, which is operator PG-. Thus, the relatio will be as ollow: A The geeral relatio obtaied will be as the ollowig: (( A B ( A B ( A B (( B A. B ( A. Accordig to this geeral relatio, we ca desig a circuit that is capable o developig the truth table preseted above. It is worth metioig that we could also use the ad mi relatios to obtai the geeral relatio. We explai 388

4 Iteratioal Joural o Iormatio ad Electroics Egieerig, Vol. 3, No. 4, July 23 each o them i the ollowig paragraphs. B. The Method o Obtaiig We irst eed to obtai as explaied above. I the A B relatio, reers to the sub-relatio or the output o. We obtai the or each o the rows whose output is. Sice is the idetity operad i the PG operator, we use this operator betwee the operads A ad B ad sice i the PG operator oly + =, we eed to chage each o the operads A ad B to. To chage ad - to, we use the sigle-iput operators SG ad SG respectively. To obtai, we eed to combie the sub-relatios by usig a operator i which is the domiat operad, that is operator PG. Thus, the relatio will be as ollow: A A B A The geeral relatio obtaied will be as the ollowig: (( A B ( A B ( A B (( A A B.( A A B C. The Method o Obtaiig mi To obtai mi we eed the ad relatios whose method o obtaiig were explaied beore. ( A A B.( A A B A Thus, the geeral relatio is: mi (( A A B.( A A B * (( A. B ( A. B D. A Example o Combiatioal Circuits Decoder circuits: These circuits covert the data orm base-3 to base-. D4 ( A B D 3 ( A D2 ( A B D D ( A B D D2 ( A B D3 ( A D4 ( A B B ( A B ( A B B V. THE ADVANTAGES OF DEVELOPING DIGITALIZE SYSTEM ON BASE-3 INSTEAD OF BASE-2 A. Ehacig Addressig Capability, Samplig Accuracy ad Cotrol I we use 8 bits or addressig i the biary logic, we ca 8 oly address 2 = 256 memory uits ollowig the ormula M = 2 i which is the umber o address lies ad M reers to the umber o the addressable uits [5]. However, usig the same umber o address lies i the SADEGH 8 logic, we ca address 3 = 656 memory uits ollowig the ormula M = 3 i which is the umber o the address lies ad m reers to the umber o the addressable uits. Similarly, due to the icrease i the umber o the sigal samplig quatum s i SADEGH, samplig accuracy is ehaced accordigly. As or the ehacemet o cotrol i SADEGH, it should be oted that three processes ca be cotrolled usig a tet, which i biary logic this is limited to two processes usig a bit. B. Represetig Negative Numbers I biary digital systems, to represet egative umbers we use a extra bit that is the result o usig the sig bit or complemetatio. I the SADEGH logic; however, due to the coverage o all the three regios o the positive, zero, ad egative umbers, there is o eed or extra bit. C. Compatibility with the Biary Digital Systems Duo to the complete coverage o Boolea algebra [5] i the SADEGH logic, we will also have the right output or each o the iput ad i the biary systems. Fig. 4. Compatibility with the biary digital systems Fig. 3. The decoder circuit truth table The relatios obtaied rom the above table are as the ollowig: D. Additio ad Subtractio Numbers The result o the additio or subtractio o two umbers o base- will be the same as the result o the additio or subtractio o the two umbers o base-3 i the SADEGH 389

5 Iteratioal Joural o Iormatio ad Electroics Egieerig, Vol. 3, No. 4, July 23 logic. The ollowig is a example: E. Subtractio o Numbers Usig Complemetatio For subtractig two umbers, we irst make a complemet o the subtrahed the add it to the miued. For complemetatio, we chage every to - ad every - to ad we leave the s uchaged. The ollowig example illustrates this: I biary digital systems, to make a complemet, we use a NOT operator plus a adder circuit [5]. The same actio i SADEGH logic is doe oly by usig oe sigle-iput SG operator. VI. CONCLUSIONS The SADEGH three-value logic ca be basis or desigig digital systems due to the kid o relatios amog the operads, complete coverage o the biary base, ad the applicatio o all the three regios o umbers (positive, zero ad egative. I this logic, it is also possible to obtai the right output or ay biary iput. This will make a SADEGH-based desiged system compatible with biary digital systems. O the other had, the smallest memory uit i the biary logic (bit ca take oly the two values or, while the smallest memory uit i the SADEGH logic (tet ca take the three values -,, or that makes it possible to ehace addressig, samplig accuracy, ad cotrol. Also, ewer gates will be required or addig ad subtractig umbers i the complemetatio method. Implicatios or urther studies Simpliyig output relatios usig simpliicatio ormula. Usig decimal umbers i the SADEGH logic to ehace accuracy. Desigig the iteral structure o the gates i the SADEGH logic. Developmet o sequetial circuits. REFERENCES [] M. M. Mao, Digital Desig, Pretice Hall, pp. 27-3, 22. [2] J. Bradt, A Three-Valued Logic or HOL Kaaaskis, Departmet o Computer Sciece. Germay, pp. 3-6, 28. [3] S. Hölldobler ad C. D. P. K. Ramli, Logic Programs uder Three- Valued Lukasiewicz Sematics, Iteratioal Ceter or Computatioal Logic, TU Dresde, 62 Dresde. Germay, pp. 2-4, 27. [4] R. D. Merrill, Terary logic i digital computers, pp. -3, 965. [5] M. M. Mao, Digital Desig, pretice hall, pp. 6-48,