LTCC modules for a multiple 3-bit phase shifter with RF-MEMS-switch integration

Transcription

1 LTCC modules for a multiple 3-bit phase shifter with RF-MEMS-switch integration Thomas Bartnitzek, Edda Müller, VIA electronic GmbH, Hermsdorf, Germany Raymond van Dijk, TNO-DSS, The Hague, Netherlands 1

2 Structure of the presentation requirements layout Paste 2

3 European consortium, consisting of partners: 3

4 EU funded project ARHMS Main goal: electronically steerable antenna system for mobile satellite communication between a moving car and an INMARSAT. Challenge: holding the line, while motion, speed, inclination and cross-country will constantly require reaction. (beam steering of patch antenna) Source: Daimler Chrysler Research 4

5 Beam steering requires 3- bit phase shifters for 45, 90 and 180 LC networks needed for each phase shift in the frequency range of about GHz > printed inductors appear as well feasable, > good capacitors with the calculated values were more critical LTCC test run including : simulation, material investigation, design and layout, RF measurements and data extraction, monitoring, debugging, conclusion for the demonstrator > demonstrator manufacturing 5

6 Initial calculation and simulation of the required networks: capacitors in standard dielectric do not achieve enough capacitance, if small OR they do, but require too much area the higher the area the higher the loss vs. GND wide plates / multiple stacking > more inductance Test layouts 2109 and 2118 (var. 1..3) Include locally higher dielectric efficiency to increase achievable values by: Integration of LTCC tapes with higher k Thick film printing of high dielectric pastes Use of very thin standard dielectrics 6

7 resistors RF-structures schematic of the phase shifter module coverage e.g. cap or glob top high k layer RF-MEMS switch with cap sidewall metallization for solder contacts heat dissipation by thermal vias / spreader cavities for the RF-MEMS chips 7

8 DuPont951 cond 2 traditional structures built up with 951 AT and layers cond 2 cond 1a cond 1 layer 1 layer 2 layer 3 layer 4 structured 40µm stack with thin 951C2 as the capacitive layer, cond 1 layer 1 layer 2 layer 3 layer 4 possible constructions for the layers building the capacitive elements ESL ESL cond 2 cond 1a cond 1 layer 1 layer 2 layer 3 layer 4 high-k-tape between 951AT and layers cond 2 cond 1a high-k-paste between 951AT and layers cond 1 layer 1 layer 2 layer 3 layer 4 structured high-k-tape highk paste 8

9 Design work: * choice of construction * calculation * simulation * comparison of measurements and simulation 2-layer 2-layer series shunt 3-layer 3-layer 9

10 of inductors EM simulation and interface connection Geometrical model in HFSS C p L b L R C p1 C p2 C p3 inductor_std.pjt L 4.58 nh L b C p1 C p2 C p nh 0.42 pf 0.19 pf 0.15 pf C p 0 R 0.47 Ω error < 6% (1-5 GHz) 10

11 impedance [ohm] 100 dielectric constant [-] Lines with different widths 2.5 (2 layer) 4 2 Lines with different widths (2 layer) impedance [ohm] Lines with different widths (3 layer) Lines with different widths (3 layer) Z0 simu eps_eff simu Z0 meas eps_eff simu 0 eps_eff 200meas width [um] eps_eff meas 0 20 Z0 simu width [um] width [um] Z0 meas width [um] Comparison of simulated and measured data dielectric constant [-] Calculation of correlation Extraction of effective dielectric data Detection of repeatable geometric dimensions Tuning of the simulation software 11

12 structures with high-k-paste advantage: local coverage, different thicknesses possible, lower thickness then tape disadvantage: significant surface topology, impairment of RF structures surface topology caused by capacitor paste 12

13 Warping reduction capacitors between 1st and 2nd and layer n and (n-1) significant reduction down to layer thickness surface topology [µm] = f (# of layers) t=40µm w=2,3mm t=40µm w=0,9mm t=50µm w=2,3mm t=50µm w=0,9mm t=60µm w=2,3mm t=60µm w=0,9mm w w 13

14 Summary: high-k-paste symmetrical use required, causes additional effort, extra thickness, cost, yield loss etc. Better results with really needed high k material additional one to be symmetrically - low thickness of paste - small area = phenomena of shrinkage mismatch, but: no significant compensated with firing profile, lamination process variation or type of tape 14

15 structures with high-k-tape in stacks with layout 2118 /2 high-k-tapes series (Electroscience Laboratories Inc.) may be integrated in their corporate as well as in DuPont- and FERRO laminates DuPont 951AT : Samples C s with ESL realized in different combinations ESL : Samples 25, 26 C s with ESL Samples with with ESL and general setup: metallization Au, via diameters 110µm, lines/spaces down to 100/50µ, 15

16 high-k- tape (k=100) semi symmetric stack (n-1)st layer is solid! Semi symmetrical setup Local perforation of 2nd layer in the area of lines and inductors >deformation due to higher shrinkage on top layers low- angle illumination of warped edge due to local shrinkage differences at the edge (ESL41110) opening in the 2 nd layer solid sandwich 16

17 Summary high-k-tape: stacks with 8 layers, high k = layers 2 and 7 advantages: disadvantages: * low warpage values * stretching of layers 2..8 (top layer down during lamination due to lamination into and sintering ) windows of high-k * height / thickness differences * additional layer needs ESL DuPont 17

18 Option thin tape: 951 C2 advantage: disadvantage: * no significant thickness addition * only k = 7.8 of standard 951 * lowest stretching of layers above * solid homogeneous stack * full material compatibility cond 2 cond 1a cond 1 layer 1 structured 40µm layer 2 layer 3 layer 4 18

19 change of dimension [mm] Dimensional change of cavity structures 951 AX, cavity floor = 2 layers 0,050 0,025 0,000-0,025-0,050-0,075-0,100-0,125-0,150 Cavity size after lamination 200 bar number of perforated layers G A B Ax Bx Cx Dx Ex Fx Gx Ay By Cy Dy Ey Fy Gy cavity size: x=3.00mm; y=2.00mm 2-hit-punched in single layers corner radius: 100µm isostatic lamination: dwelling 5min., pressing 10min. Variation of lamination techniques A-G using different materials and setups Extremum of x and y measured at top layer; continous line = x direction, dotted = y 19

20 Summary: passive structures in different material systems - inductors : spiral coils down to 70µm - capacitors : different types with tape and paste cavities for MEMS switches - Rectangular, straight walls, tight gaps round the chip optimized setup and processing for local high-k materials - suitable cofiring condition and process parameters - reduces influences to other components suggestion to build symmetric stacks - is right and logic, but sometimes not useful and / or achievable, causes additional cost and process risks 20

21 future work demonstrator layout based on the extracted results phase shifter manufacturing switch assembly integration into antenna test of the prototypes 21

22 Thank you for your attention! references : I would like to thank all colleagues in the ARHMS consortium for cooperation and the European Commission for financial support in the IST Programme as ARHMS - Advanced RF Subsystems Exploiting High-Power MEMS, IST Data sheets DuPont 951, Du Pont Microcircuit Materials, Data sheets: 41xxx series, Electroscience Laboratories Inc. R. van Dijk; internal documents ARHMS LTCC Test Board Measurements, TNO-FEL The Hague, Netherlands, July 2004 D.F. Williams, R.B. Marks, "Transmission Line Capacitance Measurement", IEEE Microwave and Guided Wave Letters, vol. 1, no. 9, Sept Via Electronic GmbH, "Design Rules for LTCC, DuPont 951System ", revision D, nov.2002 A.H.Feingold, Low K, Low Loss, Low Fire Tape System for Microwave Application, imaps Israel, 2000 M.D. Janezic, J.A. Jargon, Complex Permittivity Determination from Propagation Constant Measurements, IEEE Microwave and Guided Wave Letters, vol. 9, no. 2, Feb