Key Features. Device Application Input Voltage Output Power Topology I/O Isolation NCL30051 NCS1002

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DN00/D 0 V, High Efficiency V LED Driver DESIGN NOTE ircuit Description This Design Note (DN) is an extension to ON Semiconductor s Evaluation Board User s Manual EVBUM09/D and features a 0 V max,

1 DN00/D 0 V, High Efficiency V LED Driver DESIGN NOTE ircuit Description This Design Note (DN) is an extension to ON Semiconductor s Evaluation Board User s Manual EVBUM09/D and features a 0 V max, version of the off-line, NL00 based constant voltage, constant current (V) high efficiency LED driver. The original document features a V max, constant current,. (current settable) LED driver with multiple dimming capabilities and active power factor correction in a two-stage off-line converter utilizing a resonant half-bridge in the main conversion stage. This DN presents a similar version of that design which is suitable for driving LED strings up to 0 V at a max current of up to. This design is suitable for LED street lighting and wall pack lamp applications. The maximum output voltage and output current can be adjusted via resistors R8 and R respectively, shown in the secondary circuit schematic. The detailed circuit operational description can be found in the original mentioned NL00 evaluation board user s manual (EVBUM09/D) and is essentially identical circuit-wise with the exception of the component changes that are indicated in the BOM. The resonant half-bridge transformer design for this DN was merely ratioed from the secondary winding on the original V transformer design to meet the new voltage and current requirements. The primary winding, required inductances, and overall construction are essentially the same. Key Features Input EMI Filter for lass onstant Voltage, onstant urrent Output haracteristic for LED Drive Dimming Features Including Pulse Width and nalog Dimming to 0% Over urrent, Over Voltage and Over Temperature apabilities Typical Efficiencies of 90% Table. DEVIE DETILS Device pplication Input Voltage Output Power Topology I/O Isolation NL00 NS00 LED Lighting (Wall Pack/Street Lights) Table. OTHER SPEIFITIONS 900 Vac 0 W Nominal Boost PF Resonant HB Yes kv Output Output Voltage 0 V max Ripple 0 m max Nominal urrent Max urrent () Min urrent 0 PF (Yes/No) Minimum Efficiency 88% Inrush Limiting/Fuse Operating Temperature Range ooling Method/Supply Orientation Signal Level ontrol Yes NT Inrush Thermistor. Fuse 0 to 0 onvection/n Yes (Dimming ontrols) Unit Others PWM, Bi-level and nalog LED Dimming Input Options Semiconductor omponents Industries, LL, 0 January, 0 Rev. Publication Order Number: DN00/D

2 DN00/D SHEMTI PRIMRY SETION HV OUT HV IN D N0 JMP T 0. F 00 V Q NDD0N0ZT D MURS0 L, 00 H JMP D MUR0 F. In R 0k x RB 0. X L 0. X T TH DD MR00 x 0. F 00 V Q TO0 0 R 0 k R R R 80 k 8 F 00 V R 80 k R Open NDD0N0ZT QB 0. R Drive Ground R 0 k 8 F 00 V 0. F 00 V D8 MUR0 R D9 ZB MMSZ8B R8. k Z R MR00 D0 8 0, Primary Ground Plane D MUR0. nf R R0. k U NL00 0. k R9 R.M 0.W U D PWM Dim Q MMBT0LTG 9 MR00 R0. k, 0. V PS 0 R R8.M 0.W R. k Q8 MMBT0LTG Q R. k MMBT 90 R9. k F 0 80 pf U V Feedback D MMSD 8B.8 nf 00 pf nf R k PS NOTES:. Q, QB are DPak devices. L is oilcraft E9L (.9 mh). Heavy schematic lines are recommended ground plane areas blue is power ground; black is signal/logic ground; green is drive ground.. NL00 signal grounds and associated components should be single-point connected to the power and drive ground planes as shown in schematic.. L and T are PQ00 cores with pin bobbins.. Q requires small heatsink.. 0,, and Q/R0 should be as close to associated U pins as possible. 0 F V Logic/Signal Ground Figure. NL00 0 W LED Driver

3 DN00/D SHEMTI SEONDRY SETION T Xfmr 0 D MBRF0H0. F 00 V x F 00 V R0 Q MJDG V = V R k,. k R I S V Feedback k 0. F R F 00 V urrent Sense Sample & Hold LED node J LED athode D MMSD8 D MMSD8 Z MMSZB Q9 MMBT F R k 8 UB U NS00 I S Vref R. k R. k. V nf R. k To Primary Side Ground Plane Internal to U nf PWM Dim. nf R9. k V S R8. k R9.9 k R0. k R. k F R 00 Q N00KTG V R 0 R 0 R 0 Q0 MMUNL Q MMBT0LTG R J R8 R NOTES:. D requires small heatsink.. Heavy schematic lines are recommended ground plane areas. 0 V max Output PWM In 0000 Hz PWM Out Jumper if DIM ard Not Used JMP V In V ref In nalog Dim Out Dimming ontrol Options ard P ommon Figure. NL00 LED Driver V Secondary Sensing and PWM Dimming Input Option

4 Performance Parameters: Load is two Luminous Devices LED modules in series Table. TEST DT DN00/D TEST DT V IN P IN PF %THD I OUT V OUT P OUT Efficiency % % % % % % MGNETIS DESIGN DT SHEET Project/ustomer: ON Semiconductor NL00 0 V/ V LED driver Part Description: Resonant Half-bridge Transformer 0 W, khz, 0 V/ output Schematic ID: T ore Type: PQ0/0, Ferroxcube 9 or equivalent material Primary Inductance: mh minimum Leakage Inductance: 900 H nominal (resonant half-bridge, leakage inductance is Lr) Bobbin Type: PQ0/0 pin P mount bobbin Windings (in order): Winding #/Type Primary Winding () Secondary Winding (, 0,) Turns/Material/Gauge/Insulation Data 9 turns of #8 HN magnet wire over layers, turns per layer approx. Self-leads to pins. Insulate with Mylar tape sufficient for kv Hipot to next winding. turns of X # magnet wire bifilar wound over or layers. Self-leads to pins per schematic below. Final insulate with Mylar tape. NOTE: The critical parameter is to achieve a leakage inductance of 900 H with a min primary inductance of mh. The overall turns can be increased or decreased to achieve this as long as the turns ratio remains 8.:. Vacuum varnish assembly. Hipot:,000 V from Primary to Secondary ( minute) Schematic Lead Breakout/Pinout Bottom View Primary Secondary 0 0

5 DN00/D ON Semiconductor and are registered trademarks of Semiconductor omponents Industries, LL (SILL). SILL owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. listing of SILL s product/patent coverage may be accessed at SILL reserves the right to make changes without further notice to any products herein. SILL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SILL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SILL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SILL does not convey any license under its patent rights nor the rights of others. SILL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SILL product could create a situation where personal injury or death may occur. Should Buyer purchase or use SILL products for any such unintended or unauthorized application, Buyer shall indemnify and hold SILL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SILL was negligent regarding the design or manufacture of the part. SILL is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLITION ORDERING INFORMTION LITERTURE FULFILLMENT: Literature Distribution enter for ON Semiconductor P.O. Box, Denver, olorado 80 US Phone: 0 or Toll Free US/anada Fax: 0 or 8008 Toll Free US/anada orderlit@onsemi.com N. merican Technical Support: Toll Free US/anada Europe, Middle East and frica Technical Support: Phone: Japan ustomer Focus enter Phone: 8800 ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative DN00/D

1. DEFINE THE SPECIFICATION 2. SELECT A TOPOLOGY

1. DEFINE THE SPECIFICATION 2. SELECT A TOPOLOGY How to Choose for Design This article is to present a way to choose a switching controller for design in the s Selector Guide SGD514/D from ON Semiconductor. (http://www.onsemi.com/pub/collateral/sgd514d.pdf)