MC1496, MC1496B. Balanced Modulators/ Demodulators

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M9, M9B Balanced Modulators/ Demodulators SOI D SUFFIX ASE 75A These devices were designed for use where the output voltage is a product of an input voltage (signal) and a switching function

1 M9, M9B Balanced Modulators/ Demodulators SOI D SUFFIX ASE 75A These devices were designed for use where the output voltage is a product of an input voltage (signal) and a switching function (carrier). Typical applications include suppressed carrier and amplitude modulation, synchronous detection, FM detection, phase detection, and chopper applications. See ON Semiconductor Application Note AN53 for additional design information. PDIP P SUFFIX ASE Features Excellent arrier Suppression 5 db MHz 5 db MHz Adjustable Gain and Signal Handling Balanced s and Outputs High ommon Mode Rejection 5 db Typical This Device ontains Active Transistors PbFree Package is Available* PIN ONNETIONS Signal Gain Adjust 2 3 N/ Gain Adjust Signal Bias Output Output N/ arrier N/ N/ 7 arrier Semiconductor omponents Industries, LL, 2 October, 2 Rev. Publication Order Number: M9/D

2 M9, M9B I = 5 khz I S = Hz Log Scale Id 2 I = 5 khz, I S = Hz Figure. Suppressed arrier Output Waveform 99 khz 5 khz 5 khz Figure 2. Suppressed arrier Spectrum. I = 5 khz I S = Hz Linear Scale.. 2. I = 5 khz I S = Hz 99 khz 5 khz 5 khz Figure 3. Amplitude Modulation Output Waveform Figure. AmplitudeModulation Spectrum MAXIMUM RATINGS (T A = 25, unless otherwise noted.) Rating Symbol Value Unit Applied Voltage (VV, VV, VV, VV, VV, VV, VV, VV, V2V5, V3V5) V 3 Vdc Differential Signal V V V V +5. ±(5+I5R e ) Maximum Bias urrent I 5 ma Thermal Resistance, JunctiontoAir Plastic Dual InLine Package Operating Ambient Temperature Range M9 M9B Vdc R JA /W T A to +7 to +5 Storage Temperature Range T stg 5 to +5 Electrostatic Discharge Sensitivity (ESD) Human Body Model (HBM) Machine Model (MM) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating onditions is not implied. Extended exposure to stresses above the Recommended Operating onditions may affect device reliability. ESD 2 V 2

3 M9, M9B ELETRIAL HARATERISTIS ( = Vdc, =. Vdc, I5 =. madc, =, R e =, T A = T low to T high, all input and output characteristics are singleended, unless otherwise noted.) (Note ) haracteristic Fig. Note Symbol Min Typ Max Unit arrier Feedthrough V = mvrms sine wave and offset adjusted to zero V = 3 mvpp square wave: offset adjusted to zero offset not adjusted arrier Suppression f S = khz, 3 mvrms f = 5 khz, mvrms sine wave f = MHz, mvrms sine wave Transadmittance Bandwidth (Magnitude) ( = 5 ) arrier Port, V = mvrms sine wave f S = Hz, 3 mvrms sine wave Signal Port, = 3 mvrms sine wave V =.5 Vdc f = Hz f = MHz f = Hz f = Hz FT 5 2 BW 3dB Signal Gain ( = mvrms, f = Hz; V =.5 Vdc) 3 A VS V/V SingleEnded Impedance, Signal Port, f = 5. MHz Parallel Resistance Parallel apacitance SingleEnded Output Impedance, f = MHz Parallel Output Resistance Parallel Output apacitance Bias urrent 7 I I I ;I I I bs 2 b 2 Offset urrent I ios = II; I io = II Average Temperature oefficient of Offset urrent (T A = 55 to +5 ) r ip c ip r op c oo I bs I b 7 I ios I io Vrms mvrms db k MHz k pf k pf 7 T Iio 2. na/ Output Offset urrent (II9) 7 I oo A Average Temperature oefficient of Output Offset urrent (T A = 55 to +5 ) 7 T Ioo 9 na/ ommonmode Swing, Signal Port, f S = Hz 9 MV 5. Vpp ommonmode Gain, Signal Port, f S = Hz, V =.5 Vdc 9 AM 5 db ommonmode Quiescent Output Voltage (Pin or Pin 9) V out. Vpp Differential Output Voltage Swing apability V out. Vpp Power Supply urrent I +I Power Supply urrent I 7 I I EE D Power Dissipation 7 5 P D 33 mw. T low = for M9 T high = +7 for M9 = for M9B = +5 for M9B A A madc 3

4 M9, M9B GENERAL OPERATING INFORMATION arrier Feedthrough arrier feedthrough is defined as the output voltage at carrier frequency with only the carrier applied (signal voltage = ). arrier null is achieved by balancing the currents in the differential amplifier by means of a bias trim potentiometer (R of Figure 5). arrier Suppression arrier suppression is defined as the ratio of each sideband output to carrier output for the carrier and signal voltage levels specified. arrier suppression is very dependent on carrier input level, as shown in Figure 22. A low value of the carrier does not fully switch the upper switching devices, and results in lower signal gain, hence lower carrier suppression. A higher than optimum carrier level results in unnecessary device and circuit carrier feedthrough, which again degenerates the suppression figure. The M9 has been characterized with a mvrms sinewave carrier input signal. This level provides optimum carrier suppression at carrier frequencies in the vicinity of 5 khz, and is generally recommended for balanced modulator applications. arrier feedthrough is independent of signal level,. Thus carrier suppression can be maximized by operating with large signal levels. However, a linear operating mode must be maintained in the signalinput transistor pair or harmonics of the modulating signal will be generated and appear in the device output as spurious sidebands of the suppressed carrier. This requirement places an upper limit on inputsignal amplitude (see Figure 2). Note also that an optimum carrier level is recommended in Figure 22 for good carrier suppression and minimum spurious sideband generation. At higher frequencies circuit layout is very important in order to minimize carrier feedthrough. Shielding may be necessary in order to prevent capacitive coupling between the carrier input leads and the output leads. Signal Gain and Maximum Level Signal gain (singleended) at low frequencies is defined as the voltage gain, A V o where r VS V R S e 2r e 2 mv e I5(mA) A constant dc potential is applied to the carrier input terminals to fully switch two of the upper transistors on and two transistors off (V =.5 Vdc). This in effect forms a cascode differential amplifier. Linear operation requires that the signal input be below a critical value determined by R E and the bias current I5. I5 R E (Volts peak) Note that in the test circuit of Figure, corresponds to a maximum value of. V peak. ommon Mode Swing The commonmode swing is the voltage which may be applied to both bases of the signal differential amplifier, without saturating the current sources or without saturating the differential amplifier itself by swinging it into the upper switching devices. This swing is variable depending on the particular circuit and biasing conditions chosen. Power Dissipation Power dissipation, P D, within the integrated circuit package should be calculated as the summation of the voltagecurrent products at each port, i.e. assuming V = V, I5 = I = I and ignoring base current, P D = 2 I5 (V V) + I5)V5 V where subscripts refer to pin numbers. Design Equations The following is a partial list of design equations needed to operate the circuit with other supply voltages and input conditions. A. Operating urrent The internal bias currents are set by the conditions at Pin 5. Assume: I5 = I = I, I B I for all transistors then : R5 V 5 I5 where: R5 is the resistor between where: Pin 5 and ground where: =.75 at T A = +25 The M9 has been characterized for the condition I 5 =. ma and is the generally recommended value. B. ommonmode Quiescent Output Voltage V = V = V+ I5 Biasing The M9 requires three dc bias voltage levels which must be set externally. Guidelines for setting up these three levels include maintaining at least 2. V collectorbase bias on all transistors while not exceeding the voltages given in the absolute maximum rating table; 3 Vdc [(V, V) (V, V)] 2 Vdc 3 Vdc [(V, V) (V, V)] 2.7 Vdc 3 Vdc [(V, V) (V5)] 2.7 Vdc The foregoing conditions are based on the following approximations: V = V, V = V, V = V

5 M9, M9B Bias currents flowing into Pins,, and are transistor base currents and can normally be neglected if external bias dividers are designed to carry. ma or more. Transadmittance Bandwidth arrier transadmittance bandwidth is the 3. db bandwidth of the device forward transadmittance as defined by: 2 i o (each sideband) v s (signal) V o Signal transadmittance bandwidth is the 3. db bandwidth of the device forward transadmittance as defined by: 2S i o (signal) v s (signal) V c.5 Vdc, V o oupling and Bypass apacitors apacitors and 2 (Figure 5) should be selected for a reactance of less than 5. at the carrier frequency. Output Signal The output signal is taken from Pins and either balanced or singleended. Figure shows the output levels of each of the two output sidebands resulting from variations in both the carrier and modulating signal inputs with a singleended output connection. Negative Supply should be dc only. The insertion of an RF choke in series with can enhance the stability of the internal current sources. Signal Port Stability Under certain values of driving source impedance, oscillation may occur. In this event, an R suppression network should be connected directly to each input using short leads. This will reduce the Q of the sourcetuned circuits that cause the oscillation. Signal (Pins and ) 5 pf An alternate method for lowfrequency applications is to insert a resistor in series with the input (Pins, ). In this case input current drift may cause serious degradation of carrier suppression. TEST IRUITS arrier 2. I9 I V M9 Modulating Signal k k k I5. k I R V arrier Null. Vdc Figure 5. arrier Rejection and Suppression R e Vdc + V o V o Z in NOTE: R e = V + M9 5. Vdc. k Shielding of input and output leads may be needed to properly perform these tests. Figure. Output Impedance + V o Z out V o I7 I I I 2 R e = M9 5 I I I9 2. k. Vdc Figure 7. Bias and Offset urrents 3. k Vdc arrier. V Modulating Signal k 5 k 5 k M9 5 arrier Null. Vdc Figure. Transconductance Bandwidth V R e. k Vdc 2. k V o V o 5

6 M9, M9B R e =.5 V M Vdc. k Vdc + V o V o A M 2 log V o 5.5 V + 2 R e = M9 5 I5 =. ma. Vdc 3. k Vdc + V o V o Figure 9. ommon Mode Gain Figure. Signal Gain and Output Swing TYPIAL HARATERISTIS V O, OUTPUT AMPLITUDE OF EAH SIDEBAND (Vrms) Typical characteristics were obtained with circuit shown in Figure 5, f = 5 khz (sine wave), V = mvrms, f S = Hz, = 3 mvrms, T A = 25, unless otherwise noted. Signal = mv mv 3 mv 2 mv mv 5 5 V, ARRIEEVEL (mvrms) Figure. Sideband Output versus arrier Levels 2 Ω) r ip, PARALLEL INPUT RESISTANE (k. M r ip r ip 5. 5 f, FREQUENY (MHz) Figure. SignalPort ParallelEquivalent Resistance versus Frequency c ip, PARALLEL INPUT APAITANE (pf) f, FREQUENY (MHz) Figure 3. SignalPort ParallelEquivalent apacitance versus Frequency 5 r op, PARALLEL OUTPUT RESISTANE (k Ω) 2 c op. f, FREQUENY (MHz) Figure. SingleEnded Output Impedance versus Frequency r op c op, PARALLEL OUTPUT APAITANE (pf)

7 M9, M9B TYPIAL HARATERISTIS (continued) Typical characteristics were obtained with circuit shown in Figure 5, f = 5 khz (sine wave), V = mvrms, f S = Hz, = 3 mvrms, T A = 25, unless otherwise noted. 2, TRANSADMITTANE (mmho) γ Signal Port Side Band Sideband Transadmittance 2 I out (Each Sideband) V (Signal) V out in Signal 2 I Port Transadmittance out V in V out V.5 Vdc. f, ARRIER FREQUENY (MHz) Figure 5. Sideband and Signal Port Transadmittances versus Frequency, ARRIER SUPPRESION (db) M9 (7 ) T A, AMBIENT TEMPERATURE ( ) Figure. arrier Suppression versus Temperature A VS, SINGLE-ENDED VOLTAGE GAIN (db) = (Standard R e = Test ircuit) = R e = 2. k = R e = 5 V =.5 Vdc = 5 R e = A V R e 2r e.. f, FREQUENY (MHz) SUPPRESSION BELOW EAH FUNDAMENTAL ARRIER SIDEBAND (db) f f, ARRIER FREQUENY (MHz) f 3f 5 Figure 7. SignalPort Frequency Response Figure. arrier Suppression versus Frequency V FT, ARRIER OUTPUT VOLTAGE (mvrms) f, ARRIER FREQUENY (MHz) 5 SUPPRESSION BELOW EAH FUNDAMENTAL ARRIER SIDEBAND (db) f ± 3f S f ± 2f S 2, INPUT SIGNAL AMPLITUDE (mvrms) Figure 9. arrier Feedthrough versus Frequency Figure 2. Sideband Harmonic Suppression versus Signal Level 7

8 M9, M9B SUPPRESSION BELOW EAH FUNDAMENTAL ARRIER SIDEBAND (db) f ± f S 2f ± f S 2f ± 2f S f, ARRIER FREQUENY (MHz) Figure 2. Suppression of arrier Harmonic Sidebands versus arrier Frequency 5, ARRIER SUPPRESSION (db) f = MHz f = 5 khz V, ARRIER INPUT LEVEL (mvrms) Figure 22. arrier Suppression versus arrier Level 5 The M9, a monolithic balanced modulator circuit, is shown in Figure 23. This circuit consists of an upper quad differential amplifier driven by a standard differential amplifier with dual current sources. The output collectors are crosscoupled so that fullwave balanced multiplication of the two input voltages occurs. That is, the output signal is a constant times the product of the two input signals. Mathematical analysis of linear ac signal multiplication indicates that the output spectrum will consist of only the sum and difference of the two input frequencies. Thus, the device may be used as a balanced modulator, doubly balanced mixer, product detector, frequency doubler, and other applications requiring these particular output signal characteristics. The lower differential amplifier has its emitters connected to the package pins so that an external emitter resistance may be used. Also, external load resistors are employed at the device output. Signal Levels The upper quad differential amplifier may be operated either in a linear or a saturated mode. The lower differential amplifier is operated in a linear mode for most applications. For lowlevel operation at both input ports, the output signal will contain sum and difference frequency arrier Signal Bias 5 () V (+) () (+) Figure 23. ircuit Schematic OPERATIONS INFORMATION () (+) V o, Output 2 Gain Adjust 3 (Pin numbers per G package) components and have an amplitude which is a function of the product of the input signal amplitudes. For highlevel operation at the carrier input port and linear operation at the modulating signal port, the output signal will contain sum and difference frequency components of the modulating signal frequency and the fundamental and odd harmonics of the carrier frequency. The output amplitude will be a constant times the modulating signal amplitude. Any amplitude variations in the carrier signal will not appear in the output. The linear signal handling capabilities of a differential amplifier are well defined. With no emitter degeneration, the maximum input voltage for linear operation is approximately 25 mv peak. Since the upper differential amplifier has its emitters internally connected, this voltage applies to the carrier input port for all conditions. Since the lower differential amplifier has provisions for an external emitter resistance, its linear signal handling range may be adjusted by the user. The maximum input voltage for linear operation may be approximated from the following expression: V = (I5) (R E ) volts peak. This expression may be used to compute the minimum value of R E for a given input voltage amplitude.. R 2 R e 3 L 5 V. arrier M9 Modulating Signal k k k I5. k arrier Null. Vdc Figure 2. Typical Modulator ircuit Vdc +V o V o

9 M9, M9B Table. Voltage Gain and Output Frequencies arrier Signal (V ) Approximate Voltage Gain Output Signal Frequency(s) Lowlevel dc V 2(R E 2r e ) KT q f M Highlevel dc Lowlevel ac 2 2 R E 2r e V (rms) KT q (R E 2r e ) f M f ± f M Highlevel ac.37 R E 2r e f ± f M, 3f ± f M, 5f ± f M, Lowlevel Modulating Signal, V M, assumed in all cases. V is arrier Voltage. 3. When the output signal contains multiple frequencies, the gain expression given is for the output amplitude ofeach of the two desired outputs, f + f M and f f M.. All gain expressions are for a singleended output. For a differential output connection, multiply each expression by two. 5. = Load resistance.. R E = Emitter resistance between Pins 2 and r e = Transistor dynamic emitter resistance, at 25 ; re 2 mv I 5 (ma). K = Boltzmann s onstant, T = temperature in degrees Kelvin, q = the charge on an electron. The gain from the modulating signal input port to the output is the M9 gain parameter which is most often of interest to the designer. This gain has significance only when the lower differential amplifier is operated in a linear mode, but this includes most applications of the device. As previously mentioned, the upper quad differential amplifier may be operated either in a linear or a saturated mode. Approximate gain expressions have been developed for the M9 for a lowlevel modulating signal input and the following carrier input conditions: ) Lowlevel dc 2) Highlevel dc 3) Lowlevel ac ) Highlevel ac These gains are summarized in Table, along with the frequency components contained in the output signal. APPLIATIONS INFORMATION Double sideband suppressed carrier modulation is the basic application of the M9. The suggested circuit for this application is shown on the front page of this data sheet. In some applications, it may be necessary to operate the M9 with a single dc supply voltage instead of dual supplies. Figure 25 shows a balanced modulator designed for operation with a single Vdc supply. Performance of this circuit is similar to that of the dual supply modulator. AM Modulator The circuit shown in Figure 2 may be used as an amplitude modulator with a minor modification. All that is required to shift from suppressed carrier to AM operation is to adjust the carrier null potentiometer for the proper amount of carrier insertion in the output signal. However, the suppressed carrier null circuitry as shown in Figure 2 does not have sufficient adjustment range. Therefore, the modulator may be modified for AM operation by changing two resistor values in the null circuit as shown in Figure 27. Product Detector The M9 makes an excellent SSB product detector (see Figure 2). This product detector has a sensitivity of 3. V and a dynamic range of 9 db when operating at an intermediate frequency of 9. MHz. The detector is broadband for the entire high frequency range. For operation at very low intermediate frequencies down to 5 khz the. capacitors on Pins and should be increased to.. Also, the output filter at Pin can be tailored to a specific intermediate frequency and audio amplifier input impedance. As in all applications of the M9, the emitter resistance between Pins 2 and 3 may be increased or decreased to adjust circuit gain, sensitivity, and dynamic range. This circuit may also be used as an AM detector by introducing carrier signal at the carrier input and an AM signal at the SSB input. The carrier signal may be derived from the intermediate frequency signal or generated locally. The carrier signal may 9

10 M9, M9B be introduced with or without modulation, provided its level is sufficiently high to saturate the upper quad differential amplifier. If the carrier signal is modulated, a 3 mvrms input level is recommended. Doubly Balanced Mixer The M9 may be used as a doubly balanced mixer with either broadband or tuned narrow band input and output networks. The local oscillator signal is introduced at the carrier input port with a recommended amplitude of mvrms. Figure 29 shows a mixer with a broadband input and a tuned output. Frequency Doubler The M9 will operate as a frequency doubler by introducing the same frequency at both input ports. Figures 3 and 3 show a broadband frequency doubler and a tuned output very high frequency (VHF) doubler, respectively. Phase Detection and FM Detection The M9 will function as a phase detector. Highlevel input signals are introduced at both inputs. When both inputs are at the same frequency the M9 will deliver an output which is a function of the phase difference between the two input signals. An FM detector may be constructed by using the phase detector principle. A tuned circuit is added at one of the inputs to cause the two input signals to vary in phase as a function of frequency. The M9 will then provide an output which is a function of the input signal frequency. TYPIAL APPLIATIONS 2.3 k Vdc V arrier mvrms Modulating Signal 3 mvrms arrier Null 5 k + 5 V k V + k 3. k 3. k 2 3 M9 5 k. DSB Output V. arrier Modulating Signal 5 R arrier Null k k k. 2 R e M9 5 I5. Vdc Vd k Figure 25. Balanced Modulator ( Vdc Single Supply) Figure 2. Balanced ModulatorDemodulator V. arrier Modulating Signal k arrier Adjust. 2 R e 3 M k. Vdc Vdc +V o V o arrier 3 mvrms SSB k 2 3. k 3. k 3 M9 5 k Vdc.5 AF. Outp.5.5 Figure 27. AM Modulator ircuit Figure 2. Product Detector ( Vdc Single Supply)

11 M9, M9B.. Local 2 3 Oscillator 5 mvrms. M9 RF k 5 5 k k pf. k Null Adjust. Vdc L = Turns AWG No. 2 Enameled Wire, Wound on Micrometals Type Toroid ore. +. Vdc RF H. 9.5 L Figure 29. Doubly Balanced Mixer (Broadband s, 9. MHz Tuned Output) 9. MHz Output = 5 9 pf 5 mvrms 2 5 Vdc Max k k 5 k Balance Vdc 5 Vdc 2 3 M9 Figure 3. LowFrequency Doubler 5 I5. Vdc. k Vdc Outp. 5 MHz Balance k k 5 k M9. Vdc pf R F. H 5. k V + +. Vdc L nh. pf 3 MHz Output = 5. pf L = Turn AWG No. Wire, 7/32 ID Figure 3. 5 to 3 MHz Doubler AMPLITUDE (f 2f S ) (f ) (f + 2f ) S (f f S ) (f + f S ) (2f 2f S ) (2f 2f S ) (2f ) (2f + 2f S ) (2f + 2f S ) (3f 2f S ) (3f f S ) (3f ) (3f + f S ) (3f + 2f S ) Frequency Balanced Modulator Spectrum DEFINITIONS f f S f ± f S arrier Fundamental Modulating Signal Fundamental arrier Sidebands f ± nf S nf nf ± nf S Fundamental arrier Sideband Harmonics arrier Harmonics arrier Harmonic Sidebands

12 M9, M9B ORDERING INFORMATION M9D M9DG Device Package Shipping SOI SOI (PbFree) 55 Units/Rail M9DR2 M9DR2G M9P M9PG M9P M9PG M9BD M9BDG M9BDR2 M9BDR2G SOI SOI (PbFree) PDIP PDIP (PbFree) PDIP PDIP (PbFree) SOI SOI (PbFree) SOI SOI (PbFree) 25 Tape & Reel 25 Units/Rail 55 Units/Rail 25 Tape & Reel M9BP M9BPG PDIP PDIP (PbFree) 25 Units/Rail For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD/D. MARKING DIAGRAMS SOI D SUFFIX ASE 75A PDIP P SUFFIX ASE M9DG AWLYWW M9BDG AWLYWW M9P AWLYYWWG M9BP AWLYYWWG A WL YY, Y WW G = Assembly Location = Wafer Lot = Year = Work Week = PbFree Package

13 M9, M9B PAKAGE DIMENSIONS SOI ASE 75A3 ISSUE H T SEATING PLANE G A D PL 7 B K P 7 PL.25 (.) M T B S A S.25 (.) M B M NOTES:. DIMENSIONING AND TOLERANING PER ANSI Y.5M, ONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INLUDE MOLD PROTRUSION.. MAXIMUM MOLD PROTRUSION.5 (.) PER SIDE. 5. DIMENSION D DOES NOT INLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.7 (.5) TOTAL IN EXESS OF THE D DIMENSION AT MAXIMUM MATERIAL ONDITION. MILLIMETERS INHES R X 5 F DIM MIN MAX MIN MAX A B D M J F G.27 BS.5 BS J K M 7 7 P R SOLDERING FOOTPRINT* X.5 7X 7. X PITH DIMENSIONS: MILLIMETERS *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 3

14 M9, M9B PDIP ASE ISSUE P 7 B NOTES:. DIMENSIONING AND TOLERANING PER ANSI Y.5M, ONTROLLING DIMENSION: INH. 3. DIMENSION L TO ENTER OF LEADS WHEN FORMED PARALLEL.. DIMENSION B DOES NOT INLUDE MOLD FLASH. 5. ROUNDED ORNERS OPTIONAL. T N SEATING PLANE A INHES MILLIMETERS DIM MIN MAX MIN MAX A B F L D F G. BS 2.5 BS H J K K J L M H G D PL M N (.5) M M9/D

PIN CONNECTIONS Figure 1. Suppressed Carrier Output Waveform Waveform

PIN CONNECTIONS Figure 1. Suppressed Carrier Output Waveform Waveform These devices were designed for use where the output voltage is a product of an input voltage (signal) and a switching function (carrier). Typical applications include suppressed carrier and amplitude