TRIGGER CIRCUIT. J! λ, FEATURES

Transcription

1 TRIGGER CIRCUIT DESC RIPTION FEATURES Th e is α 50 MHz trigge r circuit. It can " 50 MH z operation be used by itself or in conjunction with the trigger am plifier, channel switch and peak to peak " ECL in put and output levels (slope in put is T 2 L) auto I.C. " Trigger slope select " Compatible with the trigger amplifier, channel switch BLOCK DIAGRAM ν« NC +5 NC NC NC SLO PE 1 TR IGGER - 1q 11 TR IGG ER TR IGGER AMP TRIGG ER COMPA RATO R OUT & S LO PE SELE CTOR GAT E LATCH TRIGGER + 1 El GAIN = 2.5 J! λ, O FFSET 2 FREE RUN 16 ARM LATCH HO L DO FF ---~ 10 J:r GAT E _' ARM 4 HO L DO FF COMPA D_ R ATO R GATE SCHM ITT EN D SWEEP 6

2 ABSO LU TE MAXIMUMS cc (Pin 5) olts Input oltage (Α 11 Inputs) olts to cc Storage Temperature (T SG ) C to 125 C Operating Ambient Temperature (TA) C to +75 C M aximum Power Dissipation (Ρρ) mw Derating Factor (Above 70 C Ambient) mw/ C ΝΟΤΕ 1 : Maximum Die Temperature NOT Το Exceed 125 C. NOTE 2 : The Trigger Out (P in 11) is NOT specifie d herein. It thas the following characte ristics : - The Gain f rom the Trigger Inputs to Pin 11 is Pin 11 output range is ECL and - Phase, relative to the Trigger Inputs depends on Slope setting. PIN CONNE CTIONS Slope in input 1 Ο 16 Free run i np ut Offset 2 15 NC Gate Output 14 Trigge r - input Gate output 4 1 Trigger + input cc(5 ) 5 12 NC End sweep input 6 11 Trigger outpu t NC 7 10 Holdoff input Ground 8 9 NC

3 ELECTRICAL CHARACTER ISTICS PARAMETER Ι PIN Ι ΜΙΝ Ι ΜΑΧ Ι UN ITS Power Supply Current (note 4) ma + Slope, + Trigger Input Bias Current AA (note 5) + Slope, - Trigger Input Bias Current IAA (note 5) + Slope, Trigger Input Offset Current (+ 1, μα Trigger In put Bias Current Less-Trigger 14 Input Bias Cu rrent) (computed) - Slope, + Trigger In put Bias Current Ι 100 μα (note 6) - Slope, - Trigger In put Bias Current μα (note 6) - Slope, Trigger In put Offset Curre nt ( AA Trigger Input Bias Current Less-Trigger Input Bias Current (computed) Hold-Off In put Current (note 4) μα End Sweep Input Current (Note 1) (note 4) AA Free Run Input Current (note 7) AA Slope In Input Current ( note 8) ma Slope In Input Current (note 9) 1 Ι -40 Ι 40 Ι μα

4 ELECTRICAL CH ARACTER ISTICS (cont) PARAMETER PIN CO NDITIONS Ι ΜΙΝ Ι ΜΑΧ UNITS Gate Out (ο r,) H igh oltage Gate Out Low oltage (OL) Gate Out Hig h oltage (οι,) Gate Out Low oltage (OL) Ιοι, = - ma, Perform Steps 1 through of the 4.0 Ι 4. ~ Trut h Table, then measure (ignore Note 2) Ιοι = 1 ma, Perform Steps 17 throug h 19 of the.2.5 ~ Trut h Ta ble, then measure (Ignore Note 2) 4 Ιοιι = - ma, Perfo rm Steps 17 through 19 of the Truth Ta ble, then meas ure (Ignore Note 2) 1 4 Ιοι = -1 ma, Perform Steps 1 through of the.2.5 ~ Truth Table, then measure (Ignore Note 2) + Trigger Absolute Offset 1, Perform Steps 1 through 4 of Table 1 repeatedly, adjusting the input 1 and 0 levels independently until the arm and trigge r thresholds are determined. The + Trigger Absolute Offset = ( Trigger - Arm)/2 -.8 olts. + Slope Hysteresis 1, 14 Use data obtained in + trigger absolute offset H ysteresis = Trigger - Arm m - Trigger Absolute Offset 1 1, Perform Steps 1 th roug h 4 of Table 2 repeatedly, m 14 adjusting th e input 1 and 0 levels independ ently until th e arm and trigger t hr esholds a re dete rmined. The - Trigger Absolute Offset = (Arm + Trigger)/2 -.8 olts. - Slope Hysteresis 1, ( U se data obtained in - trigger absolute offset 25 Ι Hysteresis = Arm - Trigger m + Trigger Slope In, - Trigger Slope Offset 1, (Offset = (+Trigger Slope Absolute Offset less -40 ~ ~ -T rigger Slope Absolute Offset) m' Propagation Delay (ΤΡρ + ), See Figure , 14 ns 'Adju stable to ±4 m with offset adjust (P in 2), with an offset range of 0.5 to 4.5 olts.

5 TRUTH TABLE (See Note ) INPUTS Step Functio n Slope End Swee p Hol dof + ΙΝ -IN Free Ru n Gate Gate Pin 1 Pin 6 Pin 10 Pin 1 Pin 14 Pin 16 Pin Pin 4 Notes (Τ2L) (ECL) (ECL) 1 ~ RE S ET Οε 1 α 1 α Οα 1 α Ob OL OL Power Su pply Pin 5+5 P in 8 Gnd. 2 ARM Oc Οα Οα Οα 1 α Ob OL OH Oc 1 Οα Ι Οα Ι 1 α. Ι Οα Ι Ob Ι ΟΝ Ι OL 4 ~ LATCH Οε Οα Οα Οα Ι 1 α Ι Ob Ι OH I OL INPUT OLTAG E LEEL CODI NG 5 RE SET 0c Ι 1 α Οα Οα Ι 1 α Ob ~ OH 0L Ι Οα.5 Ι 61 RESET 0c Ι 1 α Ι 1 α Ι Οα Ι 1 α Ι Ob Ι OL Ι OH 7 ARM Oc Οα Οα Οα 1 α Ob OL OH 8 DISA RM Οε Οα 1 α Οα 1 α Ob OL OH 9 DISARM Οε 1 α 1 α Οα 1 α Ob OL OH 10 LATCH Oc Οα 1 α Οα 1 α O b O L OH 11 + Trigger Oc Οα 1 α 1 α Οα Ob OH OL Οε α OUTPUT OLTAGE LEEL CODI NG OL.2 to.5 12 LATCH Oc Οα 1 α Οα 1 α Ob OH OL OH 4.0 to 4. 1 RESET 1 b 1 α 1 α Οα 1 α Ob OL OH (See Note #2) 14 ARM 1 b Οα Οα 1 α Οα Ob OL OH 15 - Trigger 1 b Οα Οα Οα 1 α Ob OH OL 16 LATCH1 b Οα Οα 1 α Οα Ob OH OL 17 RESET 1 b 1 α 1 α 1 α Οα Ob OL OH 18 ARM 1 b Οα 1 α Οα 1 α Ob OL OH 19 TRIGGER 1 b Οα Οα Οα 1 α Ob OL OH 20 FREE RUN 1 b Οα Οα Οα 1 α 1 α Ι νοη Ι OL

6 TABLE #1 INPU TS OUTPU TS ~ Slo Step Function pe End Holdoff + Trigger -Trigger Sweep In In Free (Pin Run Gate (Pin 1) (Pin 6) (Pin 10) (Pin 1) (Pin 14) 16) (Pin ) 2 4 RESET 1.8 Ι Ι LOGIC Ι.4 ARM 1.8 Ι.55 Ι.55 LOGIC Ι.4 + TRIGGER 1.8 Ι.55 Ι.55 1 LOGIC 1 Ι.8 Ι.4 LATCH 1.8 Ι.55 Ι.55 LOGIC Ι.4.2 to.5.2 to to to 4. TABLE #2 INPU TS OUTPU TS Slo Step Function pe End Holdoff + Trigger -T rigger Gate Swee p In In Free Run Gate (P in 1) (P in 6) (P in 10) (P in 1) (P in 14) ~ (P in 16) (Pin ) (Pin 4) RES ET 2.0 Ι Ι Ι LOGIC 0 Ι.8 Ι.4 Ι 5 o ARM 2.0 Ι.55 ~.55 Ι LOGIC 1 Ι.8 Ι.4 Ι 5 o - TRIGGER ~ 2.0 Ι.55 Ι.55 Ι LOGIC 0 Ι.8 Ι.4 Ι 4. o ~ LATCH2.0 Ι.55 Ι.55 LOGIC 1 ~.8 ~.4 ~ 4.0 to 4. NOTE 1 : Gate Out (P in ) held at 5 olts afte r Power Supply settles at +5 olts. NOTE 2 : P ins and 4 loaded with α 2 kω resistor co nnected from Output P in to Ground during testing. NOTE : The Truth Table fo r Parameter 1 to be accomp lished without Powe r Supply inte rruption.

7 CONDITIONS Note 4 Note 5 Note 6 Note 7 Note 8 Note 9 + Trigger In - Trigger In Free Run In End Sweep In Slope In (Pin 1) ~ (Pin 14) (Pin 16) (Pin 6) (Pin 1).55 Ι.95 Ι.4 Ι.95 Ι ν H oldoff In (Pin 10) FIGURE m INPUT Tr 1 ns,. (PINS 1,14) -200 m + TRIGGER IN LESS - TRIGGER GATE OUTPUT (PIN ) Reliability λ, failure rate _-.02%/1 Κ hours at 75 Τί Thermal impedance, θοη = 65 C/W