FAN7191-F085 High-Current, High and Low Side Gate Drive IC

Transcription

1 FAN7191-F85 High-Current, High and Low Side Gate Drive IC Features! Floating Channel for Bootstrap Operation to +6V! 4.5A Sourcing and 4.5A Sinking Current Driving Capability! Common-Mode dv/dt Noise Cancelling Circuit! Built-in Under-Voltage Lockout for Both Channels! Matched Propagation Delay for Both Channels! 3.3V and 5V Input Logic Compatible! Output In-phase with Input! Qualified to AEC Q1 Applications! Advanced Fuel Injection Systems! Automotive high voltage DC-DC converters! Starter/Alternator! Electric Power Steering! Motor Control (fans, pumps, compressors)! MOSFET and IGBT driver applications Description The FAN7191-F85 is a monolithic high- and low-side gate-drive IC, which can drive high speed MOSFETs and IGBTs that operate up to +6V. It has a buffered output stage with all NMOS transistors designed for high pulse driving capability and minimum cross-conduction. ON Semiconductor s high-voltage process and common-mode noise canceling technique provide stable operation of high-drivers under high dv/dt noise circumstances. An advanced level-shift circuit allows high-side gate driver operation up to V S = -9.8V (typical) for V BS = 15V. The UVLO circuit prevents malfunction when V DD and V BS are lower than the specified threshold voltage. The high current and low output voltage drop features make this device suitable for controlling direct injection actuators and for use in many automotive DC-DC converter and motor control applications. FAN7191-F85 High-Current, High and Low Side Gate Drive IC 8-SOP Figure 1. Package Options Ordering Information Part Number Operating Range Package Eco Status Packing Method FAN7191MX-F85-4 C to +125 C 8-SOP RoHS Tape & Reel 216 Semiconductor Component Industries, LLC Publication Order Number: August-217, Rev. 2 FAN7191MX-F85/D

2 ical Application Circuit Controller C 1 15V R boot D boot 1 HIN V B 8 2 LIN HO 7 3 COM V S 6 4 LO V DD 5 C boot Figure 2. Half-Bridge Application Circuit (8-SOP) R 3 R 1 R 4 R 2 Up to 6V Q 1 Q 2 Load FAN7191-F85 High-Current, High and Low Side Gate Drive IC Internal Block Diagram 8 VB UVLO HIN 1 PULSE GENERATOR NOISE CANCELLER R S R Q DRIVER 7 HO 6 VS 5 V DD UVLO LIN 2 DELAY VSS/COM LEVEL SHIFTER DRIVER 4 LO 3 COM Figure 3. Functional Block Diagram (8-SOP) 2

3 Pin Assignment HIN 1 8 V B LIN 2 COM 3 FAN7191M 7 HO 6 V S LO 4 5 V DD Figure 4. Pin Assignments (Top View) Pin Definitions 8-Pin Name Description 1 HIN Logic Input for High-Side Gate Driver Output 2 LIN Logic Input for Low-Side Gate Driver Output 3 COM Low-side Driver Return 4 LO Low-Side Driver Output 5 V DD Low-Side and Logic Power Supply Voltage 6 V S High-Side Floating Supply Return 7 HO High-Side Driver Output FAN7191-F85 High-Current, High and Low Side Gate Drive IC 8 V B High-Side Floating Supply 3

4 Absolute imum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA = 25 C, unless otherwise specified. V B, V DD and V IN are referenced to COM for FAN7191M (8-SOP). Symbol Parameter Min.. Unit V S High-side offset voltage VS VB-25 VB+.3 V V B High-side floating supply voltage VB V V HO High-side floating output voltage VS-.3 VB+.3 V V DD Low-side and logic-fixed supply voltage V V IN Logic Input voltage (HIN, LIN, EN) -.3 VDD+.3 V V LO Low-Side Output Voltage LO COM-.3 VDD+.3 V t pulse Minimum Pulse Width (4) 8 ns d VS/dt Allowable offset voltage slew rate 5 V/ns P D (1)(2)(3) Power dissipation 8-SOP.625 W θ JA Thermal Resistance, junction-to-ambient 8-SOP 2 C/W T J Junction temperature +15 C T S Storage temperature C ESD Electrostatic Discharge Capability Human Body Model, ANSI/ESDA/JEDEC JS Charged Device Model, JESD22-C11 2 Notes: 1. Mounted on 76.2 x x 1.6mm PCB (FR-4 glass epoxy material). 2. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions natural convection JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages 3. Do not exceed P D under any circumstances. 4. Minimum input pulse which is guaranteed to produce an output pulse. V FAN7191-F85 High-Current, High and Low Side Gate Drive IC Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor does not recommend exceeding them or designing to Absolute imum Ratings. V DD is referenced to COM for FAN7191M (8-SOP). Symbol Parameter Min.. Unit V B High-side floating supply voltage V S+1 V S+22 V V S High-side Floating Supply Offset Voltage 6-V DD 6 V V HO High-side Output Voltage V S V B V V DD Low-side and Logic Supply voltage 1 22 V V LO Low-side output voltage COM V DD V V IN Logic input voltage (HIN, LIN) COM V DD V COM Power Ground V SS-.5 V SS+.5 V T A Ambient C 4

5 Electrical Characteristics V BIAS (V DD, V BS) = 15.V, V S = COM, T A = 25 C, unless otherwise specified. The V IL, V IH and I IN parameters are referenced to COM and are applicable to the respective input signals HIN and LIN. The V O and I O parameters are referenced to COM. V S and GND and are applicable to the respective outputs HO and LO. Symbol Characteristic Condition Min... Unit POWER SUPPLY SECTION (V DD and V BS) V DDUV+ V BSUV+ V DDUV- V BSUV- V DDHYS V DD and V BS Supply Under-Voltage Positive-going Threshold V DD and V BS Supply Under-Voltage Negative Going Threshold V DD supply under-voltage lockout hysteresis I LK Offset Supply Leakage Current V B = V S = 6V 5 I QBS Quiescent V BS Supply Current V IN = V or 5V I QDD Quiescent V DD Supply Current V IN = V or 5V I PBS Operating V BS Supply Current f IN = 2kHz, rms value 4 8 I PDD Operating V DD Supply Current f IN = 2kHz, rms value 4 8 LOGIC INPUT SECTION (HIN, LIN, EN) V IH Logic 1 Input Voltage 2.5 V IL Logic Input Voltage 1.2 I IN+ Logic 1 Input Bias Current (HIN/LIN) V IN = 5V 25 5 I IN- Logic Input Bias Current (HIN/LIN) V IN = V R IN Input Pull-down Resistance 1 2 kω GATE DRIVER OUTPUT SECTION (HO, LO) V OH High-level Output Voltage, V BIAS-V O No Load 1.35 V.5 V µa µa V µa FAN7191-F85 High-Current, High and Low Side Gate Drive IC V OL Low-level Output Voltage, V O No Load 35 mv I O+ Output HIGH, Short-circuit Pulsed Current V O=V, V IN=5V with PW<1µs I O- Output LOW Short-circuit Pulsed Current V O=15V, V IN=V with PW<1µs A Allowable Negative V V S Pin Voltage for S HIN Signal Propagation to HO Note: 5. This parameter guaranteed by design V Dynamic Electrical Characteristics V BIAS (V DD, V BS) = 15.V, V S = COM = V, T A = 25 C, C LOAD=1pF unless otherwise specified. Symbol Characteristic Condition Min... Unit t on Turn-on Propagation Delay V S=V 14 2 ns t off Turn-off Propagation Delay V S=V 14 2 ns MT Delay Matching 55 ns t r Turn-off Rise Time 25 5 ns t f Turn-off Fall Time 25 5 ns 5

6 ical Characteristics Turn-on Delay Time (ns) Turn-on Rise Time (ns) C Figure 7. Turn-on Propagation Delay Turn-off Delay Time (ns) Turn-Off Fall Time (ns) C Figure 8. Turn-off Propagation Delay FAN7191-F85 High-Current, High and Low Side Gate Drive IC Figure 9. Turn-on Rise Time Figure 1. Turn-off Fall Time 6 6 Delay Matching of turn-on (ns) Delay Matching of turn-off (ns) Figure 11. Turn-on Delay Matching Figure 12. Turn-off Delay Matching 6

7 Quiescent VDD Supply Current (ua) OperaCng VDD Supply current (ua) VDD PosiCve going UVLO threshold (V) Figure 13. Quiescent V DD Supply Current vs. Figure 15. Operating V DD Supply Current vs. Min 7 Quiescent VBS Supply Current (ua) OperaCng VBS Supply Current (ua) VDD NegaCve going UVLO threshold (V) Figure 14. Quiescent V BS Supply Current vs Figure 16. Operating V BS Supply Current vs. 7 Min FAN7191-F85 High-Current, High and Low Side Gate Drive IC Figure 17. V DD UVLO+ Figure 18. V DD UVLO- VBS PosiCve going UVLO threshold (V) Min 7 Figure 19. V BS UVLO+ VBS NegaCve going UVLO threshold (V) 1 Min Figure 2. V BS UVLO- 7

8 High Level Output Voltage (V) Logic High Input Voltage (V) High Input bias current (ua) Figure 21. High-Level Output Voltage Figure 23. Logic High Input Voltage Figure 25. Logic 1 Input Bias Current vs. Low Level Output Voltage (mv) Logic Low Input Voltage (V) Allowable negacve Vs voltage (V) Figure 22. Low-Level Output Voltage Figure 24. Logic Low Input Voltage -12 Figure 26. Allowable Negative V S Voltage vs. FAN7191-F85 High-Current, High and Low Side Gate Drive IC 8

9 Switching Time Definitions HIN LIN HIN LIN 1nF HIN LIN HO LO 1 HIN V B 8 2 LIN HO 7 3 COM V S 6 4 LO V DD 5 1 F 1 F 1nF 15V 15V Figure 27. Switching Time Test Circuit (8-SOP) Figure 28. Input/Output Timing Diagram 5% 5% 1nF 1nF FAN7191-F85 High-Current, High and Low Side Gate Drive IC t ON tr t OFF tf 9% 9% HO LO 1% 1% Figure 29. Switching Time Waveform Definitions HIN LIN 5% 5% MT LO HO 9% 1% LO HO MT Figure 3. Delay Matching Waveform Definition 9

10 Package Dimensions FAN7191-F85 High-Current, High and Low Side Gate Drive IC Figure Lead, Small Outline Package (SOP) 1

11 11 FAN7191-F85 High-Current, High and Low Side Gate Drive IC