FSAM30SH60A Motion SPM 2 Series

Transcription

1 FSAM30SH60A Motion SPM 2 Series Features UL Certified No. E V - 30 A 3 - Phase IGBT Inverter Bridge Including Control ICs for Gate Driving and Protection Three Separate Open - Emitter Pins from Low Side IGBTs for Three Leg Current Sensing Single-Grounded Power Supply Thanks to Built-in HVIC Typical Switching Frequency of 15 khz Built-in Thermistor for Temperature Monitoring Inverter Power Rating of 2.4 kw / 100~253 VAC Isolation Rating of 2500 Vrms / min. Low Thermal Resistance by Using Ceramic Substrate Adjustable Current Protection Level by Changing the Value of Series Resistor Connected to the Emitters of Sense-IGBTs Applications Motion Control - Home Appliance / Industrial Motor General Description September 2013 FSAM30SH60A Is A Motion SPM 2 Series that Fairchild Has Developed to Provide A Very Compact and Low Cost, yet High Performance Inverter Solution for AC Motor Drives in Low-Power Applications Such as Air Conditioners. It Combines Optimized Circuit Protections and Drive Matched to Low-Loss IGBTs. Effective Over-Current Protection Is Realized Through Advanced Current Sensing IGBTs. The System Reliability Is Further Enhanced by The Built-in Thermistor and Integrated Under- Voltage Lock-Out Protection. In Addition The Incorporated HVIC Facilitates The Use of Single- Supply Voltage Without Any Negative Bias. Inverter Leg Current Sensing Can Be Implemented Because of Three Separate Nagative DC Terminals. Related Source AN-9043 : Motion SPM 2 Series User's Guide Top View Bottom View 60mm 31mm Fig. 1. Package Marking and Ordering Information Device Marking Device Package Reel Size Packing Type Quantity FSAM30SH60A FSAM30SH60A S32AA RAIL Fairchild Semiconductor Corporation 1

2 Integrated Power Functions 600 V - 30 A IGBT inverter for 3 - phase DC/AC power conversion (Please refer to Fig. 3) Integrated Drive, Protection and System Control Functions For inverter high-side IGBTs: Gate drive circuit, High voltage isolated high-speed level shifting Control circuit under-voltage (UV) protection Note) Available bootstrap circuit example is given in Figs. 14 and 15. For inverter low-side IGBTs: Gate drive circuit, Short-Circuit (SC) protection Control supply circuit under-voltage (UV) protection Temperature Monitoring: System over-temperature monitoring using built-in thermistor Note) Available temperature monitoring circuit is given in Fig. 15. Fault signaling: Corresponding to a SC fault (Low-side IGBTs) or a UV fault (Low-side control supply circuit) Input interface: Active - Low Interface, Can Work with 3.3 / 5 V Logic Pin Configuration Top View (1) V CC(L) (2) com (L) (3) IN (UL) (4) IN (VL) (5) IN (WL) (6) com (L) (7) FO (8) C FOD (9) C SC (10) R SC (11) IN (UH) (12) V CC(UH) (13) V B(U) (14) V S(U) (15) IN (VH) (16) com (H) (17) V CC(VH) (18) V B(V) (19) V S(V) (20) IN (WH) (21) V CC(WH) (22) V B(W) (23) V S(W) (24) V TH (25) R TH (26) N U (27) N V (28) N W (29) U (30) V (31) W (32) P Case Temperature (T C ) Detecting Point Ceramic Substrate Fig Fairchild Semiconductor Corporation 2

3 Pin Descriptions Pin Number Pin Name Pin Description 1 V CC(L) Low-side Common Bias Voltage for IC and IGBTs Driving 2 COM (L) Low-side Common Supply Ground 3 IN (UL) Signal Input for Low-side U Phase 4 IN (VL) Signal Input for Low-side V Phase 5 IN (WL) Signal Input for Low-side W Phase 6 COM (L) Low-side Common Supply Ground 7 V FO Fault Output 8 C FOD Capacitor for Fault Output Duration Time Selection 9 C SC Capacitor (Low-pass Filter) for Short-Circuit Current Detection Input 10 R SC Resistor for Short-Circuit Current Detection 11 IN (UH) Signal Input for High-side U Phase 12 V CC(UH) High-side Bias Voltage for U Phase IC 13 V B(U) High-side Bias Voltage for U Phase IGBT Driving 14 V S(U) High-side Bias Voltage Ground for U Phase IGBT Driving 15 IN (VH) Signal Input for High-side V Phase 16 COM (H) High-side Common Supply Ground 17 V CC(VH) High-side Bias Voltage for V Phase IC 18 V B(V) High-side Bias Voltage for V Phase IGBT Driving 19 V S(V) High-side Bias Voltage Ground for V Phase IGBT Driving 20 IN (WH) Signal Input for High-side W Phase 21 V CC(WH) High-side Bias Voltage for W Phase IC 22 V B(W) High-side Bias Voltage for W Phase IGBT Driving 23 V S(W) High-side Bias Voltage Ground for W Phase IGBT Driving 24 V TH Thermistor Bias Voltage 25 R TH Series Resistor for the Use of Thermistor (Temperature Detection) 26 N U Negative DC Link Input for U Phase 27 N V Negative DC Link Input for V Phase 28 N W Negative DC Link Input for W Phase 29 U Output for U Phase 30 V Output for V Phase 31 W Output for W Phase 32 P Positive DC Link Input 2003 Fairchild Semiconductor Corporation 3

4 Internal Equivalent Circuit and Input/Output Pins Bottom View (22) V B(W) VB (21) V CC(WH) VCC OUT COM (20) IN (W H) IN VS (23) V S(W) (18) V B(V) VB (17) V CC(VH) VCC (16) COM (H) COM OUT (15) IN (VH) IN VS (19) V S(V) (32) P (31) W (30) V (13) V B(U) VB (12) V CC(UH) (11) IN (UH) VCC COM IN OUT VS (29) U (14) V S(U) (10) R SC (9) C SC (8) C FOD (7) V FO (6) COM (L) C(SC) OUT(WL) C(FOD) VFO (28) N W (5) IN (W L) (4) IN (VL) IN(W L) IN(VL) OUT(VL) (3) IN (UL) IN(UL) (27) N V (2) COM (L) (1) V CC(L) COM(L) OUT(UL) VCC (26) N U THERMISTOR (25) R TH (24) V TH 1) Inverter low-side is composed of three sense-igbt including freewheeling diodes for each IGBT and one control IC which has gate driving, current sensing and protection functions. 2) Inverter power side is composed of four inverter dc-link input pins and three inverter output pins. 3) Inverter high-side is composed of three normal-igbts including freewheeling diodes and three drive ICs for each IGBT. Fig Fairchild Semiconductor Corporation 4

5 Absolute Maximum Ratings (T J = 25 C, Unless Otherwise Specified) Inverter Part Item Symbol Condition Rating Unit Supply Voltage V PN Applied between P- N U, N V, N W 450 V Supply Voltage (Surge) V PN(Surge) Applied between P- N U, N V, N W 500 V Collector-Emitter Voltage V CES 600 V Each IGBT Collector Current ± I C T C = 25 C 30 A Each IGBT Collector Current ± I C T C = 100 C 15 A Each IGBT Collector Current (Peak) ± I CP T C = 25 C, 60 A Instantaneous Value (Pulse) Collector Dissipation P C T C = 25 C per One Chip 62 W Operating Junction Temperature T J (Note 1) -20 ~ 125 C 1. It would be recommended that the average junction temperature should be limited to T J 125 C (@T C 100 C) in order to guarantee safe operation. Control Part Item Symbol Condition Rating Unit Control Supply Voltage V CC Applied between V CC(UH), V CC(VH), V CC(WH) - COM (H), 20 V V CC(L) - COM (L) High-side Control Bias Voltage V BS Applied between V B(U) - V S(U), V B(V) - V S(V), V B(W) - 20 V V S(W) Input Signal Voltage V IN Applied between IN (UH), IN (VH), IN (WH) - COM (H) -0.3 ~ V CC +0.3 V IN (UL), IN (VL), IN (WL) - COM (L) Fault Output Supply Voltage V FO Applied between V FO - COM (L) -0.3 ~ V CC +0.3 V Fault Output Current I FO Sink Current at V FO Pin 5 ma Current Sensing Input Voltage V SC Applied between C SC - COM (L) -0.3 ~ V CC +0.3 V Total System Item Symbol Condition Rating Unit Self Protection Supply Voltage Limit V PN(PROT) V CC = V BS = 13.5 ~ 16.5 V 400 V (Short-Circuit Protection Capability) T J = 125 C, Non-repetitive, less than 6 s Module Case Operation Temperature T C Note Fig.2-20 ~ 100 C Storage Temperature T STG -20 ~ 125 C Isolation Voltage V ISO 60Hz, Sinusoidal, AC 1 minute, Connection Pins to Heat-sink Plate 2500 V rms 2003 Fairchild Semiconductor Corporation 5

6 Absolute Maximum Ratings Thermal Resistance Item Symbol Condition Min. Typ. Max. Unit Junction to Case Thermal R th(j-c)q Each IGBT under Inverter Operating Condition C/W Resistance R th(j-c)f Each FWDi under Inverter Operating Condition C/W Contact Thermal Resistance R th(c-f) Ceramic Substrate (per 1 Module) Thermal Grease Applied (Note 3) 2. For the measurement point of case temperature(t C ), please refer to Fig The thickness of thermal grease should not be more than 100um. Electrical Characteristics (T J = 25 C, Unless Otherwise Specified) Inverter Part C/W Item Symbol Condition Min. Typ. Max. Unit Collector - Emitter V CE(SAT) V CC = V BS = 15 V I C = 30 A, T J = 25 C V Saturation Voltage V IN = 0 V I C = 30 A, T J = 125 C V FWDi Forward Voltage V FM V IN = 5 V I C = 30 A, T J = 25 C V I C = 30 A, T J = 125 C V Switching Times t ON V PN = 300 V, V CC = V BS = 15 V us t C(ON) I C = 30 A, T J = 25 C us V IN = 5 V 0 V, Inductive Load t OFF us (High, Low-side) t C(OFF) us t rr (Note 4) us Collector - Emitter Leakage Current I CES V CE = V CES, T J = 25 C A 4. t ON and t OFF include the propagation delay time of the internal drive IC. t C(ON) and t C(OFF) are the switching time of IGBT itself under the given gate driving condition internally. For the detailed information, please see Fig Fairchild Semiconductor Corporation 6

7 100% I C t rr V CE V IN V IN(O N) t ON t C(ON) I C V IN(OFF) V IN t OFF I C t C(OFF) V CE (a) Turn-on (b) Turn-off Fig. 4. Switching Time Definition V CE : 100V/div. I C : 10A/div. I C : 10A/div. V CE : 100V/div. time : 0.1us/div. time : 0.1us/div. (a) (a) Turn-on turn-on (b) turn-off Turn-off Fig. 5. Experimental Results of Switching Waveforms Test Condition: Vdc=300 V, Vcc=15 V, L=500 uh (Inductive Load), T j =25 C 2003 Fairchild Semiconductor Corporation 7

8 Electrical Characteristics (T J = 25 C, Unless Otherwise Specified) Control Part Item Symbol Condition Min. Typ. Max. Unit Control Supply Voltage V CC Applied between V V CC(UH), V CC(VH), V CC(WH), V CC(L) - COM High-side Bias Voltage V BS Applied between V B(U) - V S(U), V B(V) - V S(V), V B(W) - V S(W) V Quiescent V CC Supply Current Quiescent V BS Supply Current I QCCL I QCCH I QBS V CC = 15 V IN (UL, VL, WL) = 5 V V CC = 15 V IN (UH, VH, WH) = 5 V V BS = 15 V IN (UH, VH, WH) = 5 V V CC(L) - COM (L) ma V CC(UH), V CC(VH), V CC(WH) ua COM (H) V B(U) - V S(U), V B(V) -V S(V), ua V B(W) - V S(W) Fault Output Voltage V FOH V SC = 0 V, V FO Circuit: 4.7 k to 5 V Pull-up V V FOL V SC = 1 V, V FO Circuit: 4.7 k to 5 V Pull-up V PWM Input Frequency f PWM T C 100 C, T J 125 C khz Allowable Input Signal Blanking Time considering Leg Arm-short t dead -20 C T C 100 C us Short-Circuit Trip Level V SC(ref) V CC = 15 V (Note 5) V Sensing Voltage of IGBT Current Supply Circuit Under- Voltage Protection V SEN T C = 25 R SC = 50, R SU = R SV = R SW = 0 and I C = 45 A (Note Fig. 7) V UV CCD Detection Level V UV CCR Reset Level V UV BSD Detection Level V UV BSR Reset Level V Fault Output Pulse Width t FOD C FOD = 33nF (Note 6) ms V V ON Threshold Voltage V IN(ON) High-Side Applied between IN (UH), IN (VH), OFF Threshold Voltage V IN(OFF) IN (WH) - COM (H) V ON Threshold Voltage V IN(ON) Low-Side Applied between IN (UL), IN (VL), OFF Threshold Voltage V IN(OFF) IN (WL) - COM (L) V Resistance of Thermistor R T TH = 25 C (Note Fig. 6) T TH = 100 C (Note Fig. 6) k 5. Short-circuit current protection is functioning only at the low-sides. It would be recommended that the value of the external sensing resistor (R SC ) should be selected around 50 in order to make the SC trip-level of about 45A at the shunt resistors (R SU,R SV,R SW ) of 0. For the detailed information about the relationship between the external sensing resistor (R SC ) and the shunt resistors (R SU,R SV,R SW ), please see Fig The fault-out pulse width t FOD depends on the capacitance value of C FOD according to the following approximate equation : C FOD = 18.3 x 10-6 x t FOD [F] 7. T TH is the temperature of thermistor 2003 Fairchild Semiconductor Corporation 8

9 Resistance [k ] R-T Curve Temperature [ ] Fig. 6. R-T Curve of The Built-in Thermistor (1) (2) R SC [ ] R SU,R SV,R SW [ ] Fig. 7. R SC Variation by change of Shunt Resistors (R SU, R SV, R SW ) for Short-Circuit Protection around 100% Rated Current Trip (I C = 30 A) around 150% Rated Current Trip (I C = 45 A) 2003 Fairchild Semiconductor Corporation 9

10 Mechanical Characteristics and Ratings Item Condition Limits Min. Typ. Max. Unit Mounting Torque Mounting Screw: M4 Recommended 10 Kg cm Kg cm (Note 8 and 9) Recommended 0.98 N m N m Ceramic Flatness Note Fig um Weight g (+) (+) (+) Datum Line Fig. 8. Flatness Measurement Position of The Ceramic Substrate 8. Do not make over torque or mounting screws. Much mounting torque may cause ceramic cracks and bolts and Al heat-fin destruction. 9. Avoid one side tightening stress. Fig.9 shows the recommended torque order for mounting screws. Uneven mounting can cause the Motion SPM 2 Package ceramic substrate to be damaged. 2 1 Fig. 9. Mounting Screws Torque Order 2003 Fairchild Semiconductor Corporation 10

11 Recommended Operating Conditions Item Symbol Condition Values Min. Typ. Max. Unit Supply Voltage V PN Applied between P - N U, N V, N W V Control Supply Voltage V CC Applied between V CC(UH), V CC(VH), V CC(WH) V COM (H), V CC(L) - COM (L) High-side Bias Voltage V BS Applied between V B(U) - V S(U), V B(V) - V S(V), V V B(W) - V S(W) Blanking Time for Preventing t dead For Each Input Signal us Arm-short PWM Input Signal f PWM T C 100 C, T J 125 C khz Input ON Threshold Voltage V IN(ON) Applied between IN (UH), IN (VH), IN (WH) - 0 ~ 0.65 V COM (H) Input OFF Threshold Voltage V IN(OFF) Applied between IN (UL), IN (VL), IN (WL) - COM (L) 4 ~ 5.5 V 2003 Fairchild Semiconductor Corporation 11

12 Time Charts of Protective Function Input Signal Internal IGBT Gate-Emitter Voltage Control Supply Voltage Output Current Fault Output Signal P1 : Normal operation - IGBT ON and conducting current P2 : Under-Voltage detection P3 : IGBT gate interrupt P4 : Fault signal generation P5 : Under-Voltage reset P6 : Normal operation - IGBT ON and conducting current UV detect P1 P3 P2 P4 P5 Fig. 10. Under-Voltage Protection (Low-side) UV reset P6 Input Signal P3 V BS UV detect P2 P5 UV reset P1 P6 Output Current Fault Output Signal P4 P1 : Normal operation - IGBT ON and conducting current P2 : Under-Voltage detection P3 : IGBT gate interrupt P4 : No fault signal P5 : Under-Voltage reset P6 : Normal operation - IGBT ON and conducting current Fig. 11. Under-Voltage Protection (High-side) 2003 Fairchild Semiconductor Corporation 12

13 Input Signal Internal IGBT Gate-Emitter Voltage Output Current Sensing Voltage SC Detection P1 P2 P5 P4 P6 P7 SC Reference Voltage (0.5V) Fault Output Signal RC Filter Delay P3 P8 P1 : Normal operation - IGBT ON and conducting current P2 : Short-Circuit current detection P3 : IGBT gate interrupt / Fault signal generation P4 : IGBT is slowly turned off P5 : IGBT OFF signal P6 : IGBT ON signal - but IGBT cannot be turned on during the fault Output activation P7 : IGBT OFF state P8 : Fault Output reset and normal operation start Fig. 12. Short-Circuit Current Protection (Low-side Operation only) 2003 Fairchild Semiconductor Corporation 13

14 CPU nF 5V-Line R PF R PL R PH 4.7k 2k 4.7k C PF C PL C PH 1nF 0.47nF 1.2nF,, IN (UH) IN (VH) IN (WH),, IN (UL) IN (VL) IN (WL) V FO COM SPM 1) It would be recommended that by-pass capacitors for the gating input signals, IN (UL), IN (VL), IN (WL), IN (UH), IN (VH) and IN (WH) should be placed on the Motion SPM 2 Product pins and on the both sides of CPU and Motion SPM 2 Product for the fault output signal, V FO, as close as possible. 2) The logic input is compatible with standard CMOS or LSTTL outputs. 3) R PL C PL /R PH C PH /R PF C PF coupling at each Motion SPM 2 Product input is recommended in order to prevent input/output signals oscillation and it should be as close as possible to each of Motion SPM 2 Product pins. Fig. 13. Recommended CPU I/O Interface Circuit These Values depend on PWM Control Algorithm 15V-Line One-Leg Diagram of Motion SPM 2 Product 20Ω D BS P 0.1uF Vcc VB 22uF IN HO COM VS Inverter Output 470uF 0.1uF Vcc IN OUT COM N It would be recommended that the bootstrap diode, D BS, has soft and fast recovery characteristics. Fig. 14. Recommended Bootstrap Operation Circuit and Parameters 2003 Fairchild Semiconductor Corporation 14

15 C P U Gating WH Gating VH Gating UH Fault Gating WH Gating VH Gating UH R S R S R S R S R S R S R S C BPF 15V line 5V line R BS D BS R PH C BS C PH R BS D BS R PH C BS C PH R D BS BS R PH C BS C PH R SC 5V line R F R PL R PL R PL R PF C SC C PL C PL C PL C PF C BSC C BSC C BSC R CSC C FOD (22) V B(W) (21) V CC(WH) (20) IN (WH) (23) V S(W) (18) V B(V) (17) V CC(VH) (16) COM (H) (15) IN (VH) (19) V S(V) (13) V B(U) (12) V CC(UH) (11) IN (UH) (14) V S(U) (10) R SC (9) C SC (8) C FOD (7) V FO (6) COM (L) (5) IN (WL) (4) IN (VL) (3) IN (UL) (2) COM (L) (1) V CC(L) VB VCC OUT COM IN VS VB VCC OUT COM IN VS VB VCC OUT COM IN VS C(SC) OUT(WL) C(FOD) VFO IN(WL) OUT(VL) IN(VL) IN(UL) COM(L) OUT(UL) VCC P (32) W (31) V (30) U (29) N W (28) N V (27) N U (26) R SW R SV R SU M C DCS 5V line Vdc C SP15 C SPC15 V TH (24) THERMISTOR R TH (25) Temp. Monitoring W-Phase Current V-Phase Current U-Phase Current R FW R FV R FU R TH C SPC05 C SP05 C FW C FV C FU 1) R PL C PL /R PH C PH /R PF C PF coupling at each Motion SPM 2 Product input is recommended in order to prevent input signals oscillation and it should be as close as possible to each Motion SPM 2 Product input pin. 2) By virtue of integrating an application specific type HVIC inside the Motion SPM 2 Product, direct coupling to CPU terminals without any opto-coupler or transformer isolation is possible. 3) V FO output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7k resistance. Please refer to Fig ) C SP15 of around 7 times larger than bootstrap capacitor C BS is recommended. 5) V FO output pulse width should be determined by connecting an external capacitor(c FOD ) between C FOD (pin8) and COM (L) (pin2). (Example : if C FOD = 33 nf, then t FO = 1.8 ms (typ.)) Please refer to the note 6 for calculation method. 6) Each input signal line should be pulled up to the 5V power supply with approximately 4.7k (at high side input) or 2k at low side input) resistance (other RC coupling circuits at each input may be needed depending on the PWM control scheme used and on the wiring impedance of the system s printed circuit board). Approximately a 0.22~2nF by-pass capacitor should be used across each power supply connection terminals. 7) To prevent errors of the protection function, the wiring around R SC, R F and C SC should be as short as possible. 8) In the short-circuit protection circuit, please select the R F C SC time constant in the range 3~4 s. 9) Each capacitor should be mounted as close to the pins of the SPM as possible. 10)To prevent surge destruction, the wiring between the smoothing capacitor and the P&N pins should be as short as possible. The use of a high frequency noninductive capacitor of around 0.1~0.22 uf between the P&N pins is recommended. 11)Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and the relays. It is recommended that the distance be 5cm at least. Fig. 15. Typical Application Circuit 2003 Fairchild Semiconductor Corporation 15

16 Detailed Package Outline Drawings 28x2.00 ±0.10=56.0 ±0.10 (2.00) MAX1.05 MAX ± ± ± S32AA ±0.10 #23 # ± ± Ø4.30 (3 ~5 ) ± # ±0.10 # ± ± ± ±0.20 3x7.62 ±0.10=22.86 ± ±0.10 3x4.0 ±0.10=12.0 ±0.10 (10.14) 2.00 ±0.10 MAX8.20 MAX (3.50) 0.40 (3.70) 1.30±0.10 MAX ±0.10 MAX ±0.10 MAX1.60 Dimensions in Millimeters 2003 Fairchild Semiconductor Corporation 16

17 2003 Fairchild Semiconductor Corporation 17