SEMICONDUCTOR TECHNICAL DATA

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1 SEMIONDUTOR TEHNIAL DATA The M4093B Shmitt trigger is onstruted with MOS P hannel and N hannel enhanement mode devies in a single monolithi struture. These devies find primary use where low power dissipation and/or high noise immunity is desired. The M4093B may be used in plae of the M40B quad 2 input NAND gate for enhaned noise immunity or to square up slowly hanging waveforms. Supply Voltage Range = 3.0 Vd to 8 Vd apable of Driving Two Low Power TTL Loads or One Low Power Shottky TTL Load Over the Rated Temperature Range Triple Diode Protetion on All Inputs Pin for Pin ompatible with D4093 an be Used to Replae M40B Independent Shmitt Trigger at eah Input MAXIMUM RATINGS* (Voltages Referened to ) SymbolÎ Parameter Value Unit Î D Supply Voltage 0.5 to V Vin, Î Input or Output Voltage (D or Transient) 0.5 to V Iin, IoutÎ Input or Output urrent (D or Transient), ± 0 ma per Pin PD Î Power Dissipation, per Pakage 500 mw Tstg Î Storage Temperature 65 to + 50 TL Î Lead Temperature (8 Seond Soldering) 260 * Maximum Ratings are those values beyond whih damage to the devie may our. Temperature Derating: Plasti P and D/DW Pakages:.0 mw/ From 65 To 25 erami L Pakages: 2 mw/ From 00 To 25 EQUIVALENT IRUIT SHEMATI (/4 OF IRUIT SHOWN) L SUFFIX ERAMI ASE 632 ORDERING INFORMATION M4XXXBP M4XXXBL M4XXXBD Plasti erami SOI TA = 55 to 25 for all pakages. LOGI DIAGRAM = PIN 4 = PIN P SUFFIX PLASTI ASE 646 D SUFFIX SOI ASE 5A This devie ontains protetion iruitry to guard against damage due to high stati voltages or eletri fields. However, preautions must be taken to avoid appliations of any voltage higher than maximum rated voltages to this high-impedane iruit. For proper operation, Vin and should be onstrained to the range (Vin or ). Unused inputs must always be tied to an appropriate logi voltage level (e.g., either or ). Unused outputs must be left open. REV 3 /94 MOTOROLA Motorola, In. 995 MOS LOGI DATA M4093B

2 ELETRIAL HARATERISTIS (Voltages Referened to ) 55 Î harateristi Symbol Vd Min Max Min Typ # Max Min Max Unit Output Voltage 0 Level Î VOL Vin = or Vd Level VOH Vin = 0 or ÎÎ 4.95 Vd Output Drive urrent IOH ÎÎ mad (VOH = 2.5 Vd) Soure (VOH = 4.6 Vd) (VOH = 9.5 Vd) 0.6 ÎÎ (VOH = 3.5 Vd) (VOL = 0.4 Vd) Sink IOL (VOL = 0.5 Vd) ÎÎ ÎÎ (VOL =.5 Vd) mad Input urrent Iin 5 ± 0. ± ± 0. ±.0 µad Input apaitane in.5 pf (Vin = 0) Quiesent urrent IDD ÎÎ (Per Pakage) µad Total Supply urrent** IT IT = (.2 µa/khz) f + IDD µad (Dynami plus Quiesent, Per Pakage) 0 5 IT = (2.4 µa/khz) f + IDD IT = (3.6 µa/khz) f + IDD (L = 50 pf on all outputs, all buffers swithing) Î Hysteresis Voltage VH Î Vd ÎÎ Threshold Voltage Positive Going VT+ Vd ÎÎ ÎÎ Negative Going Î VT Vd ÎÎ #Data labelled Typ is not to be used for design purposes but is intended as an indiation of the I s potential performane. ** The formulas given are for the typial harateristis only at 25. To alulate total supply urrent at loads other than 50 pf: IT(L) = IT(50 pf) + (L 50) Vfk where: IT is in µa (per pakage), L in pf, V = ( ) in volts, f in khz is input frequeny, and k = M4093B 2 MOTOROLA MOS LOGI DATA

3 SWITHING HARATERISTIS (L = 50 pf, TA = 25 ) harateristi SymbolÎÎ Vd Min Typ # Max Unit Output Rise Time ttlh Î Î ns Output Fall Time ÎÎ tthl ÎÎ 0 ns Î Propagation Delay Time tphlî Î tplh, ÎÎ 5 ns #Data labeled Typ is not to be used for design purposes but is intended as an indiation of the I s potential performane. 20 ns 20 ns PULSE GENERATOR INPUT 4 L OUTPUT INPUT tphl OUTPUT 90% 50% 0% 90% 50% 0% tplh VOH VOL tthl ttlh Figure. Swithing Time Test iruit and Waveforms VH VH Vin Vin (a) Shmitt Triggers will square up (a) inputs with slow rise and fall times. (b) A Shmitt trigger offers maximum (b) noise immunity in gate appliations. Figure 2. Typial Shmitt Trigger Appliations MOTOROLA MOS LOGI DATA M4093B 3

4 4 IOH VGS 4 IOL All unused inputs onneted to ground. VGS All unused inputs onneted to ground. IOH, DRAIN URRENT (mad) a TA = 55 b TA = + 25 b TA = + 25 VGS = Vd 0 Vd a a VDS, DRAIN VOLTAGE (Vd) Figure 3. Typial Output Soure harateristis Test iruit b a b b 5 Vd IOL, DRAIN URRENT (mad) a b b a 5 Vd a VGS = 0 Vd VDS, DRAIN VOLTAGE (Vd) Figure 4. Typial Output Sink harateristis Test iruit b Vd a TA = 55 b TA = + 25 TA = + 25 PIN ASSIGNMENT, OUTPUT VOLTAGE (Vd) IN A IN 2A OUTA OUTB IN B IN 2B IN 2D IN D OUTD OUT IN 2 IN 0 0 VT VT+ V DD VH Vin, INPUT VOLTAGE (Vd) Figure 5. Typial Transfer harateristis M4093B 4 MOTOROLA MOS LOGI DATA

5 OUTLINE DIMENSIONS A 4 9 B L SUFFIX ERAMI DIP PAKAGE ASE ISSUE Y L NOTES:. DIMENSIONING AND TOLERANING PER ANSI Y4.5M, ONTROLLING DIMENSION: INH. 3. DIMENSION L TO ENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.6 (0.030) WHERE THE LEAD ENTERS THE ERAMI BODY. T SEATING PLANE F D 4 PL G 0.25 (0.00) M T A N S K J 4 PL M 0.25 (0.00) M T B S INHES MILLIMETERS DIM MIN MAX MIN MAX A B D F G 0.00 BS 2.54 BS J K L BS.62 BS M N B P SUFFIX PLASTI DIP PAKAGE ASE ISSUE L NOTES:. LEADS WITHIN 0.3 (0.005) RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL ONDITION. 2. DIMENSION L TO ENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INLUDE MOLD FLASH. 4. ROUNDED ORNERS OPTIONAL. A F H G D N SEATING PLANE K L M J INHES MILLIMETERS DIM MIN MAX MIN MAX A B D F G 0.00 BS 2.54 BS H J K L BS.62 BS M N MOTOROLA MOS LOGI DATA M4093B 5

6 OUTLINE DIMENSIONS A 4 8 B P PL D SUFFIX PLASTI SOI PAKAGE ASE 5A 03 ISSUE F 0.25 (0.00) M B M NOTES:. DIMENSIONING AND TOLERANING PER ANSI Y4.5M, ONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.2 (0.005) TOTAL IN EXESS OF THE D DIMENSION AT MAXIMUM MATERIAL ONDITION. T SEATING PLANE G D 4 PL K 0.25 (0.00) M T B S A S R X 45 M J F MILLIMETERS INHES DIM MIN MAX MIN MAX A B D F G.2 BS BS J K M 0 0 P R Motorola reserves the right to make hanges without further notie to any produts herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its produts for any partiular purpose, nor does Motorola assume any liability arising out of the appliation or use of any produt or iruit, and speifially dislaims any and all liability, inluding without limitation onsequential or inidental damages. Typial parameters whih may be provided in Motorola data sheets and/or speifiations an and do vary in different appliations and atual performane may vary over time. All operating parameters, inluding Typials must be validated for eah ustomer appliation by ustomer s tehnial experts. Motorola does not onvey any liense under its patent rights nor the rights of others. Motorola produts are not designed, intended, or authorized for use as omponents in systems intended for surgial implant into the body, or other appliations intended to support or sustain life, or for any other appliation in whih the failure of the Motorola produt ould reate a situation where personal injury or death may our. Should Buyer purhase or use Motorola produts for any suh unintended or unauthorized appliation, Buyer shall indemnify and hold Motorola and its offiers, employees, subsidiaries, affiliates, and distributors harmless against all laims, osts, damages, and expenses, and reasonable attorney fees arising out of, diretly or indiretly, any laim of personal injury or death assoiated with suh unintended or unauthorized use, even if suh laim alleges that Motorola was negligent regarding the design or manufature of the part. Motorola and are registered trademarks of Motorola, In. Motorola, In. is an Equal Opportunity/Affirmative Ation Employer. How to reah us: USA/EUROPE/Loations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; Tatsumi SPD JLD, 6F Seibu Butsuryu enter, P.O. Box 2092; Phoenix, Arizona or Tatsumi Koto Ku, Tokyo 35, Japan MFAX: RMFAX0@ .sps.mot.om TOUHTONE ASIA/PAIFI: Motorola Semiondutors H.K. Ltd.; 8B Tai Ping Industrial Park, INTERNET: NET.om 5 Ting Kok Road, Tai Po, N.T., Hong Kong M4093B 6 MOTOROLA MOS LOGI M4093B/D DATA

MC14024B SEMICONDUCTOR TECHNICAL DATA

MC14024B SEMICONDUCTOR TECHNICAL DATA SEMIONDUTO TEHNIAL DATA The M4024B is a 7 stage ripple counter with short propagation delays and high maximum clock rates. The eset input has standard noise immunity, however the lock input has increased