Output. Single Supply. Output. Input polarity is reversed when GND pin is used as an output. Load Referred to Negative Supply. Output.

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Single Comparators The ability to operate from a single power supply of. V to V or V split supplies, as commonly used with operational amplifiers, makes the LM/LM a truly versatile comparator.

1 Single Comparators The ability to operate from a single power supply of. V to V or V split supplies, as commonly used with operational amplifiers, makes the LM/LM a truly versatile comparator. Moreover, the inputs of the device can be isolated from system ground while the output can drive loads referenced either to ground, the or the supply. This flexibility makes it possible to drive DTL, RTL, TTL, or MOS logic. The output can also switch voltages to V at currents to ma, therefore, the LM/LM can be used to drive relays, lamps or solenoids. Features PbFree Packages are Available PDIP N SUFFIX CASE 66.k.k 6 Split Power Supply with Offset Balance Single Supply SOIC D SUFFIX CASE GroundReferred Load Input polarity is reversed when GND pin is used as an output. Load Referred to Positive Supply Input polarity is reversed when GND pin is used as an output. 6.k Strobe Capability Load Referred to Negative Supply TTL Strobe GN D PIN CONNECTIONS (Top View) 6 Balance/Strobe Balance ORDERING & DEVICE MARKING INFORMATION See detailed ordering and shipping information and marking information in the package dimensions section on page of this data sheet. Figure. Typical Comparator Design Configurations Semiconductor Components Industries, LLC, September, Rev. Publication Order Number: LM/D

2 MAXIMUM RATINGS (T A = C, unless otherwise noted.) Rating Symbol LM LM Unit Total Supply Voltage 6 6 Vdc to Negative Supply Voltage V O Vdc Ground to Negative Supply Voltage Vdc Input Differential Voltage V ID ± ± Vdc Input Voltage (Note ) V in ± ± Vdc Voltage at Strobe Pin to to Vdc Power Dissipation and Thermal Characteristics Plastic DIP P D 6 mw Derate Above T A = C R JA. mw/ C Operating Ambient Temperature Range T A to to C Operating Junction Temperature T J(max) C Storage Temperature Range T stg 6 to 6 to C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. ELECTRICAL CHARACTERISTICS ( = V, = V, T A = C, unless otherwise noted) Note LM LM Characteristic Symbol Min Typ Max Min Typ Max Unit Input Offset Voltage (Note ) V IO mv R S k, T A = C.... R S k, T low T A T high *. Input Offset Current (Note ) T A = C I IO.. na T low T A T high * Input Bias Current T A = C I IB na T low T A T high * Voltage Gain A V V/mV Response Time (Note ) ns Saturation Voltage V OL V V ID. mv, I O = ma, T A = C.. V ID mv, I O = ma, T A = C... V, =, T low T A T high * V ID 6. mv, I sink. ma.. V ID mv, I sink. ma.. Strobe On Current (Note ) I S.. ma Leakage Current V ID. mv, V O = V, T A = C, I strobe =. ma. na V ID mv, V O= V, T A = C, I strobe =. ma. na V ID. mv, V O= V, T low T A T high *.. A Input Voltage Range (T low T A T high *) V ICR.. to.... to.. V Positive Supply Current I CC ma Negative Supply Current I EE.... ma * LM: T low = C, T high = C LM: T low = C, T high = C. Offset voltage, offset current and bias current specifications apply for a supply voltage range from a single. V supply up to ± V supplies.. This rating applies for ± V supplies. The positive input voltage limit is V above the negative supply. The negative input voltage limit is equal to the negative supply voltage or V below the positive supply, whichever is less.. The offset voltages and offset currents given are the maximum values required to drive the output within a volt of either supply with a. ma load. Thus, these parameters define an error band and take into account the worst case effects of voltage gain and input impedance.. The response time specified is for a mv input step with. mv overdrive.. Do not short the strobe pin to ground; it should be current driven at. ma to. ma.

3 Balance Balance/Strobe.k 6.k.k.k.k.k.k 9.k.k 6 GND Figure. Circuit Schematic, INPUT BIAS CURRENT (na) I IB Normal Pins & 6 Tied to T A, TEMPERATURE ( C) Figure. Input Bias Current versus Temperature = V = V I IO, INPUT OFFSET CURRENT (na)..... Pins & 6 Tied to Normal T A, TEMPERATURE ( C) Figure. Input Offset Current versus Temperature = V = V, INPUT BIAS CURRENT (na) IIB DIFFERENTIAL INPUT VOLTAGE (V) = V = V T A = C Figure. Input Bias Current versus Differential Input Voltage COMMON MODE LIMITS (V)..... Referred to Supply Voltages T A, TEMPERATURE ( C) Figure 6. Common Mode Limits versus Temperature

4 V INPUT VOLTAGE (mv) in, V, OUTPUT VOLTAGE (V) O..... mv. mv. mv t TLH, RESPONSE TIME (s) V in Figure. Response Time for Various Input Overdrives.V V O = V = V T A = C V INPUT VOLTAGE (mv) in, V, OUTPUT VOLTAGE (V) O..... mv. mv. mv t THL, RESPONSE TIME (s) V in = V = V T A = C Figure. Response Time for Various Input Overdrives.V V O V INPUT VOLTAGE (mv) in, V, OUTPUT VOLTAGE (V) O.. mv. mv. mv.... t TLH, RESPONSE TIME (s) V in = V = V T A = C V O.k V INPUT VOLTAGE (mv) in, V, OUTPUT VOLTAGE (V) O.. mv. mv. mv V in t THL, RESPONSE TIME (s) = V = V T A = C V O.k Figure 9. Response Time for Various Input Overdrives Figure. Response Time for Various Input Overdrives OUTPUT SHORT CIRCUIT CURRENT (ma) Power Dissipation T A = C Short Circuit Current PD, POWER DISSIPATION (W) V, SATURATION VOLTAGE (V) OL T A = C T A = C T A = C. V O, OUTPUT VOLTAGE (V) Figure. Short Circuit Current Characteristics and Power Dissipation. 6 6 I O, OUTPUT CURRENT (ma) Figure. Saturation Voltage versus Current

5 OUTPUT LEAKAGE CURRENT (ma).. = V = V V O = V (LM only) POWER SUPPLY CURRENT (ma) T A = C Positive Supply Low Positive and Negative Power Supply H igh. 6 T A, TEMPERATURE ( C) Figure. Leakage Current versus Temperature., POWER SUPPLY VOLTAGE (V) Figure. Power Supply Current versus Supply Voltage SUPPLY CURRENT (ma) Postive Supply Low Positive and Negative Supply High = V = V. T A, TEMPERATURE ( C) Figure. Power Supply Current versus Temperature APPLICATIONS INFORMATION V V. k. k. k. F. k C k. F. k Input R C R 6 LM. F. k Input R C R C 6 LM V. F. M V k. F Figure 6. Improved Method of Adding Hysteresis Without Applying Positive Feedback to the Figure. Conventional Technique for Adding Hysteresis

6 TECHNIQUES FOR AVOIDING OSCILLATIONS IN COMPARATOR APPLICATIONS When a high speed comparator such as the LM is used with high speed input signals and low source impedances, the output response will normally be fast and stable, providing the power supplies have been bypassed (with. F disc capacitors), and that the output signal is routed well away from the inputs (Pins and ) and also away from Pins and 6. However, when the input signal is a voltage ramp or a slow sine wave, or if the signal source impedance is high (. k to k), the comparator may burst into oscillation near the crossingpoint. This is due to the high gain and wide bandwidth of comparators like the LM series. To avoid oscillation or instability in such a usage, several precautions are recommended, as shown in Figure 6. The trim pins (Pins and 6) act as unwanted auxiliary inputs. If these pins are not connected to a trimpot, they should be shorted together. If they are connected to a trimpot, a. F capacitor (C) between Pins and 6 will minimize the susceptibility to AC coupling. A smaller capacitor is used if Pin is used for positive feedback as in Figure 6. For the fastest response time, tie both balance pins to. Certain sources will produce a cleaner comparator output waveform if a pf to pf capacitor (C) is connected directly across the input pins. When the signal source is applied through a resistive network, R, it is usually advantageous to choose R of the same value, both for DC and for dynamic (AC) considerations. Carbon, tinoxide, and metalfilm resistors have all been used with good results in comparator input circuitry, but inductive wirewound resistors should be avoided. When comparator circuits use input resistors (e.g., summing resistors), their value and placement are particularly important. In all cases the body of the resistor should be close to the device or socket. In other words, there should be a very short lead length or printedcircuit foil run between comparator and resistor to radiate or pick up signals. The same applies to capacitors, pots, etc. For example, if R = k, as little as inches of lead between the resistors and the input pins can result in oscillations that are very hard to dampen. Twisting these input leads tightly is the best alternative to placing resistors close to the comparator. Since feedback to almost any pin of a comparator can result in oscillation, the printedcircuit layout should be engineered thoughtfully. Preferably there should be a groundplane under the LM circuitry (e.g., one side of a double layer printed circuit board). Ground, positive supply or negative supply foil should extend between the output and the inputs to act as a guard. The foil connections for the inputs should be as small and compact as possible, and should be essentially surrounded by ground foil on all sides to guard against capacitive coupling from any fast highlevel signals (such as the output). If Pins and 6 are not used, they should be shorted together. If they are connected to a trimpot, the trimpot should be located no more than a few inches away from the LM, and a. F capacitor should be installed across Pins and 6. If this capacitor cannot be used, a shielding printedcircuit foil may be advisable between Pins 6 and. The power supply bypass capacitors should be located within a couple inches of the LM. A standard procedure is to add hysteresis to a comparator to prevent oscillation, and to avoid excessive noise on the output. In the circuit of Figure, the feedback resistor of k from the output to the positive input will cause about. mv of hysteresis. However, if R is larger than, such as k, it would not be practical to simply increase the value of the positive feedback resistor proportionally above k to maintain the same amount of hysteresis. When both inputs of the LM are connected to active signals, or if a highimpedance signal is driving the positive input of the LM so that positive feedback would be disruptive, the circuit of Figure 6 is ideal. The positive feedback is applied to Pin (one of the offset adjustment pins). This will be sufficient to cause. mv to. mv hysteresis and sharp transitions with input triangle waves from a few Hz to hundreds of khz. The positivefeedback signal across the resistor swings mv below the positive supply. This signal is centered around the nominal voltage at Pin, so this feedback does not add to the offset voltage of the comparator. As much as. mv of offset voltage can be trimmed out, using the. k pot and. k resistor as shown. 6

7 Input Balance Adjust Balance. k = V. k LM = V GND k to CMOS Logic GND LM Q Balance/Strobe N or Equivalent.k TTL Strobe *D *Zener Diode D protects the comparator from inductive kickback and voltage transients on the supply line. Figure. ZeroCrossing Detector Driving CMOS Logic Figure 9. Relay Driver with Strobe Capability ORDERING INFORMATION LMD LMDR LMDRG Device Package Shipping SOIC SOIC SOIC (PbFree) 9 Units / Rail LMD SOIC Units / Reel LMDG LMDR LMDRG SOIC (PbFree) SOIC SOIC (PbFree) 9 Units / Rail Units / Reel LMN LMNG PDIP PDIP (PbFree) Units / Rail For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD/D. MARKING DIAGRAMS PDIP N SUFFIX CASE 66 SOIC D SUFFIX CASE LMN AWL YYWW LMx ALYW x = or A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week

8 PACKAGE DIMENSIONS PDIP N SUFFIX CASE 66 ISSUE L B NOTES:. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL.. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS).. DIMENSIONING AND TOLERANCING PER ANSI Y.M, 9. NOTE T SEATING PLANE H F A C N D K G. (.) M T A M B M L J M MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C.9... D.... F.... G. BSC. BSC H.6... J.... K.9... L.6 BSC. BSC M N.6...

9 SOIC D SUFFIX CASE ISSUE AC X B Y Z H G A D S C. (.) M Z Y S X S. (.) M SEATING PLANE Y. (.) M N X M K J NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.M, 9.. CONTROLLING DIMENSION: MILLIMETER.. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.. MAXIMUM MOLD PROTRUSION. (.6) PER SIDE.. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE. (.) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. THRU 6 ARE OBSOLETE. NEW STANDARD IS. MILLIMETERS INCHES DIM MIN MAX MIN MAX A B.... C D.... G. BSC. BSC H.... J.9... K...6. M N.... S SOLDERING FOOTPRINT* SCALE 6: mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 9

10 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 6, Phoenix, Arizona USA Phone: 9 or 6 Toll Free USA/Canada Fax: 99 or 6 Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: 9 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 9 Kamimeguro, Meguroku, Tokyo, Japan Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative. LM/D

MARKING DIAGRAMS PIN CONNECTIONS ORDERING INFORMATION PDIP 8 N SUFFIX CASE 626 LM311D AWL YYWW SO 8 98 Units/Rail

MARKING DIAGRAMS PIN CONNECTIONS ORDERING INFORMATION PDIP 8 N SUFFIX CASE 626 LM311D AWL YYWW SO 8 98 Units/Rail The ability to operate from a single power supply of 5.0 V to 30 V or 15 V split supplies, as commonly used with operational amplifiers, makes the LM211/LM311 a truly versatile comparator. Moreover, the