ACPL-M50L, ACPL-054L, ACPL-W50L and ACPL-K54L Low Power, 1MBd Digital Optocoupler. Features. Applications GND
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1 ACPL-M5L, ACPL-5L, ACPL-W5L and ACPL-K5L Low Power, MBd Digital Optocoupler Data Sheet Lead (Pb) Free RoHS 6 fully compliant RoHS 6 fully compliant options available; -xxxe denotes a lead-free product Description The ACPL-M5L (single-channel in SO-5 footprint), ACPL-5L (dual-channel in SO-8 footprint), ACPL-W5L (single-channel in stretched SO-6 footprint) and ACPL- K5L (dual-channel in stretched SO-8 footprint) are low power, low-input current, MBd digital optocouplers. This digital optocouplers use an insulating layer between the light emitting diode and an integrated photon detector to provide electrical insulation between input and output. Separate connections for the photodiode bias and output transistor collector increase the speed up to a hundred times over that of a conventional photo-transistor coupler by reducing the base-collector capacitance. The ACPL-M5L/5L/W5L/K5L have an increased common mode transient immunity of 5kV/µs minimum at V CM = 5V over a temperature range of - to 5 C. The current transfer ratio (CTR) is % typical for ACPL- M5L or % typical for ACPL-5L/W5L/K5L at I F = ma. This digital optocoupler can be use in any TTL/ CMOS, TTL/LSTTL or wide bandwidth analog applications. Features Wide supply voltage Vcc: 2.7V to 2V Low Drive Current: ma Open-Collector Output TTL compatible Compact SO-5, SO-8, stretched SO-6 and stretched SO-8 package 5 kv/μs High Common-Mode Rejection at V CM = 5 V Guaranteed performance from Temperature Range: - C to +5 C Low Propagation Delay: μs max at 5V Worldwide Safety Approval: UL577 recognized, 75Vrms/min for ACPL-M5L/5L, 5Vrms/min for ACPL-W5L/K5L, CSA Approval IEC/EN/DIN EN Approval for Reinforced Insulation Functional Diagram Applications Anode 6 V CC Anode 6 V CC Communications Interface Digital Signal Isolation 5 V O NC 2 5 V O Micro-controller Interface Cathode ACPL-M5L GND Cathode ACPL-W5L GND Feedback Elements in Switching Power Supplies Digital isolation for A/D, D/A conversion Digital field Anode 8 V CC Truth Table Cathode 2 7 V O LED Vo Cathode2 6 V O2 ON LOW Anode2 5 GND OFF HIGH ACPL-5L/K5L The connection of a. μf bypass capacitor between pins and 6 for ACPL-M5L/W5L and between pins 5 and 8 for ACPL-5L/K5L is recommended. CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
2 Ordering Information ACPL-M5L and ACPL-5L are UL Recognized with 75 Vrms for minute per UL577. ACPL-W5L and ACPL-K5L are UL Recognized with 5 Vrms for minute per UL577 Part Number Options RoHS Compliant Package Surface Mount Tape & Reel IEC/EN/DIN EN Quantity ACPL-M5L -E SO-5 X per tube -6E X X per tube -5E X X 5 per reel -56E X X X 5 per reel ACPL-5L -E SO-8 X per tube -6E X X per tube -5E X X 5 per reel -56E X X X 5 per reel ACPL-W5L -E Stretched X per tube -6E SO-6 X X per tube -5E X X per reel -56E X X X per reel ACPL-K5L -E Stretched X 8 per tube -6E SO-8 X X 8 per tube -5E X X per reel -56E X X X per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example : ACPL-M5L-5E to order product of Mini-flat Surface Mount 5-pin package in Tape and Reel packaging with RoHS compliant. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information. 2
3 Package Outline Drawings ACPL-M5L Small Outline SO-5 Package (JEDEC MO-55). ±. (.7 ±.) M5L YWW 7. ±.2 (.276 ±.8) ANODE 6 V CC 5 V OUT CATHODE GND.6 ±.* (.2 ±.). ±.5 (.6 ±.2) 2.5 ±. (.98 ±.).2 ±.2 (. ±.).26 ±.8 (.85 ±.5).27 (.5) BSC.7 (.28) MIN 7 MAX. Dimensions in Millimeters (Inches) * Maximum mold flash on each side is.5 mm (.6) Note: Floating lead protrusion is.5 mm (6 mils) max. MAX. LEAD COPLANARITY =.2 (.) Land Pattern Recommendation. (.7) 2.5 (.). (.5).8 (.72) 8.27 (.25).6 (.25) Dimension in Millimeters (Inches)
4 ACPL-5L (Small Outline S-8 Package) LAND PATTERN RECOMMENDATION LEAD FREE.97 ±.27 (.55 ±.5) PIN ONE LV YWW 5.99 ±.2 (.26 ±.8).6 ±.76 (.6 ±.).27 (.5) BSC TYPE NUMBER ( V for OPTION 6) DATE CODE.6 (.25).9 (.75) 7.9 (.295) * 5.8 ±.27 (.2 ±.5) 7 5 X.2 (.7).75 ±.27 (.25 ±.5).52 (.6) ~ ±.25 (.9 ±.) * Total package length (inclusive of mold flash) 5.27 ±.25 (.25 ±.) Dimensions in Millimeters (Inches). Lead coplanarity =. mm (. inches) max. Option number 5 not marked. Note: Floating lead protrusion is.5 mm (6 mils) max. ACPL-W5L Stretched SO-6 Package.5 (.2) MIN..2 ±.2 (.8 ±.) 6 5.8±.25 (.8±.).27 (.5) BSG LAND PATTERN RECOMMENDATION 2.65 (.98) ROHS-COMPLIANCE INDICATOR W5L YWW PART NUMBER DATE CODE.76 (.).9 (.75) 7 2.8±.27 (.5±.5).5 (.8) ( ).59±.27 (.6±.5).2±. (.8±.).8±.27 (.25±.5) Dimensions in Millimeters (Inches). Lead coplanarity =. mm (. inches)..75±.25 (.295±.).5±.25 (.5±.)
5 ACPL-K5L Stretched SO-8 Package ±.25 (.2±.).27 (.5) BSG LAND PATTERN RECOMMENDATION ROHS-COMPLIANCE INDICATOR K5L YWW PART NUMBER DATE CODE.95 (.) 7 2.8±. (.5±.5).5 (.8) (.5) 5.59±.27 (.6±.5).2±. (.8±.).8±.27 (.25±.5).75±.25 Dimensions in Millimeters (Inches). (.295±.) Lead coplanarity =. mm (. inches). 6.87±.27 (.268±.5).5±.25 (.5±.) Solder Reflow Profile Recommended reflow condition as per JEDEC Standard, J-STD-2 (latest revision). Non-Halide Flux should be used. Regulatory Information The ACPL-M5L/5L/W5L/K5L will be approved by the following organizations: UL Approval under UL 577, component recognition program up to V ISO = 75 V RMS for ACPL-M5L/5L and V ISO = 5 V RMS for ACPL-W5L/K5L. CSA Approval under CSA Component Acceptance Notice #5. IEC/EN/DIN EN (Option 6E only) 5
6 Insulation and Safety Related Specifications Parameter Symbol ACPL-M5L ACPL-5L Minimum External Air Gap (Clearance) Minimum External Tracking (Creepage) Minimum Internal Plastic Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) ACPL-W5L ACPL-K5L Units Conditions L() mm Measured from input terminals to output terminals, shortest distance through air. L(2) mm Measured from input terminals to output terminals, shortest distance path along body mm Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. CTI Volts DIN IEC 2/VDE Part Isolation Group IIIa IIIa IIIa Material Group (DIN VDE, /89, Table ) IEC/EN/DIN EN Insulation Characteristics* (Option 6E) Description Installation classification per DIN VDE /9, Table for rated mains voltage 5 V rms for rated mains voltage V rms for rated mains voltage 6 V rms for rated mains voltage V rms Symbol Characteristic Unit ACPL-M5L/ 5L ACPL-W5L/ K5L Climatic Classification 55/5/2 55/5/2 I IV I III I II Pollution Degree (DIN VDE /9) 2 2 Maximum Working Insulation Voltage V IORM 56 Vpeak Input to Output Test Voltage, Method b* V IORM x.875 = V PR, % Production Test with t m = sec, Partial discharge < 5 pc Input to Output Test Voltage, Method a* V IORM x.6 = V PR, Type and Sample Test, t m = sec, Partial discharge < 5 pc I IV I IV I III I III V PR 5 27 Vpeak V PR Vpeak Highest Allowable Overvoltage (Transient Overvoltage t ini = 6 sec) V IOTM 6 8 Vpeak Safety-limiting values maximum values allowed in the event of a failure. Case Temperature Input Current** Output Power** T S I S, INPUT P S, OUTPUT Insulation Resistance at TS, V IO = 5 V R S > 9 > 9 Ω * Refer to the optocoupler section of the Isolation and Control Components Designer s Catalog, under Product Safety Regulations section, (IEC/EN/DIN EN ) for a detailed description of Method a and Method b partial discharge test profiles. ** Refer to the following figure for dependence of P S and I S on ambient temperature C ma mw 6
7 Absolute Maximum Ratings Parameter Symbol Min. Max. Units Storage Temperature T S C Operating Temperature T A - 5 C Lead Soldering Cycle Temperature 26 C Time s Average Forward Input Current [] I F(avg) 2 ma Peak Forward Input Current [2] (5% duty cycle, ms pulse width) Peak Transient Input Current ( µs pulse width, ps) I F(peak) ma I F(trans) A Reversed Input Voltage V R 5 V Input Power Dissipation [] P IN 6 mw Output Power Dissipation [] P O 5 mw Average Output Current I O(AVG) 8 ma Peak Output Current I O(PEAK) 6 ma Supply Voltage V CC -.5 V Output Voltage V O V Solder Reflow Temperature Profile Notes:. Derate linearly above 85 C free-air temperature at a rate of.5 ma/ C. 2. Derate linearly above 85 C free-air temperature at a rate of. ma/ C.. Derate linearly above 85 C free-air temperature at a rate of.9 mw/ C.. Derate linearly above 85 C free-air temperature at a rate of.2 mw/ C. See Package Outline Drawings section Recommended Operating Conditions Parameter Symbol Min. Max. Units Supply Voltage V CC V Input Current, High Level I FH ma Operating Temperature T A - 5 C Forward Input Voltage (OFF) V F(OFF).8 V 7
8 Electrical Specifications (DC) Over recommended operating T A = - C to 5 C, supply voltage (2.7V V CC 2V) and unless otherwise specified. All typicals are at T A =25 C Parameter Sym. Part Number Min. Typ. Max. Units Conditions Fig. Current Transfer Ratio Logic Low Output Voltage Logic High Output Current Logic Low Supply Current per Channel Logic High Supply Current per Channel Input Forward Voltage Input Reversed Breakdown Voltage Temperature Coefficient of Forward Voltage CTR [] ACPL-M5L 2 % T A = 25 C V O =.V V CC =.V or 5V 8 % V O =.5V I F =ma ACPL-5L ACPL-W5L ACPL-K5L 9 2 % T A = 25 C V O =.V V CC =.V or 5V 5 % V O =.5V I F =ma V OL.2. V T A = 25 C I O =ma V CC =.V or 5V.2.5 V I O =.6mA I F =ma I OH..5 µa T A = 25 C V O =V CC =5.5V I F =ma,5. V O =V CC =2V 8 V O =V CC =2V I CCL 6 µa I F =ma, V O =open, V CC =2V I CCH.2 2 µa I F =ma, V O =open, V CC =2V V F.5.8 V T A =25 C I F =ma.5.95 V I F =ma BV R 5 V I R =µa V F / -.6 mv/ C I F =ma T A Input Capacitance C IN 77 pf F = MHz, V F = Notes:. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, I O, to the forward LED input current, I F, times %. 2, 2, 8
9 Switching Specifications (ACPL-M5L) Over recommended operating (T A = - C to 5 C), I F = ma, (2.7V V CC 2V), unless otherwise specified. Parameter Symbol Min Typ Max Units Test Conditions Fig. Propagation Delay Time to Logic Low at Output Propagation Delay Time to Logic High at Output T PHL.2.5 µs T A =25 C Pulse: f=khz, Duty cycle=5%,.2 µs I F = ma, V CC =. V, R L =.2kΩ, C L =5pF, V THHL =.5V 6a,.22.5 µs T A =25 C Pulse: f=khz, Duty cycle=5%,.22 µs I F = ma, V CC =5. V, R L =.9kΩ, C L =5pF, V THHL =.5V 7a,..7 µs T A =25 C Pulse: f=khz, Duty cycle=5%,.. µs I F = ma, V CC =2V, R L =kω, C L =5pF, V THHL =.5V 8a, T PLH.8.8 µs T A =25 C Pulse: f=khz, Duty cycle=5%,.8.2 µs I F = ma, V CC =. V, R L =.2kΩ, C L =5pF, V THHL =2.V 6a,..7 µs T A =25 C Pulse: f=khz, Duty cycle=5%,. µs I F = ma, V CC =5. V, R L =.9kΩ, C L =5pF, V THHL =2.V 7a,..7 µs T A =25 C Pulse: f=khz, Duty cycle=5%,. µs I F = ma, V CC =2V, R L =kω, C L =5pF, V THHL =2.V 8a, Pulse Width Distortion [] PWD.8.8 µs T A =25 C Pulse: f=khz, Duty cycle=5%,.8.2 µs I F = ma, V CC =. V, R L =.2kΩ, C L =5pF, V THHL =.5V, V THLH =2.V Propagation Delay Difference Between Any two Parts [2] Common Mode Transient Immunity at Logic High Output [] Common Mode Transient Immunity at Logic Low Output []..7 µs T A =25 C Pulse: f=khz, Duty cycle=5%,. µs I F = ma, V CC =5.V, R L =.9kΩ, C L =5pF, V THHL =.5V, V THLH =2.V..7 µs T A =25 C Pulse: f=khz, Duty cycle=5%,. µs I F = ma, V CC =2V, R L =kω, C L =5pF, V THHL =.5V, V THLH =2.V t psk.8.7 µs T A =25 C Pulse: f=khz, Duty cycle=5%, I F = ma, V CC =. V, R L =.2kΩ, C L =5pF, V THHL =.5V, V THLH =2.V..6 µs T A =25 C Pulse: f=khz, Duty cycle=5%, I F = ma, V CC =5.V, R L =.9kΩ, C L =5pF, V THHL =.5V, V THLH =2.V..6 µs T A =25 C Pulse: f=khz, Duty cycle=5%, I F = ma, V CC =2V, R L =kω, C L =5pF, V THHL =2.V CM H 5 25 kv/µs V CM =5V, I F =ma, T A =25 C, R L =.2kΩ or.9kω, V CC =. V or 5V CM L 5 2 kv/µs V CM =5V, I F =ma, T A =25 C, R L =.2kΩ, V CC =5V 5 kv/µs V CM =5V, I F =ma, T A =25 C, R L =.2kΩ, V CC =. V
10 Switching Specifications (ACPL-5L/W5L/K5L) Over recommended operating (T A = - C to 5 C), I F = ma, (2.7V V CC 2V), unless otherwise specified. Parameter Symbol Min Typ Max Units Test Conditions Fig. Propagation Delay Time to Logic Low at Output Propagation Delay Time to Logic High at Output T PHL.2.5 µs T A =25 C Pulse: f=khz, Duty cycle=5%,.2 µs I F =ma, V CC =. V, R L =.8kΩ, C L =5pF, V THHL =.5V 6b,.22.5 µs T A =25 C Pulse: f=khz, Duty cycle=5%,.22 µs I F =ma, V CC =5. V, RL= 2.9kΩ, C L =5pF, V THHL =.5V 7b,..7 µs T A =25 C Pulse: f=khz, Duty cycle=5%,.. µs I F =ma, V CC =2V, R L =.8kΩ, C L =5pF, V THHL =.5V 8b, T PLH.8.8 µs T A =25 C Pulse: f=khz, Duty cycle=5%,.8. µs I F =ma, V CC =. V, R L =.8kΩ, C L =5pF, V THHL =2.V 6b,..7 µs T A =25 C Pulse: f=khz, Duty cycle=5%,. µs I F =ma, V CC =5. V, R L =2.9kΩ, C L =5pF, V THHL =2.V 7b,..7 µs T A =25 C Pulse: f=khz, Duty cycle=5%,. µs I F =ma, V CC =2V, R L =.8kΩ, C L =5pF, V THHL =2.V 8b, Pulse Width PWD.8.8 µs T A =25 C Pulse: f=khz, Duty cycle=5%, Distortion [].8. µs I F =ma, V CC =. V, R L =.8kΩ, C L =5pF, V THHL =.5V, V THLH =2.V Propagation Delay Difference Between Any two Parts [2] Common Mode Transient Immunity at Logic High Output [] Common Mode Transient Immunity at Logic Low Output []..7 µs T A =25 C Pulse: f=khz, Duty cycle=5%,. µs I F =ma, V CC =5.V, RL = 2.9kΩ, C L =5pF, V THHL =.5V, V THLH =2.V..7 µs T A =25 C Pulse: f=khz, Duty cycle=5%,. µs I F =ma, V CC =2V, R L =.8kΩ, C L =5pF, V THHL =.5V, V THLH =2.V t psk.8.7 µs T A =25 C Pulse: f=khz, Duty cycle=5%, I F =ma, V CC =. V, R L =.8kΩ, C L =5pF, V THHL =.5V, V THLH =2.V..6 µs T A =25 C Pulse: f=khz, Duty cycle=5%, I F =ma, V CC =5.V, R L =2.9kΩ, C L =5pF, V THHL =.5V, V THLH =2.V..6 µs T A =25 C Pulse: f=khz, Duty cycle=5%, I F =ma, V CC =2V, R L =.8kΩ, C L =5pF, V THHL =.5V, V THLH =2.V CM H 5 25 kv/µs V CM =5V, I F =ma, T A =25 C, R L =.8kΩ or 2.9kΩ, V CC =. V or 5V CM L 5 2 kv/µs V CM =5V, I F =ma, T A =25 C, R L =2.9kΩ, V CC =5V 5 2 kv/µs V CM =5V, I F =ma, T A =25 C, R L =.8kΩ, V CC =. V Notes:. Pulse Width Distortion (PWD) is defined as - for any given device. 2. The difference between and between any two parts under the same test condition. (See IPM Dead Time and Propagation Delay Specifications section.). Common transient immunity in a Logic High level is the maximum tolerable (positive) dv CM /dt on the rising edge of the common mode pulse, V CM, to assure that the output will remain in a Logic High state (i.e., V O > 2. V).. Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dv CM /dt on the falling edge of the common mode pulse signal, V CM to assure that the output will remain in a Logic Low state (i.e., V O <.8 V)
11 Package Characteristics All Typical at T A = 25 C. Parameter Symbol Part Number Min. Typ. Max. Units Test Conditions Input-Output Momentary V ISO ACPL-M5L/5L 75 V rms RH 5%, t = min., Withstand Voltage [,2] ACPL-W5L/K5L 5 T A = 25 C Input-Output Resistance [] R I-O Ω V I-O = 5 Vdc Input-Output Capacitance [] C I-O.6 pf f = MHz, T A = 25 C Input-Input Insulation I I-I.5 µa RH 5%, t = 5 s Leakage Current [] V I-I = 5Vdc Input-Input Resistance [] R I-I Ω Input-Input Capacitance [] C I-I.25 pf f = MHz Notes:. Device considered a two terminal device: pins and shorted together and pins, 5 and 6 shorted together for ACPL-M5L, pins, 2, and shorted together and pins 5, 6, 7 and 8 shorted together for ACPL-5L/K5L, pins, 2 and shorted together and pins, 5 and 6 shorted together for ACPL-W5L. 2. In accordance with UL 577, each optocoupler is proof tested by applying an insulation test voltage 5 V RMS for second for ACPL-M5L/5L and 6 V RMS for second for ACPL-W5L/K5L (leakage detection current limit, I I-O 5 μa).. Measured between pins and 2 shorted together and pins and shorted together for ACPL-5L/K5L.
12 IF - FORWARD CURRENT - ma T A = 25 C. I F V F - FORWARD VOLTAGE - V Figure. Input Current vs. Forward Voltage V F NORMALIZED CURRENT TRANSFER RATIO NORMALIZED I F = ma V O =. V V CC =. V T A - TEMPERATURE - C Figure 2. Typical Current Transfer Ratio vs. Temperature NORMALIZED CURRENT TRANSFER RATIO..9.8 NORMALIZED.7 I F = ma V O =. V. V CC = 5 V T A - TEMPERATURE - C T A - TEMPERATURE - C Figure. Typical Current Transfer Ratio vs. Temperature IOH - LOGIC HIGH OUTPUT CURRENT - na I F = ma V O = V CC =. V Figure. Typical Logic High Output Current vs. Temperature IOH - LOGIC HIGH OUTPUT CURRENT - na. I F = ma V O = V CC = 5 V T A - TEMPERATURE - C Figure 5. Typical Logic High Output Current vs. Temperature 2
13 I F = ma, V CC =. V R L =.9 kω R L =.2 kω T A - TEMPERATURE - C Figure 6a. Typical Propagation Delay vs. Temperature (ACPL-M5L) I F = ma, V CC =. V R L =.8 kω T A - TEMPERATURE - C Figure 6b. Typical Propagation Delay vs. Temperature (ACPL-5L/W5L/K5L) I F = ma, V CC = 5 V R L =. kω R L =.9 kω T A - TEMPERATURE - C T A - TEMPERATURE - C Figure 7a. Typical Propagation Delay vs. Temperature (ACPL-M5L) I F = ma, V CC = 5 V R L = 2.9 kω Figure 7b. Typical Propagation Delay vs. Temperature (ACPL-5L/W5L/K5L) I F = ma, V CC = 2 V R L = 2 kω R L = kω I F = ma, V CC = 2 V R L =.8 kω T A - TEMPERATURE - C T A - TEMPERATURE - C Figure 8a. Typical Propagation Delay vs. Temperature (ACPL-M5L) Figure 8b. Typical Propagation Delay vs. Temperature (ACPL-5L/W5L/K5L)
14 I F = ma, V CC =. V I F = ma I F = ma R L - LOAD RESISTANCE - kω Figure 9. Typical Propagation Delay vs. Load Resistance I F = ma, V CC = 2 V R L = kω, T A = 25 C 2 5 C L - LOAD CAPACITANCE - pf Figure a. Typical Propagation delay vs. Load Capacitance (ACPL-M5L) I F = ma, V CC = 5 V I F = ma I F = ma 2 R L - LOAD RESISTANCE - kω Figure. Typical Propagation Delay vs. Load Resistance I F = ma, V CC = 2 V R L =.8 kω, T A = 25 C 2 5 C L - LOAD CAPACITANCE - pf Figure b. Typical Propagation delay vs. Load Capacitance (ACPL-5L/W5L/K5L) I F = ma R L = kω T A = 25 C I F = ma R L =.8 kω T A = 25 C V CC - SUPPLY VOLTAGE - V V CC - SUPPLY VOLTAGE - V Figure 2a. Typical Propagation Delay vs. Supply Voltage (ACPL-M5L) Figure 2b. Typical Propagation Delay vs. Supply Voltage (ACPL-5L/W5L/K5L)
15 6 5 2 V CC = 2 V R L = kω T A = 25 C V CC = 2 V R L =.8 kω T A = 25 C I F - FORWARD LED CURRENT - ma Figure a. Typical Propagation Delay vs. Supply Current (ACPL-M5L) I F - FORWARD LED CURRENT - ma Figure b. Typical Propagation Delay vs. Supply Current (ACPL-5L/W5L/K5L) I F V O V THHL V CC V THLH V OL PULSE GEN. Z O = 5 Ω t r = 5 ns I F MONITOR I F 6 5.µF R L C L V CC V O R M Figure. Switching Test Circuits V CM V V O V t r % 9% 9% SWITCH AT A: I = ma F % tf V CC V FF B A I F 6 5.µF R L C L V CC V O V O SWITCH AT B: I = ma F V OL V CM + PULSE GEN. Figure 5. Test Circuit for Transient Immunity and typical waveforms 5
16 CTR - CURRENT TRANSFER RATIO - % V O =. V V CC = 5 V I F - FORWARD CURRENT - ma IO - OUTPUT CURRENT - ma 2 - T A = 25 o C V CC = 5 V I F = 2 ma I F = 5 ma I F = ma I F = 5 ma V O - OUTPUT VOLTAGE - V Figure 6. Current Transfer Ratio versus Input Current Figure 7. DC Pulse Transfer Characteristic For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright 25-2 Avago Technologies. All rights reserved. AV2-222EN - October 2, 2
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