Dual Channel Low Input Current, High Gain Optocouplers Technical Data

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1 Dual Channel Low Input Current, High Gain Optocouplers Technical Data HCPL-7 HCPL-7 HCPL-7 HCPL-7 Features High Current Transfer Ratio % Typical Low Input Current Requirements.5 ma Low Output Saturation Voltage. V High Density Packaging Performance Guaranteed over Temperature C to7 C LSTTL Compatible High Output Current ma Safety Approval UL Recognized - 75 V rms for Minute and 5 V rms* for minute CSA Approved Available in Pin DIP and SO- Footprint MIL-PRF-5 Hermetic Version Available (HCPL- 57/57) Surface Mount Gull Wing Option Available for -Pin DIP (Option ) Applications Digital Logic Ground Isolation Telephone Ring Detector Level Shifting EIA RS-C Line Receiver Polarity Sensing Low Input Current Line Receiver - Long Line or Party Line Microprocessor Bus Isolation Current Loop Receiver Line Voltage Status Indicator -Low Input Power Dissipation Functional Diagram ANODE CATHODE CATHODE ANODE 7 5 V CC V O V O GND Description These dual channel optocouplers contain a separated pair of GaAsP light emitting diodes optically coupled to a pair of integrated high gain photo detectors. They provide extremely high current transfer ratio and excellent inputoutput common mode transient immunity. A separate pin for the photodiodes and first gain stages (V CC ) permits lower output saturation voltage and higher speed operation than possible with conventional photodarlington type optocouplers. In addition, V CC may be as low as. V TRUTH TABLE LED V O ON LOW OFF HIGH *5 V rms/ minute withstand voltage rating is for Option (HCPL-7, HCLP-7) products only. A. µf bypass capacitor connected between pins 5 and is recommended. CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.

2 without adversely affecting the parametric performance. These dual channel optocouplers are available in an -Pin DIP and in an industry standard SO- package. The following is a cross reference table listing the -Pin DIP part number and the electrically equivalent SOIC- part number. -Pin DIP SO- HCPL-7 HCPL-7 HCPL-7 HCPL-7 The SO- does not require through holes in a PCB. This package occupies approximately one-third the footprint area of the standard dual-in-line package. The lead profile is designed to be compatible with standard surface mount processes. Guaranteed operation at low input currents and the high current transfer ratio (CTR) reduce the magnitude and effects of CTR degradation. The outstanding high temperature performance of this split Darlington type output amplifier results from the inclusion of an integrated emitter-base bypass resistor which shunts photodiode and first stage leakage currents to ground. The HCPL-7/7 have a % minimum CTR at an input current of only.5 ma making it ideal for use in low input current applications such as MOS, CMOS, and low power logic interfacing or RSC data transmission systems. In addition, the high CTR and high output current capability make this device extremely useful in applications where a high fanout is required. Compatibility with high voltage CMOS logic systems is guaranteed by the V V CC and V O specifications and by testing output high leakage (I OH ) at V. The HCPL-7/7 are specified at an input current of. ma and have a 7 V V CC and V O rating. The % minimum CTR allows TTL to TTL interfacing at this input current. Important specifications such as CTR, leakage current, and output saturation voltage are guaranteed over the C to 7 C temperature range to allow trouble-free system operation. Selection for lower input currents down to 5 µa is available upon request. Selection Guide Widebody -Pin DIP Package Hermetic ( Mil) Small Outline SO- ( mil) Single and Dual Single Dual Minimum Absolute Dual Single Channel Channel Channel Single Input ON Maxi- Channel Channel Package Package Package Channel Current Minimum mum Packages Package HCPL- HCPL- HCPL- Package (I F ) CTR V CC HCPL- N9 [] 7 7 [] 7 HCNW9 [].5 ma % V N [] 7 7 [] 7 HCNW []. ma % 7 V HCPL-7 [] 7 [] 7A [] 7A [] µa % V.5 ma % V 57 [] 57 [] 57 [] 57 [] Note:. Technical data are on separate Agilent publications.

3 Ordering Information Specify Part Number followed by Option Number (if desired). Example: HCPL-7#XXXX = 5 V rms/ Minute UL Rating Option.* = Gull Wing Surface Mount Option, 5 per tube.** 5 = Tape and Reel Packaging Option, per reel. XXXE = Lead Free Option Option data sheets available. Contact your Agilent sales representative or authorized distributor for information. *For HCPL-7 and HCPL-7 only. **Gull wing surface mount option applies to through hole parts only. Remarks: The notation # is used for existing products, while (new) products launched since 5th July and lead free option will use Schematic + I I F CC VCC V F I O VO 7 V F I F I O V O + HCPL-7/7 SHIELD GND 5 USE OF A. µf BYPASS CAPACITOR CONNECTED BETWEEN PINS 5 AND IS RECOMMENDED (SEE NOTE )

4 UR Package Outline Drawings -Pin DIP Package (HCPL-7/HCPL-7) 9.5 ±.5 (. ±.) 7. ±.5 (. ±.) TYPE NUMBER 7 A XXXXZ 5 OPTION CODE* DATE CODE.5 ±.5 (.5 ±.) YYWW UL RECOGNITION.9 (.7) MAX..7 (.7) MAX..5 ±. (. ±.5).7 (.5) MAX. 5 TYP (. +.) -.).9 (.5) MIN..5 (.) MIN.. ±. (. ±.).5 (.5) MAX..5 ±.5 (. ±.) DIMENSIONS IN MILLIMETERS AND (INCHES). *MARKING CODE LETTER FOR OPTION NUMBERS "L" = OPTION OPTION NUMBERS AND 5 NOT MARKED. NOTE: FLOATING LEAD PROTRUSION IS.5 mm ( mils) MAX. -Pin DIP Package with Gull Wing Surface Mount Option (HCPL-7/HCPL-7) LAND PATTERN RECOMMENDATION 9.5 ±.5 (. ±.). (.) ±.5 (.5 ±.).9 (.).7 (.5). (.).9 (.7) MAX..7 (.7) MAX..5 ±. (. ±.5) 9.5 ±.5 (. ±.) 7. ±.5 (. ±.) (. +.) -.). ±. (. ±.).5.5 ±. (.) (.5 ±.5) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY =. mm (. INCHES)..5 ±.5 (.5 ±.) NOM. NOTE: FLOATING LEAD PROTRUSION IS.5 mm ( mils) MAX.

5 5 Small Outline SO- Package (HCPL-7/HCPL-7) LAND PATTERN RECOMMENDATION.97 ±.7 (.55 ±.5) PIN ONE 7 5 XXX YWW. ±.7 (. ±.).7 (.5) BSC 5.99 ±. (. ±.) TYPE NUMBER (LAST DIGITS) DATE CODE. (.5).9 (.75) 7.9 (.95) * 5. ±.7 (. ±.5) 7 5 X. (.7).75 ±.7 (.5 ±.5).5 (.). ±.5 (.9 ±.) * TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH) 5.7 ±.5 (.5 ±.) DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY =. mm (. INCHES) MAX..5 (.) MIN.. ±. (. ±.) NOTE: FLOATING LEAD PROTRUSION IS.5 mm ( mils) MAX.

6 Solder Reflow Thermal Profile TEMPERATURE ( C) ROOM TEMPERATURE PREHEATING RATE C + C/.5 C/SEC. REFLOW HEATING RATE.5 C ±.5 C/SEC. C 5 C C C + C/.5 C.5 C ±.5 C/SEC. PREHEATING TIME 5 C, 9 + SEC. PEAK TEMP. 5 C SEC. SEC. 5 SEC. PEAK TEMP. C SOLDERING TIME C PEAK TEMP. C TIGHT TYPICAL LOOSE Regulatory Information The HCPL-7/7 have been approved by the following organizations: UL Recognized under UL 577, Component Recognition Program, File E55. CSA Approved under CSA Component Acceptance Notice #5, File CA. TIME (SECONDS) Recommended Pb-Free IR Profile TEMPERATURE T p +/-5 C T L 7 C RAMP-UP C/SEC. MAX. T smax 5 - C T smin t s PREHEAT to SEC. t p t L TIME WITHIN 5 C of ACTUAL PEAK TEMPERATURE - SEC. RAMP-DOWN C/SEC. MAX. to 5 SEC. 5 t 5 C to PEAK TIME NOTES: THE TIME FROM 5 C to PEAK TEMPERATURE = MINUTES MAX. T smax = C, T smin = 5 C

7 7 Insulation Related Specifications (HCPL-7/7/7/7) -Pin DIP ( Mil) SO- Parameter Symbol Value Value Units Conditions Minimum External Air L() 7..9 mm Measured from input terminals to Gap (External output terminals, shortest distance Clearance) through air. Minimum External L() 7.. mm Measured from input terminals to Tracking (External output terminals, shortest distance Creepage) path along body. Minimum Internal Plastic.. mm Through insulation distance, conductor Gap (Internal Clearance) to conductor, usually the direct distance between the photoemitter and photodetector inside the optocoupler cavity. Tracking Resistance CTI Volts DIN IEC / VDE Part (Comparative Tracking Index) Isolation Group IIIa IIIa Material Group DIN VDE Option surface mount classification is Class A in accordance with CECC. Absolute Maximum Ratings (No Derating Required up to 5 C) Parameter Symbol Min. Max. Units Storage Temperature T S C Operating Temperature T A - 5 C Average Forward Input Current I F(AVG) ma Peak Forward Input Current I FPK ma (5% Duty Cycle, ms Pulse Width) Reverse Input Voltage (Each Channel) V R 5 V Input Power Dissipation (Each Channel) P I 5 mw Output Current (Each Channel) I O ma Supply Voltage and Output Voltage V CC -.5 V (HCPL-7, HCPL-7) (V CC - Pin -5, V O - Pin 7,-5) -Note Supply Voltage and Output Voltage V CC V (HCPL-7, HCPL-7) (V CC - Pin -5, V O - Pin 7,-5) -Note Output Power Dissipation (Each Channel) -Note P O mw Total Power Dissipation (Each Channel) P T 5 mw Lead Solder Temperature (for Through Hole Devices) C for sec.,. mm below seating plane Reflow Temperature Profile See Package Outline Drawings section (for SOIC- and Option #) Recommended Operating Conditions Parameter Symbol Min. Max. Units Power Supply Voltage (HCPL-7/HCPL-7) V CC.5 V Power Supply Voltage (HCPL-7/HCPL-7) V CC.5 7 V Forward Input Current (ON) I F(ON).5 ma Forward Input Voltage (OFF) V F(OFF). V Operating Temperature T A 7 C

8 Electrical Specifications C T A 7 C,.5 V V CC V,.5 ma I F(ON) ma, V V F(OFF). V, unless otherwise specified. All Typicals at T A = 5 C. (See note.) Device Parameter Sym. HCPL- Min. Typ.* Max. Units Test Conditions Fig. Note Current CTR 7 5 % I F =.5 ma V CC =.5, Transfer 7 V O =. V Ratio 5 I F =. ma 7/7 I F =. ma Logic Low V OL 7.. V I F =. ma, V CC =.5 V Output 7 I O = ma Voltage.. I F = 5. ma, I O = 5 ma.. I F = ma, I O = ma 7/7.. I F =. ma, I O =. ma Logic High I OH 7/7.5 µa V O = V CC = V I F = ma Output Current 7/7. 5 V O = V CC = 7 V Logic Low I CCL 7/7. ma V CC = V I F = I F =. ma 5 Supply V = V = Open Current 7/7.9 V CC = 7 V Logic High I CCH 7/7.5 µa V CC = V I F = I F = ma, 5 Supply V = V = Open Current 7/7. V CC = 7 V Input V F..7 V T A = 5 C Forward Voltage.75 I F =. ma Input BV R 5. V I R = µa, T A = 5 C Reverse Breakdown Voltage Temperature V F -. mv/ C I F =. ma Coefficient T A of Forward Voltage Input C IN pf f = MHz, V F = Capacitance *All typical values at T A = 5 C and V CC = 5 V, unless otherwise noted.

9 9 Switching Specifications (AC) Over recommended operating conditions (T A = C to 7 C), V CC = 5 V, unless otherwise specified. (See note.) Device Parameter Sym. HCPL- Min. Typ.* Max. Units Test Conditions Fig. Note Propagation Delay t PHL 7 5 µs T A = 5 C, 7, Time to Logic 7, 9 Low at Output I F =.5 ma Rl =.7 kω 7 5 T A = 5 C I F =. ma, Rl =. kω.5 T A = 5 C I F = ma, Rl = 7 Ω Propagation Delay t PLH 7 µs T A = 5 C 7,, Time to Logic 7 9 High at Output 9 I F =.5 ma, Rl =.7 kω 7 5 T A = 5 C I F =. ma, Rl =. kω T A = 5 C 5 I F = ma, Rl = 7 Ω Common Mode CM H V/µs I F = ma, T A = 5 C,,, Transient Immunity Rl =. kω 7 at Logic High V CM = V p-p Output Common Mode CM L V/µs I F =. ma, T A = 5 C, Transient Immunity Rl =. kω at Logic Low Level V CM = V p-p Output *All typical values at T A = 5 C and V CC = 5 V, unless otherwise noted.

10 Package Characteristics Device Parameter Symbol HCPL- Min. Typ.* Max. Units Test Conditions Fig. Note Input-Output Momentary V ISO 75 V rms RH 5%,, 9 Withstand Voltage** t = min., Option 7 5 T A = 5 C, 7 Resistance R I-O Ω V I-O = 5 VDC (Input-Output) RH 5% Capacitance C I-O. pf f = MHz (Input-Output) Input-Input Insulation I I-I.5 µa RH 5% 5 Leakage Current V I-I = 5 VDC Input-Input Insulation R I-I Ω 5 Leakage Current Capacitance C I-I 7. pf 5 (Input-Input) *All Typical values at T A = 5 C unless otherwise noted. **The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN Insulation Characteristics Table (if applicable), your equipment level safety specification or Agilent Application Note 7 entitled Optocoupler Input- Output Endurance Voltage. Notes:. Pin 5 should be the most negative voltage at the detector side.. Each channel.. DC CURRENT TRANSFER RATIO (CTR) is defined as the ratio of output collector current, I O, to the forward LED input current, I F, times %.. Device considered a two-terminal device: pins,,, and shorted together, and pins 5,, 7, and shorted together. 5. Measured between pins and shorted together, and pins and shorted together.. Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dv CM /dt of the common mode pulse, V CM, to assure that the output will remain in a Logic High state (i.e., V O >. V). Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dv CM /dt of the common mode pulse, V CM, to assure that the output will remain in a Logic Low state (i.e., V O <. V). 7. In applications where dv/dt may exceed 5, V/µs (such as static discharge) a series resistor, R CC, should be included to protect the detector IC from destructively high surge currents. The recommended value is R CC = Ω.. Use of a. µf bypass capacitor connected between pins 5 and adjacent to the device is recommended. 9. In accordance with UL 577, each optocoupler is proof tested by applying an insulation test voltage > 5 V rms for second (leakage detection current limit, I I-O < 5 µa).. In accordance with UL 577, each optocoupler is proof tested by applying an insulation test voltage > V rms for second (leakage detection current limit, I I-O < 5 µa).. Measured between the LED anode and cathode shorted together and pins 5 through shorted together.. Derate linearly above 5 C free-air temperature at a rate of. mw/ C for the SO- package.

11 I O OUTPUT CURRENT ma I F =. ma I F =.5 ma I F =.5 ma I F = 5. ma I F =. ma I F =.5 ma I F =. ma I F =.5 ma I F =. ma I F =.5 ma T A = 5 C V CC = 5. V V O OUTPUT VOLTAGE V CTR CURRENT TRANSFER RATIO % V CC = 5. V V O =. V.. T A = C T A = 5 C T A = 7 C T A = 5 C T A = - C I F FORWARD CURRENT ma I O OUTPUT CURRENT ma. V CC = 5. V V O =. V T A = 5 C T A = 5 C T A = - C.. I F INPUT DIODE FORWARD CURRENT ma Figure. DC Transfer Characteristics. Figure. Current Transfer Ratio vs. Forward Current. Figure. Output Current vs. Input Diode Forward Current. I F FORWARD CURRENT ma... + V F I F T = 5 C A V F FORWARD VOLTAGE V. I CC (PER CHANNEL) SUPPLY CURRENT ma. T A = 5 C HCPL-7 V CC = V... HCPL-7 HCPL-7 V CC = 7 V I F INPUT DIODE FORWARD CURRENT ma t PHL PROPAGATION DELAY TO LOGIC LOW µs. I F T 5 µs.5 V 5 V V O V t OL PHL HCPL-7/7 I F =.5 ma R L =.7 kω... HCPL-7/7 HCPL-7/7 I F =. ma R L =. kω. T A = 5 C T INPUT PULSE PERIOD ms Figure. Input Diode Forward Current vs. Forward Voltage. Figure 5. Supply Current per Channel vs. Input Diode Forward Current. Figure. Propagation Delay to Logic Low vs. Pulse Period. t P PROPAGATION DELAY µs HCPL-7/7 (I F =.5 ma, R L =.7 kω) HCPL-7/7 (I F =. ma, R L =. kω) t PHL t PLH t PLH t PHL t P PROPAGATION DELAY µs 7 5 V CC = 5 V T A = 5 C t PHL R L =. kω OR.7 kω t PLH R L =.7 kω t PLH R L =. kω T A TEMPERATURE C I F INPUT DIODE FORWARD CURRENT ma Figure 7. Propagation Delay vs. Temperature. Figure. Propagation Delay vs. Input Diode Forward Current.

12 I F 5 V V O t PHL I F.5 V 5 V V OL V O PULSE GEN. Z O = 5 Ω t r = 5 ns I MONITOR F I F R M 7 5.µF R L +5 V V O C = 5 pf L.5 V t PLH V OL Figure 9. Switching Test Circuit. I F t r, t f = ns V CM V V % 9% 9% % t r t f V FF B A 7 R CC (SEE NOTE 7) +5 V Ω R L V O. µf VO SWITCH AT A: I = ma F 5 V 5 V O V OL SWITCH AT B: I F =. ma V CM + PULSE GEN. Figure. Test Circuit for Transient Immunity and Typical Waveforms. For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: + () 5- or (9) 7-7 Europe: +9 () 9 China: 5 7 Hong Kong: (+5) 75 9 India, Australia, New Zealand: (+5) Japan: (+ ) 5-5 (Domestic/International), or -- (Domestic Only) Korea: (+5) Singapore, Malaysia, Vietnam, Thailand, Philippines, Indonesia: (+5) 755 Taiwan: (+5) 755 Data subject to change. Copyright Agilent Technologies, Inc. Obsoletes 599-7EN December, 599-5EN

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