524,288-Word x 16-Bit or 1,048,576-Word x 8-Bit One Time PROM
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1 Semiconductor 524,288Word x 16Bit or 1,048,576Word x 8Bit One Time PROM 1A DESCRIPTION The is a 8Mbit electrically Programmable ReadOnly Memory whose configuration can be electrically switched between 524,288 word x 16bit and 1,048,576 word x 8bit. The operates on a single +3V3.3V power supply and is TTL compatible. Since the operates asynchronously, external clocks are not required, making this device easytouse. The is suitable as largecapacity fixed memory for microcomputers and data terminals. It is manufactured using a CMOS double silicon gate technology and is offered in 42pin DIP, 44pin SOP or 44pin TSOP packages. FEATURES 524,288 word x 16bit / 1,048,576 word x 8bit electrically switchable configuration Single +3V3.3V power supply Access time 100 access time (Vcc=+3V) 80 access time (Vcc=+3.3V) Input / Output TTL compatible Threestate output Packages 42pin plastic DIP (DIP42P ) (Product name : RA) 44pin plastic SOP (SOP44P K) (Product name : MA) 44pin plastic TSOP (TSOP II 44P K) (Product name : TP) November /11
2 PIN CONFIGURATION (TOP VIEW) A18 1 A17 2 A7 3 A6 4 A5 5 A4 6 A3 7 A2 8 A1 9 A V SS D0 14 D8 15 D1 16 D9 17 D2 18 D10 19 D3 20 D NC 41 A8 40 A A10 A11 A12 A13 35 A14 34 A15 33 A16 32 BYTE/Vpp 31 V SS 30 D15/A1 29 D7 28 D D6 D13 D5 D12 D4 NC 1 44 NC A18 2 A17 3 A7 4 A6 5 A5 6 A4 7 A3 8 A2 9 A1 10 A V SS D0 15 D8 16 D1 17 D9 18 D2 19 D10 20 D3 21 D NC A8 A9 A10 A11 A12 A13 A14 A15 34 A16 33 BYTE/Vpp 32 V SS 31 D15/A1 30 D7 29 D14 28 D6 27 D13 26 D5 25 D12 24 D4 23 NC 1 44 NC A18 2 A17 3 A7 4 A6 5 A5 6 A4 7 A3 8 A2 9 A1 10 A V SS D0 15 D8 16 D1 17 D9 18 D2 19 D10 20 D3 21 D NC 42 A8 41 A9 40 A10 39 A11 38 A12 37 A13 36 A14 35 A15 34 A16 33 BYTE/Vpp 32 V SS 31 D15/A1 30 D7 29 D14 28 D6 27 D13 26 D5 25 D12 24 D pin DIP 44pin SOP 44pin TSOP (II) PIN NAMES D15/A1 A0A18 D0D14 V SS NC FUNCTIONS Data output / Address input Address input Data output Chip enable Output enable Power supply voltage GND Mode switch / Program power supply voltage Non connection 2/11
3 BLOCK DIAGRAM A1 X8/X16 Switch PGM A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 Address Buffer Row Decoder Column Decoder Memory Matrix 524,288X16Bit or 1,048,576X8Bit Multiplexer Output Buffer D0 D2 D4 D6 D8 D10 D12 D14 D1 D3 D5 D7 D9 D11 D13 D15 In 8bit output mode, these pi are threestated and pin D15 functio as the A1 address pin. FUNCTION TABLE MODE D0 D7 D8 D14 D15/A1 READ (16Bit) L L H D OUT READ (8Bit) L L L D OUT L/H OUTPUT DISABLE L H H 3.0V to L 3.3V * STANDBY H * H L * PROGRAM L H D IN PROGRAM INHIBIT H H 9.75V 4.0V PROGRAM VERIFY H L D OUT *: Don't Care 3/11
4 ABSOLUTE MAXIMUM RATINGS Operating temperature under bias Storage temperature Input voltage Output voltage Power supply voltage Program power supply voltage Power dissipation per package Symbol Topr T stg V I V O V PP P D Condition relative to V SS Value 0 to to to to to to Unit C C V V V V W RECOMMENDED OPERATING CONDITIONS power supply voltage V PP power supply voltage Input "H" level Input "L" level Voltage is relative to Vss Symbol V PP V IH V IL Condition =2.7V3.6V * : Vcc+1.5V (Max.) when pulse width of overshoot is less than 10nS. ** : 1.5V (Min.) when pulse width of undershoot is less than 10nS. (Ta=0 to 70 C) Min. Typ. Max. Unit V V * V 0.5** 0.6 V 4/11
5 ELECTRICAL CHARACTERISTICS (Read operation) DC Characteristics 1 ( =3V±0.3V, Ta=0 to 70 C) Symbol Condition Min. Typ. Max. Unit Input leakage current Output leakage current power supply current (Standby) power supply current (Read) V PP power supply current I LI I LO I CCSC I CCST I CCA I PP V I =0 to Vcc V O =0 to Vcc = =V IH =V IL, =V IH tc=100 V PP = µa µa µa ma ma µa Input "H" level V IH * V Input "L" level V IL 0.5** 0.6 V Output "H" level V OH I OH =400uA 2.4 V Output "L" level V OL I OL =2.1mA 0.4 V Voltage is relative to Vss * : Vcc+1.5V (Max.) when pulse width of overshoot is less than 10nS. ** : 1.5V (Min.) when pulse width of undershoot is less than 10nS. DC Characteristics 2 ( =3.3V±0.3V, Ta=0 to 70 C) Symbol Condition Min. Typ. Max. Unit Input leakage current I LI V I =0 to Vcc 10 µa Output leakage current I LO V O =0 to Vcc 10 µa power supply current I CCSC = 50 µa (Standby) I CCST =V IH 1 ma power supply current (Read) I CCA =V IL, =V IH tc=80 40 ma V PP power supply current I PP V PP = 10 µa Input "H" level V IH * V Input "L" level V IL 0.5** 0.6 V Output "H" level V OH I OH =400uA 2.4 V Output "L" level V OL I OL =2.1mA 0.4 V Voltage is relative to Vss * : Vcc+1.5V (Max.) when pulse width of overshoot is less than 10nS. ** : 1.5V (Min.) when pulse width of undershoot is less than 10nS. 5/11
6 AC Characteristics 1 ( =3V±0.3V, Ta=0 to 70 C) Symbol Condition Min. Max. Unit Address cycle time T C 100 Address access time access time access time T ACC T T ==V IL =V IL =V IL Output disable time T CHZ =V IL 0 30 T OHZ =V IL 0 25 Output hold time T OH ==V IL 0 Measurement conditio Input signal level Input timing reference level Output load Output timing reference level 0V/3V 0.8V/2.0V 100pF 0.8V/2.0V AC Characteristics 2 ( =3.3V±0.3V, Ta=0 to 70 C) Symbol Condition Min. Max. Unit Address cycle time T C 80 Address access time access time access time T ACC T T ==V IL =V IL =V IL Output disable time T CHZ =V IL 0 30 T OHZ =V IL 0 25 Output hold time T OH ==V IL 0 Measurement conditio Input signal level Input timing reference level Output load Output timing reference level 0V/3V 0.8V/2.0V 100pF 0.8V/2.0V 2.08V 800ohms Output 100pF 6/11
7 TIMING CHART (READ CYCLE) 16Bit Read Mode (BYTE=V IH ) t C A0 A18 t t OH t t CHZ t ACC t OHZ D0 D15 Valid Data 8Bit Read Mode (BYTE=V IL ) t C A1 A18 t t OH t t CHZ t ACC t OHZ D0 D7 Valid Data D8 D14 7/11
8 ELECTRICAL CHARACTERISTICS (Programming operation) DC Characteristics (Ta=25 C±5 C) Symbol Condition Min. Typ. Max. Unit Input leakage current I LI V I = +0.5V 10 µa V PP power supply current (Program) I PP2 =V IL 50 ma power supply current I CC 50 ma Input "H" level V IH V Input "L" level V IL V Output "H" level V OH I OH =400µA 2.4 V Output "L" level V OL I OL =2.1mA 0.45 V Program voltage V PP V power supply voltage V Voltage is relative to Vss AC Characteristics (V cc =4.0V±0.1V,V pp =9.75V±0.25V,Ta=25 C±5 C) Symbol Condition Min. Typ. Max. Unit Address setup time T AS 100 setup time T S 2 µs Data setup time T DS 100 Address hold time T AH 2 µs Data hold time T DH 100 Output float delay from T OHZ V PP voltage setup time T VS 2 µs Program pulse width T PW µs Data valid from T 100 Address hold from high T AHO 0 Pin Check Function Pin Check Function is to check contact between each devicepin and each socketlead with EPROM programmer. Setting up address as the following condition call the preprogrammed codes on device outputs. (V cc =3.3V±0.3V,==V IL,BYTE/V pp =V IH,Ta=25 C±5 C) A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A VH* VH* Other conditio DATA FF00 00FF FFFF * :VH=8V±0.25V 8/11
9 Coecutive Programming Waveforms A0 A18 t AS t AH t PW High t DS t DH D0 D15 Din Din t VS Coecutive Program Verify Waveforms A0 A18 High t ACC t AHO t t OHZ D0 D15 Dout Dout 9.75V 9/11
10 Program and Program Verify Cycle Waveforms A0 A18 t AS t AHO t PW t S t OHZ t DS t DH t t OHZ D0 D15 Din Dout 9.75V PIN Capacitance ( =3.3V, Ta=25 C, f=1mhz) Symbol Condition Min. Typ. Max. Unit Input C IN1 8 (10) V C I =0V IN2 120 pf Output C OUT V O =0V 10 (12) ( ) : DIP only 10/11
11 Programming / Verify Flow Chart Programming Verify Start Start Bad iertion NO Pin Check Pin Check OK NO Bad iertion OK Address = First location =4.0V Address = First location =3.0V V PP =3.0V V PP =9.75V Verify (One Byte) NG Increment Address NO Program 10µs Last Address? YES PASS =3.6V V PP =3.6V Verify (One Byte) NG Address = First location X=0 PASS Device Passed Device Failed Verify (One Byte) NG X=X+1 PASS Increment Address NO Last Address? YES X=2? YES NO =3.0V V PP =3.0V Program 10µs Verify (One Byte) NG PASS Device Passed Device Failed 11/11
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Features Fast Read Access Time - 90 ns Dual Voltage Range Operation Unregulated Battery Power Supply Range, 2.7V to 3.6V or Standard 5V ± 10% Supply Range Pin Compatible with JEDEC Standard AT27C1024 Low
256K (32K x 8) Unregulated Battery-Voltage High-Speed OTP EPROM AT27BV256
Features Fast Read Access Time 70 ns Dual Voltage Range Operation Unregulated Battery Power Supply Range, 2.7V to 3.6V or Standard 5V ± 10% Supply Range Pin Compatible with JEDEC Standard AT27C256R Low
NTE27C256 12D, NTE27C256 15D, NTE27C256 70D Integrated Circuit 256 Kbit (32Kb x 8) UV EPROM 28 Lead DIP Type Package
NTE27C256 12D, NTE27C256 15D, NTE27C256 70D Integrated Circuit 256 Kbit (32Kb x 8) UV EPROM 28 Lead DIP Type Package NTE27C256 15P Integrated Circuit 256 Kbit (32Kb x 8) OTP EPROM 28 Lead DIP Type Packag
1Mb (128K x 8) Unregulated Battery Voltage, One-time Programmable, Read-only Memory
Features Fast read access time 90ns Dual voltage range operation Unregulated battery power supply range, 2.7V to 3.6V, or Standard power supply range, 5V 10% Compatible with JEDEC standard Atmel AT27C010
R1RP0416D Series. 4M High Speed SRAM (256-kword 16-bit) Description. Features. Ordering Information. REJ03C Z Rev Mar.12.
4M High Speed SRAM (256-kword 16-bit) REJ03C0108-0100Z Rev. 1.00 Mar.12.2004 Description The R1RP0416D Series is a 4-Mbit high speed static RAM organized 256-k word 16-bit. It has realized high speed access
Fast read access time 70ns Low-power CMOS operation 100μA max standby 30mA max active at 5MHz. JEDEC standard packages 32-lead PDIP 32-lead PLCC
Atmel AT7C040 4Mb (51K x 8) OTP, EPROM DATASHEET Features Fast read access time 70ns Low-power CMOS operation 100μA max standby 30mA max active at 5MHz JEDEC standard packages 3-lead PDIP 3-lead PLCC 5V
32M Async Fast SRAM. Rev. No. History Issue Date 1.0 Initial issue Apr. 26,2017
Revision History Rev. No. History Issue Date 1.0 Initial issue Apr. 26,2017 1 Rev. 1.0 GENERAL DESCRIPTION The and are a 33,578,432-bit high-speed Static Random Access Memory organized as 4M(2M) words
Distributed by: www.jameco.com 1-00-31-4242 The content and copyrights of the attached material are the property of its owner. FEATURES Wide operation voltage : 2.4V ~ 5.5V Very low power consumption :
27C Bit ( x 8) UV Erasable CMOS PROM Military Qualified
27C256 262 144-Bit (32 768 x 8) UV Erasable CMOS PROM Military Qualified General Description The 27C256 is a high-speed 256K UV erasable and electrically reprogrammable CMOS EPROM ideally suited for applications
AS4C256K16E0. 5V 256K 16 CMOS DRAM (EDO) Features. Pin designation. Pin arrangement. Selection guide
5V 256K 16 CMOS DRAM (EDO) Features Organization: 262,144 words 16 bits High speed - 30/35/50 ns access time - 16/18/25 ns column address access time - 7/10/10/10 ns CAS access time Low power consumption
EEPROM AS8ER128K32 FUNCTIONAL BLOCK DIAGRAM. 128K x 32 Radiation Tolerant EEPROM. PIN ASSIGNMENT (Top View) AVAILABLE AS MILITARY SPECIFICATIONS
128K x 32 Radiation Tolerant EEPROM AVAILABLE AS MILITARY SPECIFICATIONS MIL-PRF-38534 FEATURES Access time of 150ns, 200ns, 250ns Operation with single 5V + 10% supply Power Dissipation: Active: 1.43
512K (64K x 8) Unregulated Battery. Programmable, Read-only Memory
Features Fast read access time 70ns Dual voltage range operation Unregulated battery power supply range, 2.7V to 3.6V, or Standard power supply range, 5V 10% Pin compatible with JEDEC standard Atmel AT27C512R
1Mb Ultra-Low Power Asynchronous CMOS SRAM. Features. Power Supply (Vcc) Operating Temperature A 0 -A 16 I/O 0 -I/O 7
1Mb Ultra-Low Power Asynchronous CMOS SRAM 128K 8 bit N01L83W2A Overview The N01L83W2A is an integrated memory device containing a 1 Mbit Static Random Access Memory organized as 131,072 words by 8 bits.
Very Low Power/Voltage CMOS SRAM 1M X 16 bit DESCRIPTION. SPEED (ns) 55ns : 3.0~3.6V 70ns : 2.7~3.6V BLOCK DIAGRAM
Very Low Power/Voltage CMOS SRAM 1M X 16 bit (Dual CE Pins) FEATURES operation voltage : 27~36V Very low power consumption : = 30V C-grade: 45mA (@55ns) operating current I -grade: 46mA (@55ns) operating
IS39LV040 / IS39LV010 / IS39LV512
4Mbit / 1Mbit / 512 Kbit 3.0 Volt-only CMOS Flash Memory FEATURES Single Power Supply Operation - Low voltage range: 2.70 V - 3.60 V Memory Organization - IS39LV040: 512K x 8 (4 Mbit) - IS39LV010: 128K
MR36V08G57C. FEATURES Memory Configuration 262,144 x 1,024 x 32 bit Multiplexed Command/Address/Data
MR36V08G57C 262,144 Page 1,024 x 32 Bit P2ROM (LVNROM) FEATURES Memory Configuration 262,144 x 1,024 x 32 bit Multiplexed Command/Address/Data Page Read Operation Page Size : 4,096 byte Random access time
High Speed Super Low Power SRAM CS16LV K-Word By 16 Bit. Revision History
Revision History Rev. No. History Issue Date 1.0 Initial issue Jan.17,2005 1.1 Add 48 mini_bga & Dice Aug. 31, 2005 1.2 Remove 48 mini_bga Jul. 5. 2006 i Rev. 1.2 GENERAL DESCRIPTION... 1 FEATURES... 1
16 Meg FPM DRAM AS4LC4M4. 4M x 4 CMOS DRAM WITH FAST PAGE MODE, 3.3V PIN ASSIGNMENT ACTIVE POWER DISSIPATION PERFORMANCE RANGE
4M x 4 CMOS DRAM WITH FAST PAGE MODE, 3.3V PIN ASSIGNMENT (Top View) AVAILABLE AS MILITARY SPECIFICATIONS MIL-STD-883 FEATURES Fast Page Mode Operation CAS\-before-RAS\ Refresh Capability RAS\-only and
5V 128K X 8 HIGH SPEED CMOS SRAM
5V 128K X 8 HIGH SPEED CMOS SRAM Revision History AS7C1024B Revision Details Date Rev 1.0 Preliminary datasheet prior to 2004 Rev 1.1 Die Revision A to B March 2004 Rev 2.0 PCN issued yield issues with
512K (64K x 8) Multiplexed. Addresses/Outputs. Low-voltage OTP EPROM AT27LV520
Features 8-bit Multiplexed Addresses/Outputs Fast Read Access Time 70 ns Dual Voltage Range Operation Low-voltage Power Supply Range, 3.0V to 3.6V, or Standard 5V ± 10% Supply Range Pin Compatible with
512 x 8 Registered PROM
512 x 8 Registered PROM Features CMOS for optimum speed/power High speed 25 ns address set-up 12 ns clock to output Low power 495 mw (Commercial) 660 mw (Military) Synchronous and asynchronous output enables
28LV Megabit (128K x 8-Bit) EEPROM. Memory DESCRIPTION: FEATURES: 28LV011A. Logic Diagram
28LV11 1 Megabit (128K x 8-Bit) EEPROM V CC V SS High Voltage Generator I/O I/O7 RDY/Busy RES OE I/O Buffer and Input Latch CE WE RES Control Logic Timing 28LV11A A A6 Y Decoder Y Gating A7 Address Buffer
1Mb (64K x 16) Unregulated Battery Voltage, High-speed, One-time Programmable, Read-only Memory
Features Fast read access time 90ns Dual voltage range operation Unregulated battery power supply range, 2.7V to 3.6V, or Standard power supply range, 5V 10% Pin compatible with JEDEC standard Atmel AT27C1024
4Mb Ultra-Low Power Asynchronous CMOS SRAM. Features. Power Supply (Vcc) Operating Temperature A 0 -A 17 I/O 0 -I/O 15 V CC V SS
4Mb Ultra-Low Power Asynchronous CMOS SRAM 256K 16 bit N04L63W2A Overview The N04L63W2A is an integrated memory device containing a 4 Mbit Static Random Access Memory organized as 262,144 words by 16 bits.
A13 A12 A11 A10 ROW DECODER DQ0 INPUT DATA CONTROL WE OE DESCRIPTION: DDC s 32C408B high-speed 4 Megabit SRAM
32C48B 4 Megabit (12K x 8-Bit) SRAM A13 A A1 A2 A3 A4 CS 1 36 NC A18 A17 A16 A1 OE A12 A11 A1 A9 A8 A7 A6 A A4 ROW DECODER MEMORY MATRIX 124 ROWS x 496 COLUMNS I/O1 I/O8 I/O2 Vcc Vss I/O3 32C48B I/O7 Vss
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 512-MBIT (64M 8 BITS) CMOS NAND E 2 PROM (64M BYTE SmartMedia TM ) DESCRIPTION TH58NS512DC The TH58NS512 is a single 3.3-V 512-Mbit (553,648,128)
DS Tap High Speed Silicon Delay Line
www.dalsemi.com FEATURES All-silicon timing circuit Five delayed clock phases per input Precise tap-to-tap nominal delay tolerances of ±0.75 and ±1 ns Input-to-tap 1 delay of 5 ns Nominal Delay tolerances
28C010T. 1 Megabit (128K x 8-Bit) EEPROM. Memory FEATURES: DESCRIPTION: Logic Diagram
28C1T 1 Megabit (128K x 8-Bit) EEPROM FEATURES: 128k x 8-bit EEPROM RAD-PAK radiation-hardened agait natural space radiation Total dose hardness: - > 1 krad (Si), depending upon space mission Excellent
4-Megabit (256K x 16) OTP EPROM AT27C4096
Features Fast Read Access Time 55 ns Low Power CMOS Operation 100 µa Maximum Standby 40 ma Maximum Active at 5 MHz JEDEC Standard Packages 40-lead PDIP 44-lead PLCC 40-lead VSOP Direct Upgrade from 512-Kbit,
IS62WV10248EALL/BLL IS65WV10248EALL/BLL. 1Mx8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM
1Mx8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM KEY FEATURES High-speed access time: 45ns, 55ns CMOS low power operation 36 mw (typical) operating TTL compatible interface levels Single power supply
NM93C56 2K-Bit Serial CMOS EEPROM (MICROWIRE Bus Interface)
NM93C56 2K-Bit Serial CMOS EEPROM (MICROWIRE Bus Interface) General Description The NM93C56 devices are 2048 bits of CMOS non-volatile electrically erasable memory divided into 28 6-bit registers. They
2Mb Ultra-Low Power Asynchronous CMOS SRAM. Features. Power Supply (Vcc) Operating Temperature
2Mb Ultra-Low Power Asynchronous CMOS SRAM 128K 16bit N02L63W3A Overview The N02L63W3A is an integrated memory device containing a 2 Mbit Static Random Access Memory organized as 131,072 words by 16 bits.
NM27C ,288-Bit (64K x 8) High Performance CMOS EPROM
NM27C512 524,288-Bit (64K x 8) High Performance CMOS EPROM General Description The NM27C512 is a high performance 512K UV Erasable Electrically Programmable Read Only Memory (EPROM). It is manufactured
8Mb (1M x 8) One-time Programmable, Read-only Memory
Features Fast read access time 90ns Low-power CMOS operation 100µA max standby 40mA max active at 5MHz JEDEC standard packages 32-lead PLCC 32-lead PDIP 5V 10% supply High-reliability CMOS technology 2,000V
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2,097,152-WORD BY 16-BIT CMOS PSEUDO STATIC RAM DESCRIPTION The TC51WHM516AXBN is a 33,554,432-bit pseudo static random access memory(psram) organized
P4C1256L LOW POWER 32K X 8 STATIC CMOS RAM FEATURES DESCRIPTION V CC. Current (Commercial/Industrial) Operating: 70mA/85mA CMOS Standby: 100µA/100µA
FEATURES Current (Commercial/Industrial) Operating: 70mA/85mA CMOS Standby: 100µA/100µA Access Times 55/70/85 Single 5 Volts ±10% Power Supply Easy Memory Expansion Using CE and OE Inputs Common Data I/O
32K x 8 Reprogrammable Registered PROM
1CY7C277 CY7C277 32K x 8 Reprogrammable Registered PROM Features Windowed for reprogrammability CMOS for optimum speed/power High speed 30-ns address set-up 15-ns clock to output Low power 60 mw (commercial)
EEPROM AS58LC K x 8 EEPROM Radiation Tolerant. PIN ASSIGNMENT (Top View) AVAILABLE AS MILITARY SPECIFICATIONS MIL-PRF-38535
128K x 8 EEPROM Radiation Tolerant AVAILABLE AS MILITARY SPECIFICATIONS MIL-PRF-38535 FEATURES High speed: 250ns and 300ns Data Retention: 10 Years Low power dissipation, active current (20mW/MHz (TYP)),
y Endurance : 10 6 cycles/word y Data retention : 10 years 8-pin SOP2 Top view 8-pin DIP Top view CS VC C NC TEST VCC NC CS SK DI DO TEST GND
Rev.. CMOS SERIAL E 2 PROM The S-2953A / 63A series are low power 6K / 32K-bit E 2 PROM with a low operating voltage range. They are organized as 24-word 6-bit and 248-word 6bit, respectively. Each is
Philips Semiconductors Programmable Logic Devices
DESCRIPTION The PLD is a high speed, combinatorial Programmable Logic Array. The Philips Semiconductors state-of-the-art Oxide Isolated Bipolar fabrication process is employed to produce maximum propagation
TC58DVM72A1FT00/ TC58DVM72F1FT00 TC58DAM72A1FT00/ TC58DAM72F1FT00
TENTATIVE TC58DVM72A1FT00/ TC58DVM72F1FT00 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 128-MBIT (16M 8 BITS/8M x 16BITS) CMOS NAND E 2 PROM DESCRIPTION The TC58DxM72x1xxxx is a 128-Mbit (138,412,032)