Development Board EPC9067 Quick Start Guide. EPC V Half Bridge with Sync FET Bootstrap Gate Drive

Transcription

1 Development Board EPC9067 Quick Start Guide EPC Half Bridge with Sync FET Bootstrap Gate Drive

2 DESCRIPTION The EPC9067 development board is a 65 maximum device voltage,.7 A maximum output current, half bridge with onboard gate drives, featuring the EPC8009 enhancement mode (egan ) field effect transistor (FET). The gate driver has been configured with a synchronous FET bootstrap circuit featuring the EPC08 egan FET that eliminates high side device losses induced by the reverse recovery losses of the internal bootstrap diode of the gate driver. The purpose of this development board is to simplify the evaluation process of the EPC8009 egan FET by including all the critical components on a single board that can be easily connected into any existing converter. The inclusion of the synchronous FET bootstrap circuit enables significant increase in operating frequency capability of the half bridge circuit. The EPC9067 development board is x.5 and has two EPC8009 egan FETs in a half bridge configuration using Texas Instruments LM5 gate driver with supply and bypass capacitors. The board contains all critical components and layout for optimal switching performance. There are also various probe points to facilitate simple waveform measurement and efficiency calculation. The board includes pads for the inclusion of customer components to facilitate testing in a Buck converter or ZS class-d amplifier configurations. A complete block diagram of the circuit is given in figure. Table : Performance Summary (T A = 5 C) EPC9067 Symbol Parameter Conditions Min Max Units DD Gate Drive Input Supply Range 7.5 IN Bus Input oltage Range 5* OUT Switch Node Output oltage 65 I OUT Switch Node Output Current.7* A PWM PWM Logic Input oltage Threshold Minimum High State Input Pulse Width Minimum Low State Input Pulse Width Input High Input Low PWM rise and fall time < 0ns PWM rise and fall time < 0ns ns 60 # ns *Assumes inductive load, maximum current depends on die temperature actual maximum current with be subject to switching frequency, bus voltage and thermals. # Limited by time needed to refresh high side bootstrap supply voltage. For more information on the EPC8009 and EPC08 egan FETs please refer to the datasheet available from EPC at The datasheet should be read in conjunction with this quick start guide. QUICK START PROCEDURE Development board EPC9067 is easy to set up to evaluate the performance of the EPC8009 egan FET. Refer to figure for proper connect and measurement setup and follow the procedure below:. Configure the board for either ZS class-d operation OR Buck converter operation.. With power off, connect the input power supply bus to + IN (J) and ground / return to IN (J).. For ZS class-d operation, with power off, connect a HF load to the HF output (RF-J OR sw-j and GND-J). For Buck converter operation, with power off, connect a DC load to the DC output (+ OUT -J5 and GND-J).. With power off, connect the gate drive input to + DD (J90, Pin-) and ground return to DD (J90, Pin-). 5. With power off, connect the input PWM control signal to PWM (J70, Pin-) and ground return to either Pin- or Pin- of J Turn on the gate drive supply make sure the supply is within the 7.5 and range. 7. Turn on the controller / PWM input source and probe switching node to observe switching operation. EPC9067 development board 8. Turn on the bus voltage to the required value (do not exceed the absolute maximum voltage of 5 on OUT ). Increase voltage slowly while monitoring operation to ensure the FETs are operating within their datasheet parameters. 9. Once operational, adjust the bus voltage and load PWM control within the operating range and observe the output switching behavior, efficiency and other parameters. 0. For shutdown, please follow steps in reverse. NOTE. When measuring the high frequency content switch node, care must be taken to avoid long ground leads. Measure the switch node by placing the oscilloscope probe tip through the large via on the switch node (designed for this purpose) and grounding the probe directly across the GND terminal provided. See figure for proper scope probe technique. EPC EFFICIENT POWER CONERSION CORPORATION COPYRIGHT 07

3 IN DD Gate drive regulator HF output Q L ZS PWM Logic and dead-time adjust Level shift C Bypass L Buck C OUT C ZS DC output Q GND Figure : Block diagram of EPC9067 development board 7.5 DC Main voltage measurement + IN supply (note polarity) Dead-time setting (if installed) Switch-node oscilloscope probe Ground post High frequency connection SMA (optional) 5 DCmax + Main supply (note polarity) Control signal inputs DC output DC output measurement Figure : Proper connection and measurement setup Do not use probe ground lead Ground probe against post Place probe tip in large via Minimize loop Figure : Proper measurement of the switch node EPC EFFICIENT POWER CONERSION CORPORATION COPYRIGHT 07

4 THERMAL CONSIDERATIONS The EPC9067 development board showcases the EPC8009 egan FET. Although the electrical performance surpasses that for traditional Si devices, their relatively smaller size does magnify the thermal management requirements. The EPC9067 is intended for bench evaluation with low ambient temperature and convection cooling. The addition of heat-sinking and forced air cooling can significantly increase the current rating of these devices, but care must be taken to not exceed the absolute maximum die temperature of 5 C. NOTE. The EPC9067 development board does not have any current or thermal protection on board. Table : Bill of Materials - Amplifier Board Item Qty Reference Part Description Manufacturer/Part Number C0 Capacitors, Ceramic,.7 µf, 0, ±0%, X5R Samsung, CL05A75MP5NRNC C, C5, C6 Capacitors, Ceramic,.0 µf, 00, ±0%, X7S TDK, C0X7SA05K5AB C95, C96, C97 Capacitors, Ceramic,.0 µf, 5, ±0%, X5R Murata, GRM88R6E05KAD C7, C7 Capacitors, Ceramic, 00 nf, 5, ±0%, X7R TDK, C005X7RE0K050BB 5 C, C Capacitors, Ceramic, 00 nf, 6, ±0%, X7R Murata, GRM55R7C0KA88D 6 C5 Capacitors, Ceramic, nf, 5, ±0%, X7R TDK, C005X7REK050BB 7 C, C, C Capacitors, Ceramic, 0 nf, 00, ±0%, X7S TDK, C005X7SA0M050BB 8 C, C Capacitors, Ceramic, pf, 50, ±5%, NPO TDK, C005C0GH0J050BA 9 R6 Resistors, 7 KΩ, ±%, /0 W Panasonic, ERJ-RKF70X 0 R70 Resistors, 0.0 KΩ, ±%, /0 W Panasonic, ERJ-6ENF00 R7 Resistors, 9 Ω, ±%, /0 W Panasonic, ERJ-RKF90X R75 Resistors, 56 Ω, ±%, /0 W Panasonic, ERJ-RKF56R0X R5 Resistors, 0 Ω, ±%, /6 W Stackpole, RMCF00FT0R0 R Resistors,.7 Ω, ±%, ±/6 W Yageo, RC00FR-07R7L 5 D5, D7, D75 Diodes, Schottky Diode, 0, F=70 ma, 0 ma Diodes Inc, SDM0U0-7 6 D0 Diodes, Schottky, 00, 0. A, 00 ma ST Microelectronics, BATKFILM 7 D Diodes, Zener, 5., 50 mw ±5% Bourns Inc., CD060-Z5 8 Q egan FET, 00, 500 ma, R DS(on) =. 50 ma, 5 EPC, EPC08 9 Q, Q egan FET, 65,.A, R DS(on) =8 500 ma, 5 EPC, EPC U95 IC's, 5 LDO, 50 ma, up to 6 IN, dropout 50 ma Microchip, MCP70T-500E/MC U0 IC's, Gate driver, 5. DC,. A,.5 to 5.5 Texas Instruments, LM5TME/NOPB U7 IC's, Logic NAND Gate,.65 to 5.5, ± ma Fairchild, NC7SZ00L6X U7 IC's, Input AND Gate, Tiny Logic,.65 to 5.5, ± ma Fairchild, NC7SZ08L6X TP, TP, TP, TP Test Point, Test Point Subminiature Keystone, J70, J90, GP (See Note ) Headers, Male ertical, 6 Pin. 0" Contact Height,." Center Pitch FCI, HLF 6 J, J, J, J5 Headers, Rows by Pins." Male ertical,." Center Pitch TE Connectivity, Optional Components Item Qty Reference Part Description Manufacturer/Part Number C7 Capacitors, DNP, Ceramic,.0 µf, 00, ±0%, X7S TDK, C0X7SA05K5AB C6 Capacitor, DNP, Ceramic, 00 nf, 6, ±0%, X7R Murata, GRM55R7C0KA88D R7, R7, R7 Resistor, DNP, 0 Ω, /0 W, Jumper Panasonic, ERJ-GEY0R00 P7, P75 5 Lbuck Potentiometer, DNP, Multi-turn Potentiometer, kω, ±0%, / W, Turn Top Adjustment Small Inductor, DNP, 0 μh, ±0%,.5 A, mω, Resonance=0 MHz, Frequency Tested=00 KHz Murata, P7W0C0B00 Wϋrth, 70 6 Lzvs Inductor, DNP, 500 nh,, Q=80, 50 MHz, DCR=6.5 mω, I RMS =. A Coilcraft, 99SQ-50JEB 7 D Diodes, DNP, Schottky Diode, 0, F=70 ma, 0 ma Diodes Inc, SDM0U0-7 8 J Connector, DNP, RP-SMA Plug, 50 Ω Linx, CONRESMA HS Note (6 pin Header to be cut as follows) J70 cut pins used, J90 cut pins used, GP cut pin used Hardware, DNP, W= (0.590") 5 mm, by L= (0.590") 5 mm, H=(0.7") 9.5 mm, LFM Advanced Thermal Solutions, ATS-550D-C-R0 EPC EFFICIENT POWER CONERSION CORPORATION COPYRIGHT 07

5 EPC EFFICIENT POWER CONERSION CORPORATION COPYRIGHT 07 5 Logic Supply 7.5 DC - DC J90 7 in. Male ert. PWM R70 0 K J70. Male ert. PWM PWM PWM R7 DNP PWM PWM PWM PWM in A B C7 00 nf, 5 A B C7 00 nf, U7 NC 7SZ08L 6X Y C95 μf, 5 U7 NC 7SZ00L 6X U95 MCP70T-500E/MC 5.0, 50 ma DFN IN R7 DNP 0 Ω R7 DNP 0 Ω GND OUT Logic Supply Regulator R7 DNP 00 Ω Deadtime Right P7 DNP K D7 SDM0U0 R75 DNP 0 Ω Deadtime Left P75 DNP K D75 SDM0 U0 5 C96 C97 μf, 5 μf, 5 H_Sig H_Sig C pf, 50 L _Sig C pf, 50 L _Sig U0 L M5T M Gate Driver 5 C 00 nf, 6.7 C6 E MP T Y 00 nf, 6 5 HS GRH GRH GRret GL H GL H D E MP T Y SDM0 U0.7 HS DNP R5 0 Ω Figure : EPC Schematic C5 nf, 5 Q EPC08 00,.8 Ω GL H D0 BAT5 K FIL M C0.7 μf, 0 Gbtst D5 SDM0 U0 R 5 HS E 7 D C CD 060-Z5 00 nf, 6 GRret Synchronous Bootstrap Power Supply R6 7 K 5 T P main main GRH GRret GL H T P GP. Male ert. Ground Post Q EPC8009 Q EPC8009 PH ProbeHole main C C 0 nf, 00 0 nf, 00 main T P Output L zvs DNP 500 nh ZS Tank Circuit L buck DNP T P Output C6 μf, 00 HF main C 0 nf, 00 main main C μf, 00 C7 μf, 00 J x. Male ert. Main Supply Input main C5 μf, 00 J5 x. Male ert. Buck Output J x. Male ert. SW Output J SMA Board Edge HF Output J x. Male ert. GND

6 For More Information: Please contact or your local sales representative isit our website: Sign-up to receive EPC updates at bit.ly/epcupdates or text EPC to 88 EPC Products are distributed through Digi-Key. Demonstration Board Warning and Disclaimer The EPC9067 board is intended for product evaluation purposes only and is not intended for commercial use. Replace components on the Evaluation Board only with those parts shown on the parts list (or Bill of Materials) in the Quick Start Guide. Contact an authorized EPC representative with any questions. This board is intended to be used by certified professionals, in a lab environment, following proper safety procedures. Use at your own risk. As an evaluation tool, this board is not designed for compliance with the European Union directive on electromagnetic compatibility or any other such directives or regulations. As board builds are at times subject to product availability, it is possible that boards may contain components or assembly materials that are not RoHS compliant. Efficient Power Conversion Corporation (EPC) makes no guarantee that the purchased board is 00% RoHS compliant. The Evaluation board (or kit) is for demonstration purposes only and neither the Board nor this Quick Start Guide constitute a sales contract or create any kind of warranty, whether express or implied, as to the applications or products involved. Disclaimer: EPC reserves the right at any time, without notice, to make changes to any products described herein to improve reliability, function, or design. EPC does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, or other intellectual property whatsoever, nor the rights of others.