[11] - MICRO NETWORKS 324 Clark St. Worcester, MA (508)

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1 LLJ! ~ MCRO NETWORKS MN73 MULTPLEED TRACK-HOLD AMPLFER FEATURES Complete DAS Front End: 2 8-Channel Multiplexers nstrumentation Amp Track-Hold Amp Small 32-Pin DP 2-Bit linearity 6 Single-Ended or 8 Differential nput Channels µsec Maximum Acquisition Time to ±.% (2V Step) Low Droop Rate ±7µV/µ5ec Maximum Full Mil Operation -55 C to +25 C ML-H Screening Optional. ML-STD-772 Qualified Facility 32 PN DP Qj:gilJl2J 2(35) ' f- 6(524) ~ 69!.t4::i.l)~J, J5 o on Dimensions in nches (millimeters)!,,)) (38,, i -+_j j 6 j4&) 2 ( ';()8) DESCRPTON MN73 is a thin-film hybrid circuit containing two 8~channel multiplexers, a true instrumentation amplifier and a track-hold amplifier. This unique circuit is extremely versatile and can be used in conjunction with any of Micro Networks analog-to-digital converters to configure a complete, 6-channel (8 full differential) data acquisition system in as few as 2 dual-in-line packages occupying as little as 4 square inches of board space. Additionally, MN73 can be used in any analog system for applications requiring the analog acquisition of multiple channels. MN73 has a maximum acquisition time of µsec (2V step to ±./ofsr) when the multiplexer, instrumentation amplifier and track-hold are serially connected, and a typical droop rate of ±4µV/µ5ec. The internal multiplexer may be connected for single-ended or 8 full differential input channels and is directly addressable in binary. The digital inputs are CMOS compatible, and analog inputs up to ±V can be accommodated. For additional flexibility, all inputs and outputs of the internal subsections are available at the device pins. The standard device is fully specified for either C to + 7 C or -55 C to + 25 C (H model) operation. The MN73H/B is available with Environmental Stress Screening while the MN73H/B CH is fully screened in accordance with ML-H MN73 was specifically designed to fill the need for a small, low-cost data acquisition system that was physically and electrically compatible with current microprocessor technology. When used with a 2-bit AD, the approach eliminates the need for special mountings and connectors, saves space, facilitates maintenance, and reduces costs. n addition, MN73 allows standard board spacing, improves reliability and offers significant weight savings in aerospace and avionics applications. [] - MCRO NETWORKS 324 Clark St. Worcester, MA 66 (58) January 992 Copyright 992 Micro Networks All rights reserved 9-9

2 MN73 MULTPLEED TRACK-HOLD AMPLFER ABSOLUTE MAMUM RATNGS Operating Temperature Range Specified Temperature Range: MN73 MN73H, H/B Storage Temperature Range Positive Supply (+Vee, Pin 24) Negative Supply ( - Vee, Pin 23) Multiplexer nputs (Pins -6) nstrumentation Amp nputs (Pins 2, 22) T/H Amplifier nput (Pin 9) Address nputs (Pins 27-3) T/H Command (Pin 7) Multiplexer Outputs (Pins 26, 32) nstrumentation Amp Output (Pin 2) TH Amplifier Output (Pin 8) - 55 c to + 25 c o cto + o c -55 C to + 25 c -65 C to + so c Oto + 6 Volts to -6 Volts -Vee to + Vee ± 5 Volts to ± Vee Volts -.3 to + Vee Volts Oto+ 7 Volts ±2mA ±25mA S.C. Protected to Ground ORDERNG NFORMATON PART NUMBER MN73/H/B CH 8""dMd o c to +7 C "" is sp,c,ied operation. fo, Add "H". for specified -55 C to +25 C operation Add "/B" to " H" models for Environmental Stress Screening. Add " CH" to "/B" models for % screening according to ML-H SYSTEM SPECFCATONS (TA= +25 C, ±Vee= ± 5V, unless otherwise indicated) (Note ) ANALOG NPUT (Multiplexer nputs) MN. TYP. MA. UNTS Voltage Range: Single-Ended ± Volts Differential ± Volts Common Mode ± ±2 Volts nput mpedance 25// M{lf/pF nput Current ±5 ±3 na Common Mode Rejection Ratio 7 8 db DGTAL NPUTS (Mux Address, T/H Command) Logic Levels: Mux Address: Logic "" +4. Volts Logic "O" +.8 Volts TH Command: Logic "" +2.4 Volts Logic "O" +.8 Volts Logic Currents: Mux Address (Note 2): Logic " " (VH = + 5.V) ± µa Logic " O" (VL = + O.OV) ± µa T/H Command: Logic "" (VH = + 2.4V) ± µa Logic "O" (VL = +.4V) ± µa ANALOG OUTPUT (T/H Amplifier) Output Voltage ± Volts Output Current ±2 ma Output Load Capacitance 5 pf TRANSFER CHARACTERSTCS Gain + VN Gain Error (Note 3): nitial ( + 25 c) ±. % Over Temperature (Note 4) ±. ±.2 % Gain Linearity Error (Note 5) ±.2 %FSA Offset Voltage (Track Mode): nitial ( +25 C) ±2 mv Over Temperature (Note 4) ±4 ±6 mv Offset Change (Pedestal, Hold Mode) Over Temperature (Note 4) ±5 mv Droop Rate: +25 C ±4 ±7 µvlµsec O'C to + 7'C ± µvlµsec -55 C to+ 25'C ±4 µvlµsec 9-

3 DYNAMC CHARACTERSTCS Large Signal Bandwidth Output Slew Rate Acquisition Time (2V step to ±. %) Aperture Delay Settling Time, Track-to-Hold to ±.mv Feedthrough (Hold khz Transients Peak Amplitude: Track-to-Hold Hold-to-Track POWER SUPPLES Power Supply Range: + 5V Supply -5V Supply Current Drains: + 5V Supply -5V Supply Power Consumption MN. TYP. MA. UNTS 25 khz ±2 V/µsec 6.5 µsec 2 4 nsec.5 2 µsec ±. % 9 mv mv Volts Volts ma ma 9 2 mw SPECFCATON NOTES:. System specifications listed reflect system performance with all elements serially connected. 2. f the multiplexer inputs are to be driven frc,m standard TL logic, k!l pullup resistors to + 5V should be connected. 3. Gain error is defined as the error in the slope of the systems input,output transfer function and is expressed in percent. 4. MN73 is specified tor C to + 7 C operation. MN73H and MN73H/B are specified for -55 C to + 25 C operation. 5. Gain linearity error is defined as the maximum deviation from the best-fit straight line approximation to the system's input-output transfer function and is expressed as a percentage of the system's full scale voltage swing (FSA). BLOCK DAGRAM Multiplexer Outputs MU MU 2 (32) (26) nstrumentation Amplifier + n - n (2) (22} ln st rumeniation Ampllier Output (2} TH Amplifier lnpu (9) MU Enable (3 ) () (2) (3) Analog nputs (4) (5) (6) [ (7) (6) T/H ~---, 8) Amplifier OJtpul MU 2 Enable (27} Analog nputs (~: () l~~: (U) [(5) ( 6) Channel ( A2 (26) Address A (29)------~ nputs AO(JO)O------~ L-f C,_ = OOpF (24) + 5V Supply ( + Vccl ~ ) Ground {23) - 5V Supply ( - Vee) THCommand(7} ic>> ~ 9-

PN DESGNATONS PN 6 32 7 ChannelO 2 Channel 3 Channel 2 4 Channel 3 5 Channel 4 6 Channel 5 7 Channel 6 8 Channel 7 9 Channel 8 Channel 9 Channel 2 Channel 3 Channel 2 4 Channel 3 5 Channel 4 6

4 PN DESGNATONS PN ChannelO 2 Channel 3 Channel 2 4 Channel 3 5 Channel 4 6 Channel 5 7 Channel 6 8 Channel 7 9 Channel 8 Channel 9 Channel 2 Channel 3 Channel 2 4 Channel 3 5 Channel 4 6 Channel 5 32 Mux Output 3 Mux Enable 3 A M ux Address 29 A Mux Address 28 A 2 Mux Address 27 Mux 2 Enable 26 Mux 2 Output 25 Ground V Supply (+Vee) 23-5V Supply (- Vccl 22 - n (nstrumentation Amplifier) 2 + n (nstrumentation Amplifier) 2 nstrumentation Amplifier Output 9 T/H Amplifier nput 8 T/H Amplifier Output 7 T/H Command APPLCATONS NFORMATON DESCRPTON OF OPERATON-MN73 is a complete data acquisition system front end containing user-configurable components (multiplexers, instrumentation amplifier and track-ho!d amplifier). n order to preserve maximum flexibility, all inputs and outputs of the subsections are available at the device pins. The internal 8-channel multiplexers can be connected for 6 single-ended or8 fully differential input operation and may be directly addressed via three address lines and two mux enable lines. The internal instrumentation amplifier offers high input impedance (25M/pF) and 7dB common mode rejection ratio. The internal track-hold amplifier completes this analog front-end function allowing dynamic input signals to be acquired and then held for analog-to-digital conversion. MN73 can be used in conjunction with MN574A i'p-compatible 2-bit A/D converters to configure a complete and inexpensive, 6-channel, 2-bit µ.p-compatible DAS capable of 28, channels/sec throughput rates in a minimum of board space. Substituting MN524 for MN574A increases throughput to 6, channels/sec. LAYOUT CONSDERATONS-Proper attention to layout and decoupling is necessary to obtain specified performance from the MN73. The unit's ground pin(pin25) should be tied to system analog ground as close to the unit as possible, preferably through a large analog ground plane underneath the package. Coupling between analog inputs and digital signals should be minimized to avoid noise pick-up. Care should be taken to avoid long runs or analog runs close to digital lines. Power supply connections should be short and direct, and all power supplies should be decoupled with high-frequency bypass capacitors to ground. µ.f tantalum capacitors in parallel with.µ.f ceramic capacitors are the most effective combination. Single µ.f ceramic capacitors can be used if necessary to save board space. Pin24 o +5V µf.µf Pin 25 o---,f Ground MULTPLEER-NSTRUMENTATON AMPLFER-The multiplexer section of the MN73 is addressed with a three or four bit binary word and can be configured for 8 full differential inputs or 6 single-ended inputs. The use of differential inputs provides high rejection of common mode noise and elimination of ground return offsets. Differential inputs must be used when both sides of the input signal are off ground. Connections and truth tables for both modes of operation are shown on the following pages. Approximately µ.sec access time should be allowed after addressing before the analog outputs of the multiplexer are used. A particular point to note is the minimum logic "" for the multiplexer inputs is + 4.V. f the multiplexer inputs are to be driven from standard TL logic, k pullup resistors to + 5V should be used. The following diagrams show typical connections for both full differential and single-ended applications along with truth tables which demonstrate multiplexer address (A, A, A 2 ) and enable (Mux Enable, Mux 2 Enable) line functions. MN73 is specified and tested as a system (all elements serially connected). Typical specifications for the multiplexer and instrumentation amplifier appear below. Typical Mux Perfonnance Specifications Numbers of Channels 6 Single-Ended 8 Full Differential nput Voltage Range ±V nput mpedance Logic Levels: Logic "" (min.) Logic "O" (max.) 25M/pF +4.V +.8V Logic Currents: Logic "" ±µa Logic "O" ± µa Access Time On Resistance Cross Talk ( k!l Source, khz, 2vp-p) 5nsec 2k!l -68dB µf T.µF Pin23 o - -5V 9-2

5 Typical nstrumentation Amplifier Performance Specifications Voltage Range ±V nput mpedance nput Current (max.) Common Mode Rejection Ratio (min.) Gain 25M{)JpF ±3nA 7dB +VN Gain Error: nitial ( + 25 c) ±.2% Over Temperature ±.5% Gain Nonlinearity ±.2% Large Signal Bandwidth Output Slew Rate Settling Time (2V Step to ±./o) 25kHz ±2V/µsec 4µsec Output Voltage Swing (min.) ±V Output Current (min.) Output Load Capacitance (max.) ±2mA 5pF TRACK-HOLD AMPLFER-The track-hold amplifier is in the hold mode when the T/H command is a logic "" and in the sample mode when the T/H command is a logic "O". A total of µsec should be allowed after addressing the multiplexer before the T/H is commanded to the hold mode to allow for full scale (2V) changes. Maximum acquisition times for changes less than full scale are shown on the following page. n data acquisition applications, the T/H command input can usually be driven directly from the A/D converter Status (E.O.C.) output. As stated earlier, the MN73 is specified and tested as a system (all elements serially connected). Typical T/H amplifier specifications are listed below. Typical T/H Amplifier Performance Specifications Voltage Range ±V nput mpedance "{) nput Bias Current Logic Levels: Logic " " (min.) Logic "O" (max.) ±5nA +2.4V +.8V Logic Currents: Logic " " ± µa Logic " O" ±µa Gain +VN Gain Nonlinearity: nitial ( + 25 c) ±.2% Over Temperature ±.5% Offset Voltage (Track Mode): nitial ( + 25 c) Over Temperature Offset Change (Pedestal, Hold Mode} Over Temperature ±2mV ±4mV ±5mV Droop Rate: nitial (25 c) (max.) ± 7µVlµsec c to + 7 c (max.) ± µv/µsec - 55 c to + 25 c (max.) ± 4µV/µ.sec Acquisition Time (2V Step to ±. %} (max.) Aperture Time (max.) µsec 4nsec Feedthrough (Hold Mode)@ khz ±.% Transients Peak Amplitude: Track to,hold Hold to,track 9mV mv MULTPLEER CONNECTONS and ADDRESSNG Cnannel ~A~::<>------' Address Az( 28 nputs AJ 6 Single Ended nput Channels..J MU2 Outpu (26) (3) MU >l. Enable ''" 2 ~ A2 Address nputs A, Ao, Enable nputs MU MU2, Logic "" > + 4.V Logic "O" < + a.av On Channel LLEGAL NONE B

6 - 8 Differential nput Channels,,., MU2 Outpul A2 Address nputs A Ao Enable nputs MU MU2 On Channel LLEGAL LLEGAL NONE ) MU Enable 27) MU2 Enilble Logic " " > + 4.V Logic ''O" < +.8V 5V ' MN73 Acquisition Time vs. Output Swing MN73 Common Mode Rejection vs. Frequency Acquisition Time {µsec) ()() 8 ij l> a: 6 --"-. :E " k - Source mbalance 2 ~ \ o.5"/o 4 ~ k k k k 5 2 Common Mode nput Frequency (Hz) Output Swing (Volts) ~ - MCRO NETWORKS 324 Clark St.. Worcesler. MA 66 (58)

Four-Channel Sample-and-Hold Amplifier AD684

Four-Channel Sample-and-Hold Amplifier AD684 a FEATURES Four Matched Sample-and-Hold Amplifiers Independent Inputs, Outputs and Control Pins 500 ns Hold Mode Settling 1 s Maximum Acquisition Time to 0.01% Low Droop Rate: 0.01 V/ s Internal Hold Capacitors