Design of High PAE Class-E Power Amplifier For Wireless Power Transmission

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1 This article has been accepted and published on J-STAGE in advance of copyediting. Content is final as presented. IEICE Electronics Express, Vol.*, No.*, 1 8 Design of High PAE Class-E Power Amplifier For Wireless Power Transmission Nam Ha-Van 1a) and Chulhun Seo 1b) 1 Information and Telecommunication Engineering, Soongsil University 511 Sangdo-dong, Dongjak-gu, Seoul , Korea a) havannam@ssu.ac.kr b) chulhun@ssu.ac.kr Abstract: Practical class-e power amplifier circuits with shunt capacitance have been increasingly exploited in wireless power transmission systems for efficiency enhancement. Most designs, however, have often assumed that the shunt capacitance is linear and the maintainable efficiency in the low power supply has received little attention simultaneously. In this paper, we propose a class-e design with a shunt capacitance composed of nonlinear and linear capacitances, which was implemented and measured with 92.5% Power-Added Efficiency (PAE) at MHz operating frequency and 4 W output power level. In addition, an adaptive bias control circuit that drives the drain voltage of power amplifier was realized to up-hold high PAE at a lower input power range. Keywords: Adaptive bias control, class-e amplifier, high PAE, nonlinear capacitance Classification: Electron devices, circuits, and systems References IEICE 2014 DOI: /elex Received July 16, 2014 Accepted July 23, 2014 Publicized August 13, 2014 [1] N.O. Sokal and A.D. Sokal: IEEE J. Solid-State Circuits SC-10 (1975) 168. [2] N.O. Sokal: IEEE MTT-S Int. Microw. Symp. Dig. (1998) [3] X. Wei, H. Sekiya, S. Kuroiwa, T. Suetsugu and M.K. Kazimierczuk: IEEE Trans. Circuits Syst. I, Reg. Papers 58 [10] (2011) [4] A. Mediano, P. M. Gaud and C. Bernal: IEEE Trans. Microw. Theory Tech. 55 [3] (2007) 484. [5] H. Hwang, S. Yang and C. Seo: Proc. IEEE Asia-Pacific Microw. Conf. (2012) 496. [6] B. Park, J.Kim, Y.Cho, S.Jin, D.Kang and B. Kim: JEES 14 [1] (2014) 1 [7] M.J. Chudobiak: IEEE Trans. Circuit Syst. I, Fundam. Theory Appl. 41 [12] (1994) 941. [8] T. Suetsugu and M. K. Kazimierczuk: IEEE Trans. Circuit Syst. I, Fundam. Theory Appl. 50 [8] (2003) [9] T. Suetsugu and M. K. Kazimierczuk: IEEE Trans. Circuits Syst. I, Reg. Papers 51 [7] (2004)

2 1 Introduction PAE is an important performance parameter of the power amplifiers in wireless communication systems, mobile terminals, wireless power transmission systems, etc. A power amplifier (PA) is required to reduce the power consumption in order to maximize the system performance. In 1975, Sokal produced the idea of the class-e amplifier with a shunt capacitance, which offered high efficiency approaching 100% [1, 2]. The total shunt capacitance is often assumed linear and independent of the MOSFET switching device. The operation of an actual class-e amplifier, however, is different from the linear shunt capacitance class-e amplifier. The parasitic drain-to-source capacitance of the switching device is nonlinear in general, which significantly contributes to overall shunt capacitance. The nonlinear expressions of the total shunt capacitance must be observed. In addition, the shunt capacitance is a prominent component of the class-e amplifier that satisfies zero-voltage switching (ZVS) and zero-voltage-derivative switching (ZVDS) conditions, which ensure zero switching loss and low noise and improve component tolerances [3, 4]. The PA circuit usually operates at lower power than its maximum output power in at most operating times because of the unstable supply source (input power). An adaptive bias control circuit is exerted to control the saturation point dynamically [5, 6]. It can consistently remain high efficiency across the various input power levels. Therefore, the adaptive drain voltage control circuit has been implemented to improve the PAE of power amplifier at the low input power range. Much of the nonlinear shunt capacitance class-e amplifier research is focused on the PAE enhancement without taking into account its maintenance, and vice versa. In this work, all efforts are addressed to achieve a high PAE of the class-e amplifier using nonlinear and linear shunt capacitance composition and an adaptive drain bias control circuit. Furthermore, the proposed techniques are compared with the linear capacitance class-e amplifier to realize PAE improvement. 2 Class-E PA with nonlinear and linear capacitance composition The first set of design equations describing class-e amplifier with the parasitic nonlinear capacitors was derived by Chudobiak [7] in Nevertheless, his equations were abstract and inapplicable for practical designs using power MOSFET. Tadashi Suetsugu s analysis equations [8, 9] were given for a class-e amplifier composed of nonlinear and linear capacitance, which could be applied to real design. In this section, we follow previously obtained results for a class-e amplifier by Tadashi Suetsugu s analysis. A class-e amplifier circuit is illustrated in Fig. 1. This amplifier includes: dcsupply drain and gate voltage source V DS and V GS ; dc-feed inductor L RF C ; MOSFET as a switching device; the shunt capacitance of the amplifier consists of the MOSFET drain-to-source capacitance C 0 and the external linear capacitance C e ; the series resonant L-C. The switch duty cycle is 50% and the grading coefficient of the MOSFET output capacitance is

3 Fig. 1. Class-E power amplifier circuit. In the subsequent analysis, the shunt capacitance is described by: C shunt = C 0 + C e = C j0 1 + v S V bi + C e (1) where C j0 is the shunt capacitance at the drain-to-source voltage v S =0 and V bi is the built-in potential of the MOSFET body diode. The switch voltage is also assumed to satisfy the ZVS condition at the switch turn-on. Since the dc component of the voltage drop across the choke inductor L RF C is zero, the average value of the switch voltage is equal to the dc supply voltage V DS : where: V DS = 1 2π 2π = 1 2π 0 π 0 v S (θ)dθ 2 C [ j0 Cj0 V bi + h(θ) C e C e (Cj0 ) 2 C ] j0 + 2 h(θ) + 1 dθ (2) C e C e h(θ) = I DSθ + I m [ cos(θ + φ) cos(φ)] 2ωC j0 V bi + 1 (3) and v S is the drain-to-source voltage when the switch is off, i.e. for 0 < θ = ωt π, I DS is the dc input current, I m is the output current amplitude, and φ is the phase difference between input and output signals. Integration of Eq. (2) does not have an analysis solution; thus, the external capacitance C e parameter can be obtained numerically. In this circuit, the output load matching network is constructed by L o match and C o match to shape the output voltage and current for minimum power loss; L i match and C i match constitute the input matching network, which has received little attention regarding its effects on the overall circuit performance. In [9], the component values of a class-e PA circuit can be obtained from calculation formulas or graphs and tables after determining the design specifications of the output power and drain supply voltage. Under optimum operation, when the voltage current waveforms shown in Fig. 2 slightly overlap each other, resulting in minimized power dissipation on the transistor. The voltage across the switching device is presumed to satisfy the ZVS and ZVDS conditions. 3

4 Fig. 2. Drain voltage and current waveforms simulation of switching device: a. P in =15dBm; b. P in =0dBm. 3 Adaptive bias control circuit The PA efficiency throughout the whole range of input power is more important than the efficiency at the maximum power, especially when the input supply is unstable and dramatically fluctuates during the operation of power amplifier. For this reason, increasing the efficiency at low input power is requisite. The PAE of the power amplifier is defined as follows: P AE = P out P in P dc = P out P in V GS I GS + V DS I DS = P out P in V DS I DS (%) (4) I GS is approximately zero and can be negligible. We expect that PAE remains unchanged in spite of a low input power. Provided that V DS is fixed, the decreasing P in leads to a rapidly decline in the PAE since the drain current has an upward trend as shown in Fig. 2, whereas the output power P out decreases much more significantly than the decreasing of P in. A strongly increasing drain current has a drawback, which is the growth of the dissipated power in the MOSFET output resistance. Therefore, an adaptive bias circuit is needed to adjust the appropriate drain voltage value. Fig. 3. Implemented results of the adaptive bias circuit. The variant input signal power through a directional coupler is coupled in the coupled forward output. The RF power detector converts the power from a coupled forward output into a dc voltage. Finally, the drain control voltage has been altered to level up or down by an operational amplifier, which produces the appropriate voltage that depends upon the power detector output. Consequently, the power amplifier can be dynamically controlled by the adaptive bias circuit to encompass the highest PAE in the input power range. Based on the above operating principle analysis, the adaptive bias voltage 4

5 circuit is implemented and shown in Fig. 3, including the following components: Bi-directional coupler SYDC-20-61HP+, RF power detector LTC5507 supplied 4 V dc source, and operational amplifier (OPA) OPA548F that use a V dc supply voltage. In addition, its output voltage range increases monotonously according to the variations in input power, which is supplied to the drain MOSFET terminal. 4 Implementation and experimental results The proposed techniques were validated by fabricating a class-e PA circuit using a MRF9030 MOSFET and an adaptive bias circuit into an integrated circuit. Fig. 4 and Fig. 5 present the whole circuit diagram and the measurement of the integrated circuit. For easier observation, the experimental results are collected in Table I. Output power was measured using an Agilent 85665EC spectrum analyzer, which has a maximum measurement output of 30 dbm. An attenuator of db was added at the end of the circuit. Thus, the monitor of the analyzer showed an output power of 4.83 dbm, which means the output power was achieved at dbm or 4.13 W. The PAE value of 92.5% is calculated using Eq. (4). The power consumption of the whole adaptive circuit is essentially concentrated in the OPA circuit, which can be extracted by: P consp =V OP A *I OP A -V DS *I DS = 12.12* *438 = 1,009 (mw), where V OP A and I OP A are the OPA supply voltage and current. Fig. 4. Whole circuit diagram. A linear shunt capacitance class-e PA circuit was designed with and without an adaptive bias circuit to compare the performance with the proposed circuit. Fig. 6a) demonstrates the dominant PAE of the combination linear and nonlinear shunt capacitance class-e PA using an adaptive bias circuit in contrast to the linear one. The proposed circuit can maintain an upper PAE of 85% although the input power decreases by more than one half. On the contrary, the linear shunt circuit has a lower efficiency and PAE is strongly decreased. Fig. 6b) portrays the gain- and the PAE-dependent output power of the combination linear and nonlinear shunt capacitance class-e PA circuit with an adaptive bias circuit and a fixed drain voltage. 5 Conclusion This paper has presented a significantly improved PAE for the class-e amplifier using an adaptive bias circuit. The proposed techniques were imple- 5

6 IEICE Electronics Express, Vol.*, No.*, 1 8 Table I. Experimental results for the integrated circuit Parameters Measured results Pin 15dBm VDS /IDS 10.12V/438mA VGS /IGS 4V/0mA Pout 36.16dBm PAE 92.5% Fig. 5. Measurement of the proposed circuit. Fig. 6. a. The PAE comparison; b. Gain- and PAEdependent output power of the proposed circuit. mented and experimentally validated the performance and practical applications. The measured results indicate that high PAE performance (92.5%) was achieved and maintained over the low input power range with a 4 W output power level and MHz operating frequency. Acknowledgments This work was supported by the Human Resources Development program (No ) of the Korea Institute of Energy Technology Evaluation and Planning (KETEP) grant funded by the Korea government Ministry of Trade, Industry and Energy, and also Basic Research Laboratories (BRL) through NRF grant funded by the MSIP (No ). 6