Trigger Overview. Wesley Smith, U. Wisconsin CMS Trigger Project Manager. DOE/NSF Review April 12, 2000

Transcription

1 Overview Wesley Smith, U. Wisconsin CMS Project Manager DOE/NSF Review April 12,

2 TriDAS Main Parameters Level 1 Detector Frontend Readout Systems Event Manager Builder Networks Run Control System Computing Services Filter Systems Collision rate 40 MHz LV1 Maximum trigger rate 100 khz Average event size 1 Mbyte Data production Tbyte/day Event Flow Control 10 6 Mssg/s I-O units bandwidth ( ) 400 MByte/s Builder network (512x512 port) 500 Gbit/s Event filter computing power MIPS High Level acceptance 1-10 % Overall dead time 2% 2

3 TriDAS Evolution Plans for initial turnon of CMS: Rates (khz) Level 1 output Readout thruput Ev. Bld. thruput Ev. Filt. capacity Design Implement * Operation * * The final capacity will be determined by the evolution of technology, cost and financial resources Plan set to exploit funding resources and computing technology advances in the most effective manner 3

4 CMS Level 1 40 MHz Level-1. Specialized processors - Particle identification: high p T electron, muon, jets, missing E T - Local pattern recognition and energy evaluation on prompt macro-granular information from calorimeter and muon detectors Level 1 Detector Frontend Up to 100 khz High trigger levels. Event Manager Switch Network and CPU farms Computing Services - Clean particle signature - Finer granularity precise measurement - Kinematics. effective mass cuts & event topology - Track reconstruction and detector matching - Event reconstruction and analysis Level 1 Detector Frontend 100 Hz Event Manager Switch Computing Services 4

5 CMS Level 1 Pipeline Global LVL 1 Local level-1 Primitive e, γ, jets, µ ~ 3 µs latency loop Front-End Digitizer Pipeline delay ( ~ 3 µs) LV-1 Accept/Reject Primitive Generator Synchronous 40 MHz digital system 160 MHz internal pipeline Readout & processing latency < 1µs Signal distribution latency ~ 2 µs 5

6 Electronics Locations In Underground Shielded Room: CSC/DT Muon Track Finder RPC Muon Pattern Logic Calorimeter Regional/Global Electronics Racks Global L1 On Detector: CSC/DT Segment Generation RPC Muon Hit Generation Calorimeter Digitization only 6

7 link link link link CMS Level 1 Latency Tracker frontend detector RPC DT CSC CALO frontend frontend frontend frontend RPC PACT 79 bx 74 bx DT TPG DT 77 bx TRACK FINDERS global muon trigger 92 bx CSC TPG CSC 80 bx global trigger 77 bx CALO TPG CALO trigger 66 bx Target is 128 bunch crossings 3.2 µs set by tracker Reviewed in detail once/year Last Review in November Number shown are latency budgets Units are bunch crossings Include contingency logical units 5bx local clk/ control link to detector ~18bx clk/ control 98 bx 5bx =>28 bx 126 bx interconnections btw. logical units links btw. detector & control room(18 bx) 7

8 Calorimeter Geometry m m η= η= η= η= η= η= η= η= η= η= η= η= η= η= η= η= η= η= m HB/1 EB/1 Tracker EE/1 HE/ η= η= η= η= η= η= η= η= η= η= η= Scale (meters) m m m m 8

9 Calorimeter Electronics Interface Calorimeter Overview 4K 1.2 Gbaud serial links w/ 2 x (8 bits E/H/FCAL Energy + fine grain structure bit) + 5 bits error detection code per 25 ns crossing US CMS HCAL: FNAL/ Maryland CMS ECAL: Lisbon/ Palaiseau Copper 40 MHz Parallel 4 Highest E t isolated & non-isol. e/γ 4 Highest τ & std. jets E x, E y from each crate U. Wisconsin Calorimeter Regional 72 φ x 60 η H/ECAL Towers (.087φ x.087η for η < 2.2 & η, η > 2.2) FCAL:2x(12 φ x 12 η) US CMS : Receiver Electron Isolation Jet/Summary US CMS HCAL: U. Nebraska Luminosity Monitor E t sums Cal. Global Sorting, E t Miss, ΣE t UK CMS: Bristol CMS: Vienna Global Processor Muon Global Iso Mu MinIon Tag MinIon Tag for each 4φ x 4η region 9

10 Receiver Card (WBS ) Electron Identification Card (WBS ) Jet Summary Card (WBS ) DAQ Proc. (WBS ) 19 X VME R O C Monitor (WBS ) Clock/Control (WBS ) C E M Regional Calorimeter Crate (WBS 3.1.2) L T T C EI EI EI EI JS EI EI EI EI Prototypes (WBS ) Preprod. ASICs (WBS ) Test Facilities (WBS ) Power Supplies (WBS ) Crate (WBS ) Backplane (WBS ) Data from calorimeter FE on Cu 1.2 Gbaud (ptyp. tstd.) Into 133 rear-mounted Receiver Cards (ptyp. tstd. w/ ASICs) 160 MHz point to point backplane (ptyp. tstd.) 19 Clock&Control (ptyp. tstd.), 133 Electron ID (ptyp. tstd.) 19 Jet/Summary, Receiver Cards 160 MHz 10

11 Muon Geometry R (cm) 800 Drift Tubes RPC CSC Z (cm) 11

12 Muon Overview DT hits CSC hits RPC hits local trigger track segments (φ, δφ, η, δη) regional trigger Barrel Track Finder 4 muon candidates (p t, η, φ, quality) local trigger track segments (φ, δφ, η, δη) regional trigger Endcap Track Finder 4 muon candidates (p t, η, φ, quality) PAttern Comparator 4 barrel + 4 endcap muon candidates (p t, η, φ, quality) Global Muon 4 muons (p t, η, φ, quality) 12

13 )< 6$78'4 )< 6$78'4 CSC Layout (WBS 3.1.1) 60 Sector Layout (x12 Sectors) EMU )< 6$78'4 *< 6$78'4 *< %6$78'4 x 6 = 360 x 2 Ends = x 12 0@+,& 0@+,) 0@+,+ 0@+,H 1 µ/ 2 links 2 x Rice Clock & Control Card 03'?!'48 5"4A +< +< +< +< +< +< +< +< +< +< +< +< +< +< +< +< +< +< +< +< +< +< +< +< 03'?!'48 5"4A 6$78'4 J$7$2K$4 0@),) 0@),+ Rice Rice WBS Florida O"44$D LMJ UCLA Barrel 6$78'4!4'7$99'4 Barrel +< +< +< +< +< +< )< )< )< 03'?!'48 5"4A *µ 565 6$78'4 *µ!4'7$99'4 0@&,) 0@&,+ EMU WBS $78'4 J$7$2K$4 WBS WBS WBS UCLA +< +< +< +< +< +< )< )< )< +*µ +*µ +*µ +Nµ +Nµ 03'?!'48 5"4A )µ )µ )µ &µ &µ O"44$D 03'?!'48 5"4A Crate: 4 SR,CCC 2 SP-CSC 2 SP-OVR Mother Boards (Rice) in 8 Iron Disk Peripheral Crates Backplane, Crate Interconnects 5 Muon Port Cards x 12 EMU 24 Optical Links x 12 6 Track Finder Crates in Counting Room (total). Sort output (Rice) to Global Muon (Vienna) 13

14 U. S. Organization W. Smith, Wisconsin CMS Trig. PM Level 2 Manager J. Hauser, UCLA Level 3 Manager Muon W. Smith, Wisconsin Level 3 Manager Calor. P. Padley Rice Port Cards Clock & Control J. Hauser UCLA Sector Receiver D. Acosta U. Florida Sector Processor J. Lackey Wisconsin Engineering P. Chumney S. Dasu Wisconsin Cpt. Design, Simulation US CMS DOE/NSF Review: April 11-13,

15 Status Muon Construction & test of prototype boards FPGA's, Optical Links, Interfaces Integration test of prototype boards Muon Port Card, Sector Receiver, Sector Processor, Backplane, Crate, Clock Board, EMU Prototypes Calorimeter Produce & test 2nd generation prototype boards Receiver Card, Electron Isolation Card, Backplane Copper high speed serial links Produce & test ASICs Phase, Boundary Scan, Sort, Electron ID test on 2nd generation prototype boards Produce TDR 15

16 Presentations CMS Design & Status W. Smith 11:15-11:30 Simulation Update S. Dasu 11:30-12:00 Cal.Regional Status & Plan W. Smith 12:00-12:30 LUNCH: 12:30-1:30 PM Muon Overview J. Hauser 1:30-1:50 Muon Trig. Electronics in Cavern P. Padley 1:50-2:10 Muon Trig. Electr. in Counting Room D. Acosta 2:10-2:30 Cost and Schedule: Status W. Smith 2:30-3:00 16