Modelling and Simulation of SVM Based DVR System for Voltage Sag Mitigation
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1 Research Journal o Applied Sciences, Engineering and Technology 6(3): , 013 SSN: ; e-ssn: Maxwell Scientiic Organization, 013 Submitted: February 18, 013 Accepted: March 11, 013 Published: December 15, 013 Modelling and Simulation o SVM Based DVR System or Voltage Sag Mitigation 1 S. Leela and S.S. Dash 1 Department o EEE, SASTRA University, Kumbakonam, Tamilnadu, ndia Department o EEE, SRM University, Chennai, Tamilnadu, ndia Abstract: The aim o this study is to design and simulate three phase DVR system using MATLAB simulink. SVM based DVR is proposed to reduce the sag on the transmission line. The SVM based DVR injects voltage into the line to compensate the voltage drop. Sag is created by connecting a heavy load in parallel with the existing system. This sag will be compensated by injecting the inverter output through an injection transormer. The results o simulation are compared with the theoretical results. Keywords: Fast ourier transorm, injection transormer, matlab simulink, space vector modulation, three phase dynamic voltage restorer, total harmonic distortion, voltage sag NTRODUCTON The two most important power quality problems that encompass almost 80% o the distribution system is the voltage sags and voltage swells. According to EEE standard, the voltage sag is the decrease o 0.9 to 0.1 p.u. in the rms voltage level at system requency and with the duration o hal a cycle to 1 min (Martinez and Arnedo, 006). The main causes o voltage sags are short circuits, starting large motors, sudden changes o load and energisation o transormers (Heine and Khronen, 003). The voltage sag is a transient phenomenon whose causes are classiied as low or medium requency transient events (Martinez and Arnedo, 006). n recent years, considering the use o sensitive devices in modern industries, dierent methods o compensation o voltage sags have been used. One o these methods is by using the DVR to improve the power quality and compensate the load voltage. Previous studiess involve dierent aspects o DVR perormance and dierent control strategies have been ound. These methods mostly depend on the purpose o using DVR. n some methods, the main purpose is to detect and compensate or the voltage sag with minimum DVR active power injection (Choi et al., 000). Also, the in phase compensation method can be used or sag and swell mitigation (Benachaiba and Ferdi, 008). For eliminating the battery in the DVR structure and controlling more than one line the multi line DVR can be used (Vilathgamuwa et al., 006). Research has been made on the DVR in medium level voltage (Nielsen et al., 004). The control o DVR under requency variations (Jindal et al., 008) and harmonic mitigation (Newman et al., 005) are also in the area o research. The closed loop control with load voltage and current eedback is introduced as a simple method to control the DVR in Vilathgamuwa et al. (00). The transient response is improved and the steady-state error in DVR is eliminated using Posicast and P+Resonant controllers. The Posicast controller is a kind o step unction with two parts and is used to improve the damping o the transient oscillations initiated at the start instant rom the voltage sag. The P+Resonant controller consists o a proportional unction plus a resonant unction. t eliminates the steady state voltage tracking error (Li et al., 007a, c). The dierent methods o controlling the DVR includes the state eedorward and eedback methods (Kim and Sul, 005), symmetrical components estimation (Marei et al., 007), robust control (Li et al., 007b) and wavelet transorm (Saleh et al., 008). n all o the above mentioned methods, the source o disturbance is assumed to be on the eeder which is parallel to the DVR eeder. n this paper, a multiunctional control system is proposed. When the source o disturbance is the parallel eeders, the DVR protects the load voltage using Posicast and P+Resonant controllers. But during a downstream ault, the equipment protects the PCC voltage, limits the ault current and protects itsel rom large ault current. The DVR proposed there acts like a virtual inductance with a constant value so that it does not receive any active power during limiting the ault current. When the ault current passes through the DVR, it acts like a series variable impedance. Corresponding Author: S. Leela, Department o EEE, SASTRA University, Kumbakonam, ndia 444
2 Res. J. Appl. Sci. Eng. Technol., 6(3): , 013 n this study, the basis o the proposed control strategy is that when the ault current does not pass through the DVR, an outer eedback loop o the load voltage with an inner eedback loop o the ilter capacitor current will be used. To improve the dynamic response o the load voltage, a eedorward loop will be used. Also to improve the transient response, the Posicast controller and to eliminate the steady state error, the P+Resonant controller are used. The series voltage is injected in the opposite direction and thereore, the DVR acts like a series variable impedance. The above literature does not deal with SVM based DVR system to compensate the sag. This study proposes SVM based inverter or the control o sag. DVR COMPONENTS AND TS BASC OPERATONAL PRNCPLE The Fig. 1 shows a typical DVR connected distribution system. The DVR consists o a series connected injection transormer, a voltage source inverter, an inverter output ilter and an energy storage device that is connected to the DC link. Beore injecting the inverter output to the system, it must be iltered so that the harmonics due to switching unction in the inverter are eliminated. When employing the DVR in real situations, the injection transormer will be connected in parallel with a bypass switch. When there is no disturbances in voltage, the injection transormer (hence, the DVR) will be short circuited by this switch to minimize losses and maximize cost eectiveness. Fig. 1: Typical DVR connected distribution system Fig. : Phasor diagram o the electrical conditions during a voltage sag 445
3 Res. J. Appl. Sci. Eng. Technol., 6(3): , 013 Also, this switch can be in the orm o two parallel thyristors, as they have high on and o speed (Awad et al., 004). The voltage sag events and use o Flexible AC Transmission Systems (FACTS) devices, such as DVR to mitigate them is provided in Milanovic and Zhang (010). t is obvious that the lexibility o the DVR output depends on the switching accuracy o the pulse width modulation scheme and the control method. The PWM generates sinusoidal signals by comparing the sinusoidal wave with the sawtooth wave and sending appropriate signals to the inverter switches. This scheme is described in Rashid (004). The basic operational principle o DVR is detailed. The DVR system shown in Fig. 1 controls the load voltage by injecting an appropriate voltage phasor (V dvr ) in series with the system using the injection series transormer. n sag compensation techniques, it is necessary that during compensation, the DVR injects some active power to the system. Hence, the capacity o the storage unit can be a limiting actor in compensation, especially during long term voltage sags. Figure shows the electrical conditions during voltage sag, where or clarity only one phase is shown. Voltages V 1, V and V dvr are the source side voltage, the load side voltage and the DVR injected voltage respectively. The operators, φ, δ, α are the load current, the load power actor angle, the source phase voltage angle and the voltage phase advance angle respectively (Vilathgamua et al., 1999). n addition to the in phase injection technique, another technique called the phase advance voltage compensation technique is also used (Vilathgamua et al., 1999). One o the advantages o this method over the in phase method is that less active power should be transeered rom the storage unit to the distribution system. This results in compensation or deeper sags or sags with longer durations. Due to the existance o semiconductor switches in the DVR inverter, this piece o equipment is nonlinear. Using linearization techniques the state equations can be linearized. The dynamic characteristics o DVR is inluenced by the ilter and the load. Although the modeling o the ilter is easy to do, the load modeling is not as simple because the load can vary rom a linear time invariant one to a nonlinear time variant one. Figure 3 shows the distribution system with DVR. Here the load voltage, is regulated by the DVR through injecting V dvr. For simplicity, the bypass switch shown in Fig. 1 is not presented in this igure. Here it is assumed that the load has a resistance R l and an inductance L l. The DVR harmonic ilter has an inductance o L, a resistance o R and a capacitance o C. Also the DVR injection transormer has a combined winding resistance o R t, a leakage inductance o L t and turns ratio o 1 : n. To improve the transient response the Posicast controller is used. The Posicast controller has limited high requency gain. t has low sensitivity to noise. To ind the appropriate values o δ and T d, irst the DVR model will be derived according to Fig. 3, as ollows: d V1 = Vc + R + L dt = c = n l dvc c = C dt Vdvr = n[ Vc n( Rt t + Lt d t / d t )] V = V + V 1. (1) dvr According to (1) and the deinitions o damping and the delay time in the control literature, δ and T d are derived as ollows: Π Td = = w δ = e T ξπ / 1 ξ δ = e R Π 1 L C C Π / R 4L 4L R C () Fig. 3: Distribution system with the DVR 446
4 Res. J. Appl. Sci. Eng. Technol., 6(3): , 013 The Posicast controller works by pole elimination and proper regulation o its parameters is necessary. For this reason, it is sensitive to inaccurate inormation o the system damping resonance requency. To decrease this sensitivity, the open loop controller can be converted to a closed loop controller by adding a multiloop eedback path parallel to the existing eedorward path. The inclusion o a eedorward and a eedback path is called as two degrees o reedom (- DOF) control. The -DOF control provides a DOF or ensuring ast dynamic tracking through the eedorward path and a second degree o reedom or the independent tuning o the system disturbance compensation through the eedback path. The eedback path consists o an outer voltage loop and a ast inner current loop. The steady state voltage tracking error is eliminated by adding a computationally less intensive P+Resonant compensator to the outer voltage loop. The ideal P+Resonant compensator can be mathematically expressed as: K s GR ( s) = k p + (3) S + w 0 where K P and K are gain constants and w 0 = Π * 50 rad/sec is the controller resonant requency. Theoritically, the resonant controller compensates by introducing an ininite gain at the resonant requency o 50 Hz to orce the steady state voltage error to zero. The ideal resonant controller, acts like a network with an ininite quality actor, which is not realizable in practice. A more practical (nonideal) compensator is used which is expressed as: G ( s) = k R p + S K wcut S + w S + w cut o (4) where, w cut is the compensator cut o requency which is 1 rad/sec. SMULATON RESULTS Three phase DVR circuit is shown in Fig. 4(a). An additional load is connected in parallel with the existing load to create the sag in the transmission line. The inverter in the present system is SVM based inverter. The block diagram o the SVM system is shown in Fig. 4(b). The inverter in the DVR is shown in Fig. 4(c). The three phase voltages are shown in Fig. 4(d). An additional load is applied at 0.5 secs. t is compensated by using a DVR at t = 0.3 sec. The rms voltage across the load is shown in Fig. 4(e). The RMS current through the load is shown in Fig. 4(). The real and reactive powers in the load are shown in Fig. 4(g, h), respectively. The real and reactive powers increase due to the injection o the voltage. FFT analysis is done or the output voltage and spectrum is obtained. The THD o the output voltage is 1.39%. This is the best injection since the THD is minimum. The requency spectrum is shown in Fig. 4(i). (a) 447
5 Res. J. Appl. Sci. Eng. Technol., 6(3): , 013 (b) (c) (d) 448
6 Res. J. Appl. Sci. Eng. Technol., 6(3): , 013 (e) () (g) 449
7 Res. J. Appl. Sci. Eng. Technol., 6(3): , 013 (h) (i) Fig. 4: (a); Three phase DVR circuit; (b): SVM model; (c): Three phase inverter; (d): Line voltage with change in load; (e): RMS voltage across load with change in load; (): RMS current through load with change in load; (g): Real power with change in load; (h): Reactive power with change in load; (i):fft analysis or voltage CONCLUSON The three phase SVM based DVR system is designed by using the blocks o simulink. This system is successully simulated and the results o the load voltage, load current, real power, reactive power and spectrum are presented. The THD is ound to be minimum with SVM based DVR system. Thus the SVM based DVR is a viable alternative to the existing DVR systems. The simulation results coincide with the theoritical results. ACKNOWLEDGMENT The authors would like to acknowledge the Department o Electrical and Electronics Engineering, SASTRA university or providing the acilities to conduct the research. REFERENCES Awad, H., J. Stevenson and M. Bollen, 004. Mitigation o unbalanced voltage dips using static series compensator. EEE T. Power Electron., 19(3): Benachaiba, C. and B. Ferdi, 008. Voltage quality improvement using DVR. Electt. Power Qual. Utilisation J., 14(1). Choi, S.S., B.H. Li and D.M. Vilathgamuwa, 000. Dynamic voltage restoration with minimum energy injection. EEE T. Power Syst., 15(1): Heine, P. and M. Khronen, 003. Voltage sag distribution caused by power system aults. EEE T. Power Syst., 18(4): Jindal, A.K., A. Ghosh and A. Joshi, 008. Critical load bus voltage control using DVR under system requency variation. Elect. Power Syst. Res., 78():
8 Res. J. Appl. Sci. Eng. Technol., 6(3): , 013 Kim, H. and S.K. Sul, 005. Compensation voltage control in dynamic voltage restorers by use o eed orward and state eedback scheme. EEE T. Power Electron., 0(5): Li, Y.W., D.M. Vilathgamuwa, P.C. Loh and F. Blaabjerg, 007a. A dual unctional medium voltage level DVR to limit downstream ault currents. EEE T. Power Electron., (4): Li, Y.W., D.M. Vilathgamuwa, P.C. Loh and F. Blaabjerg, 007b. A robust control scheme or medium voltage level DVR implementation. EEE T. ndus. Electron., 54(4): Li, Y.W., P.C. Loh, F. Blaabjerg and D.M. Vilathgamuwa, 007c. nvestigation and improvement o transient response o DVR at medium voltage level. EEE T. nd. Appl., 43(5): Marei, M.., E.F. El-Saadany and M.M.A. Salama., 007. A new approach to control DVR based on symmetrical components Estimation. EEE T. Power Delivery, (4): Martinez, J.A. and J.M. Arnedo, 006. Voltages sag studies in distribution networks-part : System modeling. EEE T. Power Delivery, 1(3): Milanovic, J.V. and Y. Zhang, 010. Global minimization o inancial losses due to voltage sags in FACTS based devices. EEE T. Power Delivery, 5(1): Newman, M.J., D.G. Holmes, J.G. Nielsen and F. Blaabjerg, 005. A Dynamic Voltage Restorer (DVR) with selective harmonic compensation at medium voltage level. EEE T. nd. Appl., 41(6): Nielsen, J.G., M. Newman, H. Nielsen and F. Blaabjerg, 004. Control and testing o a Dynamic Voltage Restorer (DVR) at medium voltage level. EEE T. Power Electron., 19(3): Rashid, M.H., 004. Power Electronics-Circuits, Devices and Applications. Pearson, New Delhi. Saleh, S.A., C.R. Moloney and M.A. Rahman, 008. mplementation o a dynamic voltage restorer system based on discrete wavelet transorms. EEE T. Power Delivery, 3(4): Vilathgamuwa, M., A.A.D.R. Perera and S.S. Choi, 00. Perormance improvement o the dynamic voltage restorer with closed loop load voltage and current mode control. EEE T. Power Electron., 15(5): Vilathgamuwa, D.M., H.M. Wijekoon and S.S. Choi, 006. A novel technique to compensate voltages sags in multiline distribution system the interline dynamic voltage restorer. EEE T. nd. Electron., 53(5): Vilathgamua, M., A.A.D.R. Perara, S.S. Choi and K.J. Tseng, Control o energy optimized dynamic voltage restorer. Proceeding o EEE ECON Conerence, San Jose., :
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