Applying DVR to Control Fault Currents of Distribution System

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1 Australian Journal of Basic and Applied Sciences, 5(9): , 211 SSN Applying DR to Control Fault Currents of Distribution System M. Sajedi, S. Lotfi, Y. Hoseynpoor, P. Mosadegh Ardabili, T. Pirzadeh Ashraf Department of electrical engineering, Ahar Branch, slamic Azad University, Ahar, ran. Abstract: Dynamic voltage Restorer (DR) is applied to optimize the power quality aspects such as voltage sag and swell compensation. n this paper, DR application in order to limit the fault current in addition to compensate voltage distortion, proposed. By calculating instantaneous current magnitude, control system recognizes if the fault exists or not, and determines whether DR should operate in normal mode or try to reduce the fault current. n the fault condition, DR acts like virtual inductance and with clearing fault, By calculating load voltage magnitude, control system returns DR to normal mode. The simulation results show that the system operates correctly under voltage sag and short circuit conditions. Key word: Dynamic voltage restorer, oltage distortion, irtual impedance, Fault current. NTRODUCTON Dynamic voltage restorer is one of power electronics devices connected in series with the distribution system to protect sensitive loads against the voltage distortions. Fig. 1 shows the basic topology of a DR. As illustrated in Fig. 1. DR is composed of an inverter, energy storage element, RC filter, and a transformer. During downstream fault occurrence, the voltage of point of common connection (PCC) falls and in consequence, DR might try to compensate voltage sag, which would lead to fault current increase. f this current passes through DR, the power electronic devices may face with heavy defects. n conventional DRs, the passive methods are used to bypass DR via a parallel switch in order to avoid such miss operations (Woodley et al., 1999; Woodley et al., 2). n (Lee et al., 24; Choi et al., 25), using active methods are presented to reduce fault current in devices connected in series with grid. n (Li et al., 26; Axente et al., 26), DR is applied for fault current reduction applying such methods. n this paper, by adding a control function to DR control unit, the fault current is reduced as fault occurs. n fact, DR is maintained in the grid and is not separated from distribution system and therefore, the control strategy is changed. This control strategy change makes DR to perform as a great inductor during fault occurrence that leads to fault current limitation and dc link stress suffer minimization. Due to high expenses of DR manufacturing, installation and utilization in power system, applying DR with dual functionality well over comes the fault current limiters (FCL) application. The DR operation principle in different circumstances is investigated in continues and it is well explained the way that the fault occurrence is recognized and is limited. The simulation results in MATLAB/Simulink are presented at the end of the paper to verify the correct operation of proposed topology. DR Operation: Under steady state of the system, the series inverter plays the main roll in reactive and active power control by injecting adjustable voltage amplitude and adjustable angle ρ varies between zero and 36. The diagram of such operation is illustrated in Fig. 2. The s shows the source voltage, r stands for load voltage and is the injection transformer s injecting voltage. Parameter X L is the reactance of distribution system and X BT is the leakage reactance of injection transformer, while X is the sum of mentioned reactances. Fig. 3 shows the vector diagram of the system during load side fault occurrence assuming constant. As fault occurs, the amplitude and the phase angle of the injected voltage can be assumed constant because of the innate delay of P controller used in series inverter control. n this paper, a new method is proposed to keep DR in the system and utilize it as a fault current limiter considering which the inverter injects a voltage with 9 degrees phase jump compared with the current phase. The vector diagram of such mode is shown in Fig. 3. The system considers this series injection as an inductive reactance. The magnitude of this reactance is calculated by (1). X (1) The fault current amplitude is obtained as follows: Corresponding Author: M. Sajedi, Department of electrical engineering, Ahar Branch, slamic Azad University, Ahar, ran. mahyar-sajedi@iau-ahar.ac.ir 1474

2 Aust. J. Basic & Appl. Sci., 5(9): , 211 f S X X (2) Fig. 1: DR Topology. s seff r x Fault Fig. 2: The diagram of DR normal operation. s seff r x Fault s jx Fig. 3: The vector diagram of the system during load side fault occurrence. where X and show the line reactance and inverter injected voltage, respectively. By changing DR control strategy during fault occurrence, it operates as a great inductor, which leads to fault current reduction in addition to dc link suffered stresses minimization due to active power exchange minimization. DR Operation in oltage Distortions Compensation Mode: oltage sag is the most common power quality problem reported in distribution systems, which rises due to fault occurrence in the grid. Fig. 4 shows two locations that the fault might cause voltage sag in PCC. Here, the DR has to restore voltage amplitude to the desired level by injecting series voltage to the grid. DR Operation in Fault Current Limitation Mode: Fig. 5 shows the downstream fault occurrence. n order to overcome such problem, DR should be controlled in a way that the fault current is reduced. Here, DR performs as virtual impedance (Z o ) (Li et al., 26). Fig. 6 shows the phasor diagram of the voltages. Parameter Line is the voltage drop along downstream 1475

3 Aust. J. Basic & Appl. Sci., 5(9): , 211 and upstream feeders impedance and the fault impedance(z S +Z Line ). Parameters, nj and S, are DR injected voltage and main feeder voltage, respectively. The following shows the relation of the voltages. (3) S nj Line The fault current with and without applying limitation strategy is as follows: Fault Z S S Z Line (4) FaultLimited S Z Z Z S Line o (5) Fig. 4: oltage disturbance in main feeder. S Z S Z Line Fig. 5: Downstream fault occurrence. PCC Load nj nj Line S Fig. 6: Phasor diagram of the voltages during fault occurrence. f the fault current decrease to a constant value, the Line voltage will fall in the doted circle depending on the DR injecting voltage. Fig. 6 well shows that the minimum injected voltage amplitude is required if the injected voltage has the same phase as the line voltage. n order to achieve this, the value of virtual impedance should be in proportion with feeder impedance (Z S +Z Line ). The existence of virtual resistance component results in active power consumption and consequently, the energy storage element s voltage decreases. Therefore, DR should operate as a pure virtual inductor to minimize the energy consumption. n other words, the injected voltage phase should lead fault current phase with 9 degrees. Mathematical Model of DR and Control Circuit: The model presented in (Huang Z and Ni. Yinxin, 2) is applied in this paper. Fig. 7 Shows the schematic of DR, in which X se and n are leakage reactance and series transformer voltage ratio respectively. All parameters used in DR model are shown in Fig. 7. Pulse width modulation (PWM) method is applied to control the inverter switching. The voltage relation of series inverter is depicted as follows: m se d (6) nb 1476

4 Aust. J. Basic & Appl. Sci., 5(9): , 211 where m se is the control factor used for 2 voltage amplitude adjustment and is the control factor used for 2 voltage angle adjustment that is controlled through 2 trigger angle. Parameter d is the dc link voltage. (7) se s 2 The series inverter injected voltage,, can be separated in to p and q components. These components directly affect the active and reactive power. Each is obtained comparing the active and reactive powers passing through the line with the reference values, respectively. The control diagram of series inverter is illustrated in Fig. 8. The advantageous of direct active and reactive power control is the fact that the power flow is controlled in a desired value via a closed loop controlling system. t is not possible to maintain power flow in the desired value (El-Mouris and A.M.sharaf, 25). Therefore, the direct voltage injection method is used for DR operation as the fault current limiter. n order to operate DR as FCL, the line current phase is obtained using a PLL. The inverter operates as a great inductor by injecting a lead voltage with maximum amplitude and 9 degrees phase difference. The fault current will be limited in result. Factors m se and will change into m f and when the fault is recognized. The control diagram of series inverter under fault condition is shown in Fig. 9. S S L SE X SE r BT n :1 2 2 SE Fault, L L Fig. 7: The schematic of DR. mse m f se f Q L * Q L + P 2 2 p q n 2 B d m SE * P L _ 1 p 2 P 2 tg _ + + q SE P L S Fig. 8: The control diagram of series inverter. L PLL 9 f Fig. 9: The control diagram of series inverter under fault condition. m Max m f Fault Occurrence Recognition and Fault Clearing: The effective value of instantaneous current is measured for fast recognition of downstream short circuit and fast DR response to condition change. The DR changes its operation mode and will operate in virtual inductance mode to maintain the main feeder voltage in desired amplitude and to limit the fault current as the current exceeds the predefined permitted current. The fault clearance recognition is done by measuring the 1477

5 Aust. J. Basic & Appl. Sci., 5(9): , 211 downstream voltage. The effective value of instantaneous load voltage is measured repeatedly and the load voltage is conditioned as the fault is cleared. Consequently, the DR returns to its normal operational mode. t should be noted here that the DR operates in condenser mode during its normal operation. A low-pass filter is applied in fault recognition control circuit to avoid the interference of possible fault signals and noises which might result in disoperation of downstream fault occurrence process. Simulation: The proposed topology is simulated in MATLAB/Simulink to evaluate the correct operation of it. The parameter values of the system are shown in Table. Table : The parameter values of the system. Source phase voltage 22v/5Hz Source inductance.1 mh Source resistance.1ω Load consuming reactive power Load consuming active power Line inductance nverter output inductance nverter output capacitance 1kvar 1kw.24mH.7mH 9.8mF nverter output resistance.2ω Switching frequency 8kHz 4 pcc (a) 4 Load voltage oltage(v) Time(s) Fig. 1. a: Main feeder voltage without DR, b) Load voltage without DR. (b) Here, a 38v distribution system connected DR is used to compensate main feeder voltage distortions and to condition the downstream load voltage. t is also used to reduce downstream fault current and to correct the main feeder voltage. This is accomplished by making DR to operate in t=.5sec. t is assumed that a threephase to ground fault occurs from t=.1sec to t=.2sec. The main feeder voltage and the load voltage during the short circuit occurrence, without and with DR application are shown in Fig. 1 and 11, respectively. n Fig. 12, the injected voltage of each phase is illustrated. As it is obvious, the main feeder voltage sag is well 1478

6 Aust. J. Basic & Appl. Sci., 5(9): , 211 compensated and the load voltage is maintained in its desired magnitude. Also, DR operates as a virtual impedance by changing its operational mode as the downstream fault occurs and consequently, the main feeder voltage is maintained in its desired range. As fault is cleared in t=.2sec, DR operation returns to its normal mode. The fault current without DR operation and with its operation in virtual impedance mode is shown in Fig. 13. As it is obvious, DR is significantly able to limit the fault current ant to prevent its impacts on upstream network. 4 pcc (a) 4 Load oltage Fig. 11. A: Main feeder voltage with DR, b) Load voltage with DR. (b) 15 inja (a) 1479

7 Aust. J. Basic & Appl. Sci., 5(9): , injb (b) 15 injc Fig. 12. A: Phase a injected voltage, b) Phase b injected voltage, c) Phase c injected voltage. (c) 1 Line Current Current (A) (a) 2 Line Current Current (A) (b) Fig. 13. A: Fault current without DR, b) Fault current with DR. 148

8 Aust. J. Basic & Appl. Sci., 5(9): , 211 Conclusion: Dynamic voltage restorer is one of the most applied power electronic devices in distribution systems for power quality conditioning. n this paper, DR is applied to compensate voltage distortions and to downstream fault current reduction. The control system controls DR in a way that it operates as a condenser which stabilizes the load voltage in the grid. By measuring the instantaneous current amplitude in the synchronous frame, the control system changes DR operation mode as the fault occurs and makes the inverter to operate as virtual impedance for fault current reduction. n result, the main feeder voltage is maintained in its desired magnitude. As the fault is cleared, the control system returns DR to its normal operation mode. The simulation results in MATLAB/Simulink confirm the correct performance of the proposed topology. REFERENCES Axente, T., M. Basu, M.F. Conlon and K. Gaughan, 26. Protection of DR against short circuit faults at the load side, nternational Conference on Power Electronics, Machines and drives, Choi, S.S, T.X. Wang and D.M. ilathgamuwa, 25. A series compensator with fault current limiting function, EEE Transaction on Power Delivery, 2: El-Mouris, M.S. and A.M. Sharaf, 25. Novel Controllers for the 48-Pulse SC STATCOM and SSSC for oltage Regulation and Reactive Power Compensation, EEE Transaction on Power Systems, 2(4). Huang, Z. and Ni. Yinxin, 2. Application of unified power flow controller in interconnected power system-modeling, interface, control strategy and case study, EEE. Trans power syst., 15: Lee, W.C., T.K. Lee, C.S. Ma and D.S. Hyun, 24. A fault scheme for series active compensators, EEE Transaction on Power Delivery, 19: Li, Y.W., D.M. ilathgamuwa, P.C. Loh and F. Blaabjerg, 26. A dual-functional medium voltage level DR to limit downstream fault currents, Power Electronics Specialists Conference. Woodley, N.H., A. Sundaram, T. Holden and T.C. Einarson, 2. Field experience with the new platform-mounted DR, nternational Conference on Power System Technology, Woodley, N.H., L.Morgan and A. Sundaram, Experience with an inverter-based dynamic voltage restorer, EEE Transaction on Power Delivery, 14:

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