ST20P16. Ver 1.5 1/10 6/13/07

Transcription

1 T T06 6K 8-bit ingle hip Microcontroller Notice: itronix Technology orp. reserves the right to change the contents in this document without prior notice. This is not a final specification. ome parameters are subject to change.. FATUR 8-bit static pipeline U RM: 6K x 8 bits RAM: 9 x 8 bits peration voltage :.4V ~3.6V 4 M Bi-directional bit programmable / pins - Twenty (ort-a high nibble & ort-b/) are shared with LD drives 6 utput pins (Four are shared with LD common and two are shared with ) nput pins (code option: hared with X) Hardware debounce option for input port Bit programmable ULL-U for input port Timer/ounter : - ne 8-bit timer / 6-bit event counter - ne 8-bit BA timer Five powerful interrupt sources : - xternal interrupt (edge trigger) - TMR interrupt - BA timer interrupt - RTA[7~0] interrupt (transition trigger) - DA reload interrupt 3-level deep stack Dual clock source : - X: rystal oscillator: 3768Hz - : R oscillator 500K ~ 4M Hz U clock 50k ~ M Hz Build-in oscillator with warm-up timer LD controller driver: - 6 level contrast control - 30 ( 8x40) dots ( /8 duty, /4 bias, programmable) - 60 ( 4x40) dots ( /4 duty, /3 bias, programmable) - Two clock source options: R and resonator oscillator - Keyboard scan function supported on 0 shared segment drives - nternal bias resistors(/4 bias & /3 bias) with 3 level driving strength control rogrammable ound enerator () includes : - Tone generator - ound effect generator - 6 level volume control - Digital DA for speech / tone Three power down modes : - WA0 mode - WA mode - T mode. NRAL DRTN T06 is a low-cost, high-performance, fully static, 8-bit microcontroller designed with M silicon gate technology. t comes with 8-bit pipeline U core, RAM, timer, LD driver, / port, and mask program RM. A build-in dual oscillator is specially integrated to enhance chip performance. For business equipment and consumer applications. uch as watch, calculator, and LD game, T06 is definitely a perfect solution for implementation. Ver.5 /0 6/3/07

2 T06 3. BLK DARAM Ver.5 /0 6/3/07

3 T06 4. AD DARAM M M M0 B7/39 B6/38 B5/37 B4/36 B3/35 B/34 B/33 B0/3 7/3 6/30 5/9 4/8 3/7 /6 /5 0/ T M3 M4 M5 M6 M7 WRT ND B VDD RT V X/D0 X/D A7/3 A6/ A5/ A4/0 A3 A A A0/NTX 3 Ver.5 3/0 6/3/07

4 T06 5. AD DRTN in No. Designation Type Description ~9 0/A4 ~ 3/A7 / LD egment output ort-a bit programmable / 8 ~ 68 ~ 57 56~49 48~4 4 ~ 3 LD egment output 4/0 ~ 3/7 3/B0 ~ 39/B7 / / LD egment output ort- bit programmable / LD egment output ort-b bit programmable / 39~36 M 0 3 LD ommon output 35~3 M 4-7 LD ommon output utput port 4 RT ad reset input (HH Active) 9 ND round nput and chip substrate 6 A0/NTX 5~9 A -7 / / ort-a bit programmable / dge-trigger nterrupt. Transition-trigger nterrupt rogrammable Timer clock source ort-a bit programmable / Transition-trigger nterrupt 8~7,B /DA utput 6 VDD ower supply X/D0 X/D 5 input pin. For 3768Hz crystal ort-d input output pin. For 3768Hz crystal ort-d input input pin. Toward to external resistor 7~8 ~3 T programming power 9,0,3, V T programming power 30 WRT Legend: = input, = output, / = input/output, = power. ower on timer control pin. uggest tie to ND to disable Ver.5 4/0 6/3/07

5 6. Application ircuits T06 6. ALATN RUT UNDR 3V RATN VLTA VDD lock LD / ALARM : 3V : 3768Hz crystal and 4.0MHz R oscillator : /8 duty : RT A :, B FUR 6-: ALATN RUT WTHUT LD KYBARD AWAKN UL Note: The functions of WRT have been added in the T08. When T08 is used as T06,please connect to ND. Ver.5 5/0 6/3/07

6 T06 VDD lock LD / ALARM : 3V : 3768Hz crystal and 4.0MHz R oscillator : /8 duty : RT A : 0, 5pF FUR 6-: ALATN RUT WTH LD KYBARD AWAKN UL Note:. Ms and s output ND level, while the LD is turned off.. f LD is turned off, Keyboard Awaking ulses must be turned off at the same time. 3. onnect one capacitor of 00F to stabilize oscillation frequency. This capacitor must be placed close to. 4.The functions of WRT have been added in the T08. When T08 is used as T06,please connect to ND. Ver.5 6/0 6/3/07

7 7. T RM rogramming nterface T06 7. nterface Description n order to program T RM, several pins have to be reserved on the B which is bounding with T08. These total are 8 pins that include following list TABL 7-:. t just be used to connect writer to program T RM. After programming and disconnecting from writer, they can be used as original purpose. TABL 7-: in assignment of interface T06 ad Name ( nterface) in Type Description V V ower High Voltage ower upply ) T rogram, rogram Verify, V=> V ) T Read:V=> Floating ND V ower round. V VDD ower Low Voltage (.4V-5.4V) ower upply. 3 B nput signal 4 M nput signal 5 M utput signal K nput signal RT RT nput RT 7. rogramming Function pecification There are reserved 5 option bits to select to apply or not the function we needed. t includes D input and ode rotection. To setup the options should program the T RM by T writer. TABL 7-: ption ward Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit Bit Bit 0 Default WDTT WDTN - D Bit 7: : T RM code protect. 0 =protect T data. =Un-rotect T data. Bit 3: WDTT: WDT stop control bit. 0 = WDT stop at WA- and T mode. Bit : WDTN: WDT enable. 0 = WDT disable. Bit 0: D: ort function selection 0 = D used as input port. = input pin for 3768Hz crystal. Note :Watchdog timer (WDT) circuit has been added in the T08. When T08 is used as T06, the option bits of WDTN and WDTT have to be programmed to 0.(T firmware option select ) Ver.5 7/0 6/3/07

8 8. AKA NFRMATN T06 Dimensions in Millimeters 80L YMBL MLLMTR MN. NM. MAX. b e 0.80 B. D 8.4 RF.0 RF TLRA F FRM AND TN aaa 0.5 bbb 0.0 ccc 0.0 Ver.5 8/0 6/3/07

9 T06 9. N NFURATN(QF80) N N / 4 / A7/ 3 A6/ A5/ A4/ 0 A3 A A A0/NTX /6 3/7 4/8 5/9 6/30 7/3 B0/3 B/33 B/34 B3/35 B4/36 B5/37 B6/38 B7/39 M0 M M X / D X / D 0 V R T V D D B N D W R T N M 7 M 6 M 5 M 4 M 3 Ver.5 9/0 6/3/07

10 T06 Revisions Version age Description Date.3 7,8 Modify Rosc 80k ohm to 6k ohm under 4Mhz condition 006/3/.4 Add U clock 50k ~ M Hz 006/6/3.5 8,9 Move package information to page8,9..006/8/8 The above information is the exclusive intellectual property of itronix Technology orp. and shall not be disclosed, distributed or reproduced without permission from itronix. itronix Technology orp. reserves the right to change this document without prior notice and makes no warranty for any errors which may appear in this document. itronix products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where products failure could result in injury, or loss of life, or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply. Ver.5 0/0 6/3/07