Power Electronic Transformer as a Solution for Voltage and Frequency Regulation in Isolated Electrical Networks

Transcription

1 Power Electronic Transformer as a Solution for Voltage and Frequency Regulation in Isolated Electrical Networks D. R. Pereira, MSc Student, IST, S. F. Pinto, Member, IEEE, and J. F. Silva, Member, IEEE Abstract This paper presents a new topology for the electronic power transformer, also known as Solid State Transformer (SST), for application in isolated grids, as an alternative to the transformers nowadays used in transformer stations. The proposed SST consists of Modular Matrix Converters (MMC) that produce the voltages to be applied to the high frequency transformers, guaranteeing nearly zero average value at the working frequency of these transformers, 2 khz, therefore avoiding their saturation. High Frequency Transformers (HFT) are used to reduce the volume and weight of the overall system. The HFT is then connected to a Four Arms Matrix Converter (FAMC), used to control the voltage and frequency at the output and the power factor at input of the SST, using a sliding mode control technique. To reduce harmonic contents in input currents and output voltages it is used second order filters. The system is designed in MATLAB/SIMULINK software and it is sized to operate with voltages 0 kv / 400 V and 630 kva rated power. Then, the proposed SST is tested under several possible working conditions. Index Terms High Frequency Transformer, Matrix Converter, Power Factor Regulation, Sliding Mode Control, Solid State Transformer, Voltage Regulation. The SST is a relatively recent technology and presents the main features of classical transformers galvanic isolation and voltage transformation. It is composed by high frequency transformers, which allows a substantial reduction in the total volume and weight of the overall equipment. The use of power electronic converters is required, because of the high frequency transformers. A. Classic Transformers II. TRANSFORMER: STATE OF ART In an electrical energy grid, the transformers are the heaviest and the most expensive equipment. According to [2], the main advantages of the classic transformers are: high efficiency, robustness, reliability and relatively inexpensive. However, they present some disadvantages as increased voltage drop for higher loads, the sensibility to the output currents harmonics, the voltage regulation at no load and performed by steps, the losses without load and the oil presence, which can be harmful to the environment, with the possibility of fire [2] [3]. T I. INTRODUCTION HE transformers are one of the most important assets in electrical energy systems because they enable the voltage change of a network to a most appropriate level, allowing energy transmission at different voltage levels, and over long distances. Voltage regulation in the Low Voltage (LV) grid is usually performed at no load, through tap changers. This regulation is made by steps and doesn t allow a continuous control of the voltage in real time. In the last years, there has been a significant increase of decentralized energy production, in particular, in the LV grid, through photovoltaic panels, wind turbines, biomass systems, microturbines, etc. This new reality has introduced new challenges to the Distribution System Operators (DSOs). In particular, overvoltages in the LV grid produced by the microgenerators, have become a major problem. Therefore, issues as overvoltages caused by microgeneration or voltage sags caused by short-circuits in the grid may arise. The output voltage of the transformer can be disturbed by sags and swells in the MV grid. In these cases, the SST can present advantages, because it allows a continuous control of the output voltage in real time, allowing a stable voltage amplitude, even with sags or swells in the input. B. Solid State Transformer (SST) The SST can minimize or eliminate many of the classic transformers disadvantages. However, they usually present lower efficiencies, higher costs and their reliability has not yet been tested, considering that they are a relatively recent technology [2]. In comparison to the classic transformers, the mains advantages of SST are [2]: lower volume and weight, protection of the load from disturbances at the transformer input (digs, overvoltages, frequency variation and harmonics), unity power factor at the input, control of the output voltage, input currents with lower harmonic contents, possibility of integrating DC energy storage and protection of the MV grid from disturbances at the output of the transformer. The basic structure of SST is presented in fig., where two power electronics converters are used, one in the SST input and another one in the SST output, and a high frequency transformer in the middle. Also, these systems can have DC storage links in the primary, secondary or both sides of the transformer.

2 2 neutral conductor and features of current source. The switches are assumed to be ideal.. Figure SST basic structure []. The core of HFT can integrate ferrite alloys, amorphous metals or nanocrystalline alloys, being the nanocrystalline alloys those which have a better compromise between losses and the saturation of the magnetic flux density. However, they present higher costs that, consequently, will rise the cost of the SST. The SST can be an alternative to the traditional transformers in any electrical system but, due to their functionalities, its implementation may be particularly interesting for certain applications [2] [4], namely: electrical traction systems, offshore energy production (for example, offshore wind turbines) and smart grids. In the electrical grid, SST can be used for interconnection between electrical power sources and the distribution/transport grid, in substations or transformer stations. III. MATRIX CONVERTER A. Single-phase matrix converter The single phase matrix converter is composed by four fully controllable bidirectional switches (fig. 2) which allow the interconnection between two single phase systems. In this converter, some topological constraints should be considered, which impose restrictions in the switching states of the semiconductors. It isn t possible to short-circuit the input phases of the converter (voltage source features) and it is not allowed to leave the converter output phases open (current source features). Figure 3 - Four Arms Matrix Converter. The state of each switch can be defined as in () and, therefore, it is possible to establish a switching matrix S int, according to (2). S S 2 S 3 S S int = [ 2 S 22 S 23 ] S 3 S 32 S 33 S 4 S 42 S 43 In order to fulfill the topological restrictions of this converter, the instantaneous sum of each row of S int should be always one, which leads to 8 possible switching combinations. Using the matrix S int, we can relate the output voltages with the input voltages and the input currents with the output currents (3). V A V B VC V a I a [ ] = S int [ V b ] and [ I b ] = S int V V c Ic N I A T I [ B (2) ] (3) IC I N ) Control of output currents Figure 2 Single Phase Matrix Converter. The switches are defined by the variable S kj (), with k and j the indexes which represent the switches in fig. 2. S kj = {, if switch is OFF 0, if switch is ON B. Four Arms Matrix Converter (FAMC) The FAMC is composed by twelve fully controllable bidirectional switches (fig. 3), that allow the interconnection between a three-phase system without neutral conductor and with features of voltage source and a three-phase system with () To control the matrix converter output currents it is used the sliding mode controller [5] [6] [7], requiring the representation of the possible switching states in the αβ0 coordinates, using (5), where C T is the transpose of Concordia transformation matrix, defined in (4). C = [ ] (4) V α V AN [ V β ] = C T [ V BN ] (5) V 0 V CN

3 3 In this control method, the output currents are compared with their reference values, according to (6). e α = I αref I α { e β = I βref I β e 0 = I 0ref I 0 The current errors (6) are quantified, through three level (-, 0, ) hysteresis comparators and the input voltages are divided into twelve distinct zones, whose limits correspond to the intersections between MV line-to-line voltages and their symmetrical. Considering the errors from the comparators and the localization zone of the input voltages, it is possible to choose the switching states (called switching vectors) that guarantee the tracking of the converter output currents. There are three possible situations for the α component error: If e α > 0, then I αref > I α, so I α should be increased, (6) that corresponds to apply a vector with V α > 0; If e α < 0 then I αref < I α, so I α should be decreased, corresponding to a vector with V α < 0; If e α = 0 then I αref = I α. In this situation it should be chosen a vector with V α = 0. The same criterion is applied to the β and 0 components of the current errors. After analyzing the 8 possible switching combinations, it is concluded that there are always two vectors which are available for the control of the output currents, providing some degree of freedom to control the power factor at the converter input. vector to increase I q ; If e iq < 0 then I qref < I q, so it should be chosen a vector to decrease I q. Based on this referenced situations and taking into account the two vectors available from the output currents control, it is possible to choose the vector that better controls the power factor at the converter input. In order to do that, the input currents must be estimated through the output currents using a predictive method. When e α = 0, e β = 0 and e 0 = 0 in the output currents controller, the non-application of the ideal vector will not affect significantly the shape of the output currents waveform. Thus, it is possible in this, and only in this case, to choose the best vector for the input power factor control from the 8 possible switching states. IV. SST PROPOSED SOLUTION The proposed topology for the SST is presented in fig. 4, containing the Modular Matrix Converters (MMC), the high frequency transformers (HFT) and the Four Arms Matrix Converter (FAMC). 2) Power Factor Control at the input The input currents control is made in dq coordinates, using the Blondel-Park transformation, as in (7), where θ dq is the transformation angle. At these coordinates, the reactive power is given by (8), assuming a balanced and symmetrical system of voltages at the converter input. X d [ X q ] = D T [ X 0 X α X β cos (θ dq ) sin (θ dq ) 0 ] with D = [ sin (θ dq ) cos (θ dq ) 0] X (7) Q indq = V d I q (8) To obtain PF =, the reactive power, Q indq, must be zero, which implicates I qref = 0. The control is made by calculating the difference between the reference current I qref and the measured current I q at the CMQB input, according to (9). e iq = I qref I q (9) In this case, one hysteresis comparator is used to obtain two levels for the error e iq (-,+). Two situations can be referenced: If e iq > 0 then I qref > I q, so it should be chosen a Figure 4 Proposed solution for the SST. A. Modular Matrix Converters (MMC) The MMC are used to apply at the transformers input voltages with zero average value at the working frequency of the transformers, 2 khz, to avoid their saturation. Due to limitations that still exist in nowadays semiconductor technologies, each CMM consists of several single phase matrix converters connected in series. Therefore, the voltages in the semiconductors won't destroy the electronic devices. This series association also allows the increase of SST modularity. The control of the CMM is made in αβ0 coordinates and it is based on the expression for the calculation of the voltage average value during one switching period, T s = /f s, according to (0). V médio = f s v(t)dt (0) T s The blocks diagram of the control system is presented in fig. 5, where V TAF is related to the CCM output voltages and α,β

4 4 V abc α,β is related to the CMM input voltages. C. Input Filter The SST is connected to the MV grid using a LC filter, with damping resistance. The equivalent single phase scheme is shown in fig. 7. Figure 5 Blocks Diagram of the CMM control system. The blocks Alpha Decision and Beta Decision decide what should be the relation between the inputs and the outputs voltages of the CMM (+ or -) in order to keep the integrators output, for each of the components α and β, within a specified variation band. This variation is obtained in order to guarantee that the switching frequency is in accordance with the operating frequency of HFT. The block final decision is responsible to take the final decision about the voltages ratio, based on the requests from the individual blocks mentioned above. If these blocks present, at their outputs, symmetrical decisions ( and -), then the final decision block chooses to keep the previous switching states, corresponding to the decision of one of the individual blocks, in order to reduce the switching losses Using this method it is possible to guarantee that the input voltages of the HFT present the waveform shown in fig. 6. In this figure, it can be seen that the average switching frequency is 2 khz. Figure 7 Single phase equivalent scheme for the input filter (star connection). The criterion for the dimensioning of the filter capacitors is to minimize the phase shift between the current I a and the current I a. Therefore, the capacitance of the capacitors is given by (), where I min is the minimum working current of the SST and φ in máx is the maximum allowed phase shift between I a and I a [8]. C máx = 3I min tg(φ in máx ) ω red V MT () The inductance is obtained from (2), where ω c is the in cutoff angular frequency of the filter. L in = (2) 2 C in ω cin The damping resistance is obtained from (3) [8], where ζ in is the filter damping coefficient. r p = Z f in 2ζ in com Z fin = L in C in (3) Figure 6 - Voltages at the input (red) and output (blue) of one of the CMM. B. Four Arms Matrix Converters (FAMC) The sliding mode control, discussed in section III.B for an isolated matrix converter, can be used here, with some changes. The voltages are measured at the entrance of SST and not at the FAMC input. In the topology presented in fig. 4, the phase shift between the SST input voltages and the FAMC input voltages can be considered only dependent on the MMC controller. Thus, for the calculation of the localization zone for the input voltages of the FAMC, this fact is taken into account as may be necessary to compensate a phase shift of 80 degrees. On the other hand, to estimate the input current I q of the SST based on the output currents, it is necessary to take into account the switching state in the CMM and the transformation ratio of the HFT. For delta connection, the capacitance required for the filter capacitors is three times lower than the capacitance required for star connection. The filter parameters are shown in tab.. Table Input filter parameters. L in (mh) 20,9 C in (μf),62 r p (Ω) 09,25

5 5 D. Output filter The output filter is star connected, according to fig. 8. Comparing the denominator of (7) with the characteristic polynomial given by (8), it is possible to obtain the parameters of the PI controller using (9) [9]. D(s) = s ω n s ω n 2 + ω n 3 (8) K p = 2.25C outα i.75 2 T d α v and K i = C outα i.75 3 T d 2 α v (9) Figure 8 SST Output filter. The output inductance is given by (4), wherein f com is the average switching frequency, Δi is the current ripple and V inmatrix is the line-to-neutral voltage at the FAMC input []. A. Low voltage (LV) grid V. OBTAINED RESULTS The implemented LV grid, to test the proposed SST, is shown in fig. 0. L out = 2V in matrix 6f com Δi (4) The capacitance is obtained considering an adequate cutoff angular frequency, ω c, according to (5). out C out = 2 L out (5) ω cout The output filter parameters are presented in tab. 2. Table 2 Output filter parameters. L out (μh) C out (μf) E. Output voltage controller The blocks diagram of the system used to size the output voltage controller is shown in fig. 9, where α v and α i are the gains of the current and voltage sensors, respectively. The controller is one of the type PI (Proportional and Integral) and it is assumed that the FAMC is represented by a delay T d, corresponding to half of the average switching period, and a gain /α i, according to the transfer function shown in (6) [9]. G(s) = /α i + st d (6) Figure 0 - Implemented LV grid. The parameters of the LV grid represented in fig. 0 can be found in tab.3. It should be noted that the distribution lines (DL) are modeled by the π equivalent scheme, wherein the respectively values of capacitances, inductances and resistances were taken from [0]. Zone Table 3 - Parameters of the implemented LV grid. Consumption Power per Power factor per phase (kva) phase A B C A B C ,8 0,8 0, ,8 0,8 0, ,9 0,8 0, ,9 0,8 0,8 Zona Injected power (kva) per phase Power factor per phase A B C A B C Figure 9 - Blocks diagram of the system. The closed loop transfer function, relatively to the output voltage and to the reference voltage, is given, in the canonical form, by (7) [9]. V out αβ0 (s) V outαβ0ref (s) = α v (sk T d C out α p + K i ) i s 3 + s T 2 + K pα v s + K (7) iα v d T d C out α i T d C out α i DL Dist. [m] R line [Ω] Active conductor: 0,053 Passive conductor: 0,038 Active conductor: Passive conductor: 0,0692 C line [μf] L line [mh] 0,2 0,066 0,4 0,044 Fig. and fig. 2 show the proper behavior of the system in terms of output voltage control, even with unbalanced output currents, originating neutral current.

6 6 Figure - SST output voltages, obtained for the LV grid test. Figure 5 - SST input voltages. Figure 2 SST output currents, obtained for the LV grid test. In the medium voltage (MV) grid, the currents present some switching noise and harmonic distortion (fig. 3). However, these currents are nearly in phase with the respective line-toneutral voltages (fig. 4). Figure 6 SST output voltages. As can be seen in fig. 7, the power factor remains nearly unitary, even during the disturbance. Figure 3 SST input currents, obtained for the LV grid test. Figure 7 - Voltage and current in phase A at the SST input. 2) Voltage swell at MV grid The overvoltage in the MV grid is 30% of the nominal voltage, during of 3 cycles (fig. 8). Still, the output voltages of the SST (fig. 9) remains unaltered in amplitude during the perturbation, as it was intended. Figure 4 - Voltage and current in phase A at the SST input, obtained for the LV grid test. ) Voltage sag at MV grid A voltage sag was produced in MT grid with a depth of 30%, during 3 cycles (fig.5). However, this voltage sag does not produce any changes in the amplitude of the SST output voltages (fig. 6). Figure 8 - SST input voltages.

7 7 phase A, showing a relatively good follow-up of the reference current I qref. Figure 9 SST output voltages. Fig. 20 shows that despite the input currents decrease, the power factor remains nearly equal to one, all the time. Figure 23 Voltage and current in phase A at the SST input. 4) Load variation in the low voltage (LV) grid In this situation, the consumption in the zone is reduced to 50% over 3 cycles, and the obtained output currents are shown in fig. 24. The SST output voltages maintain the same amplitude, except for some disturbances at the instants when the load suddenly changes in the LV grid fig. 25. Figure 20 Voltage and current in phase A at the SST input. 3) Harmonics at MV grid In this case, the voltages in the MV grid present 6% of fifth harmonic, fig. 2. However, the SST output voltages, fig. 22, show no noticeable harmonic content. Figure 24- SST output currents. Figure 2 - SST input voltages. Figure 25 - SST output voltages. The reactive power absorbed by the SST remains nearly equal to zero, as it can be seen in fig. 26. Figure 22 - SST output voltages. By observing the fig. 23, the fundamental component of the current in phase A has nearly the same phase of the voltage in Figure 26 Voltage and current in phase A at the SST input.

8 8 5) Microgeneration variation In this situation, there is a decrease of 50% in microgeneration, which results an increase in the power supplied by the SST to the LV grid, as seen in fig. 27, while the SST output voltages keep a constant amplitude, except in the distortions occurred during the disturbance moments fig. 28. The increased power injected by the microgenerators results in the currents increase at the SST output, as it can be seen in fig. 30. Nevertheless, the output voltages amplitude remain constant fig. 3. Figure 30 SST output currents. Figure 27 - SST output currents. Figure 3 SST output voltages. Figure 28 - SST output voltages. The power factor at the SST input remains nearly equal to one, as it can be seen in fig. 29. Fig. 32 shows a reversal of the active power flow through the SST. Figure 29 Voltage and current in phase A at the SST input. 6) Bidirectional power flow In this case, an inductive load and microgeneration are connected to the SST output. The load parameters are presented in table 3 for the zone 2. The power injected by the microgenerators is set to gradually change between the values presented in tab. 4. Figure 32 Active power at the SST input. VI. CONCLUSIONS In this paper, the proposed SST presents robustness against various scenarios, namely: voltage sags, voltage swells and voltage harmonics, in the MV grid, and load/microgeneration variation, in the LV grid. Table 4 Power injected by the microgenerators. Injected Power per phase (kva) Start End A B C Total A B C Total Power Factor The output voltages controller showed a good behavior, with approximately zero tracking errors (e α, e β and e 0 ) and a very fast dynamic, as it is usual in the control method that was chosen. Even though the SST input currents present some harmonic

9 9 content, this issue is not very relevant due to the amplitudes of those currents. Moreover, the power factor remained always nearly unitary, even during disturbances, revealing, therefore, a good behavior of the power factor controller at the SST input. In order to improve the input currents, it is important to do further investigation in the filters design and the control methods, including refined choices for the space vectors. It also can be considered to use the SVM modulation process for the four arms matrix converter. REFERENCES [] A. Pimenta, Conversores de potência para a regulação da tensão da rede de distribuição BT com cargas desequilibradas, M.S. thesis, DEEC, Instituto Superior Técnico, Universidade Técnica de Lisboa, Lisboa, Apr [2] J. Kolar and G. Ortiz, Solid State Transformer Concepts in Traction and Smart Grid Applications, tutorial at the5 th International Power Electronics and Motion Control Conference, Novid Sad, Serbia, Sep [3] R. Hassan and G. Radman, Survey on Smart Grid, Proceedings of the power electronic application conference, IEEE Southeastcon, Concord, USA, Mar. 200, pp [4] A. Shri, A Solid State Transformer for Interconnection Between the Medium and the Low Voltage Grid, M.S. thesis, Delft University of Technology, Netherlands, Oct [5] J. Silva, V. Pires, S. Pinto and J. Barros, Advanced Control Methods for Power Electronics Systems, Mathematics and Computers in Simulation, Elsevier, vol. 3, no. 63, pp , Nov [6] S. Pinto and J. Silva, Sliding Mode Direct Control of Matrix Converters, IET Electric Power Applications, vol., no. 3, pp , May [7] S. Pinto and J. Silva, Robust Sliding Mode Control of Matrix Converter with Unity Power Factor, 9 th International Conference on Power Electronics and Motion Control, Košice, Slovak Republik, 2000, pp [8] S. Pinto and J. Silva, Input Filter Design of a Mains Connected Matrix Converter, 2 th International Conference on Harmonics and Quality Power, Cascais, Portugal, Oct [9] S. Pinto, J. Silva and P. Gambôa, Current Control of a Venturini Based Matrix Converter, IEEE International Symposium on Industrial Electronics, vol. 4, Montreal, Canada, Jul. 2006, pp [0] F. Silva, Impacto da microgeração na forma de onda da tensão da rede de distribuição, M.S. thesis, DEEC, Instituto Superior Técnico, Universidade Técnica de Lisboa, Lisboa, Jun [] D. Rathod, Solid State Transformer (SST) Review of Recent Developments, Advance in Electronic and Electric Engineering, Research India Publications, vo.4, no. 4, pp , 204.