Hardware Design of Filter Bank-Based Narrowband/Wideband Interference Canceler for Overlaid TDMA/CDMA Systems
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1 Hardware Desgn of Flter anased arrowband/deband Interference Canceler for Overlad TDMA/CDMA Systems Toyoau Ktano Kaunor Hayash Htosh Masutan and Shnsue Hara Graduate School of Engneerng Osaa Unversty YamadaOa SutaSh Osaa Japan. TEL/FAX: Abstract An adaptve nterference canceler whch we have proposed for coexstence problem of TDMA/CDMA systems can ontly cancel both wdeband nterference (CDMA sgnals n terms of TDMA sgnals) and narrowband nterference (TDMA sgnals n terms of CDMA sgnals). The canceler s mplemented wth a 63rdorder IIRbased multrate flter ban so t can dgtally process all the sgnals n baseband wth less computatonal cost and can effcently cope wth narrowband sgnals wth varous bandwdths (transmsson rates) mang full use of multresoluton analyss capablty of multrate flter ban. In ths paper we descrbe an experment system for the multrate flter banbased narrowband/wdeband nterference canceler and gve the detaled hardware desgn of the canceler wth fxedpont DSPs (dgtal sgnal processors). I. Introducton DSCDMA (drect sequence code dvson multple access) system has an attractve feature of capablty to share band wth narrowband communcaton systems wthout ntolerable degradaton of ether system s performance. ow CDMA overlay and narrowband nterference cancellaton are hot topcs of research. On the other hand n softwarebased wreless multmeda communcatons system dfferent access schemes can be employed n dfferent cells accordng to user s QoS (qualty of servce) and channel condton []. In ths case narrowband sgnals such as TDMA (tme dvson multple access) sgnals suffer from ntercell narrowband and wdeband nterference whereas wdeband CDMA sgnals suffer from ntercell narrowband nterference and ntercell and ntracell wdeband nterference. These stuatons are all modeled as a coexstence problem of TDMA/CDMA systems where narrowband sgnals and wdeband sgnals share the same band []. A ey ssue s how to separate both sgnals wth less dstorton and less mparment. e have proposed [3] an adaptve nterference canceler for the coexstence problem of TDMA/CDMA systems whch s mplemented wth a multrate flter ban (MRF) [4]. Ths canceler has the followng advantages: arrowband TDMA Sgnals f R deband DSCDMA Sgnals t can dgtally process all the sgnals n baseband t can effcently cope wth narrowband sgnals wth varous bandwdths (transmsson rates) mang full use of multresoluton analyss capablty of MRF. In addton a MRF desgned wth IIR (nfnte mpulse response) flters can ntroduce a low computaton cost as compared wth a FIR (fnte mpulse response) approach. e have carred out a hardware desgn of the multrate flter banbased narrowband/wdeband nterference canceler wth fxedpont DSPs and have developed an experment system for t. In ths paper we descrbe the experment system for the multrate flter banbased narrowband/wdeband nterference canceler and gve the detaled hardware desgn of the canceler. Fnally we gve the hardware expermental results. II. Frequency Sharng TDMA/CDMA Model e assume an upln channel where there are M wdeband DSCDMA sgnals and M narrowband TDMA sgnals. Fg. shows the power spectrum of the receved sgnal at a base staton. th the equvalent low pass expresson t s wrtten as M R ( f ) ( f ) ( f ) ( f ) () M where ( f ) ( f ) and ( f ) are the power spectra of the wdeband and narrowband sgnals and the addtve Gaussan nose respectvely. If the root yqust flter s employed as a baseband pulse shapng flter n narrowband and wdeband systems f Fg. Power Spectrum of Frequency Sharng TDMA/CDMA System
2 ( f ) and ( f ) are wrtten as ( f ) P S ( f ) ; f ; otherwse () Receved Sgnal st Stage H H nd Stage H H 3rd Stage H H 4th Stage H () H ( f ) P S ( f f ) ; otherwse ; f f where f s the carrer of the th narrowband sgnal and are the bandwdths of the wdeband and narrowband sgnals respectvely P and P are the receved power of th wdeband sgnal and the th narrowband sgnal respectvely. Furthermore S ( f ) s the normaled response of the root yqust flter gven by (3) Sgnal F F Analyss Flter an F F F F Synthess Flter an Fg. Multrate Flter an F F T ; f ( α ) T T ( ) πt f T sn S ( f ) α ; ( α ) T f ( α ) T ; otherwse (4) where means or T and α are the symbol duraton and rolloff factor respectvely. Fnally defnng R as the bandwdth determned by the frontend band pass flter of recever ( f ) s wrtten as ; f ( f ) R (5) ; otherwse where s the spectral densty of the AG. III. Flter anased arrowband/deband Interference Canceler A multrate flter ban can analye the nput sgnal wth dfferent resolutons at the same tme adaptvely changng the resoluton n any part of the band. Fg. shows the multrate flter ban. The twochannel multrate flter ban needs to satsfy the followng condtons: F H ) H ( ) (6) ( ) H ( ) (7) ( ) H ( ) (8) ( F where H ( ) and H ( ) are a flter par n the analyss flter ban and F ( ) and F ( ) are a flter par n the synthess flter ban respectvely. e have dscussed a FIR approach whch maes t possble to have the group delay perfectly flat but mpossble to have the magntude response flatter n the passband wth shorter flters. In other words flatter magntude response requres longer FIR flters so t results n larger processng delay. Here nstead we tae an IIR approach. In ths case the twochannel multrate flter ban satsfes the followng condtons moreover: H ( ) A( ) (9) A( ) A ( ) A ( ) () l A ( ) A ( ) () A p r (a) st Order Allpass Flter A ( ) Fg. 3 IIR Flter p ( ) () p As shown n Fg.3 the flter A () s a l stage cascade of allpass flters wth poles p ( ). For IIR flters t s very dffcult to obtan flat group delay property. So tang Moore s model reducton method [5] we desgn a 63rdorder IIR flter out of a 64thorder FIR flter. Table shows the poles of the obtaned IIR flter. ote that the orders of these flters are almost the same but the IIR flter has almost a half complexty n terms of the number of p Input Sgnal x(n) A ( ) A ( ) A ( ) (pole: p p p ) r l (b) lth Order Allpass Flter A Sgnal ( ) y(n) l
3 Input Sgnal Analyss Multrate Flter an arrowband Interference Canceler TDMA Sgnal (The nd Round) TDMA Sgnal Replca Generator Demodulaton (TDMA Sgnal) TDMA Sgnal Synthess Multrate Flter an CDMA Sgnal CDMA Sgnal Replca Generator deband Interference Canceler Demodulaton (CDMA Sgnal) (a)algorthm (The st Round) Input Sgnal deband Interference Canceler arrowband Interference Canceler CDMA Sgnal (The nd Round) (b)algorthm (The st Round) Demodulaton (TDMA Sgnal) Demodulaton (CDMA Sgnal) Fg. 4 loc Dagram of arrowband/deband Interference Canceler complex multplcaton. Fg.4 shows the bloc dagram of the multrate flter banbased narrowband/wdeband nterference canceler and the cancellaton procedure when the power of TDMA sgnal s larger than that of CDMA sgnal (The frst round):. the TDMA sgnals are temporarly demodulated wth the approprate analyss flter ban outputs. the TDMA sgnal replcas are generated wth the temporal demodulaton data 3. the TDMA sgnals are canceled at the approprate synthess flter ban nputs (narrowband nterference cancellaton) 4. the CDMA sgnals are demodulated wth the synthess flter output 5. the CDMA sgnal replcas are generated wth the demodulaton data 6. the CDMA sgnals are canceled wth the receved sgnal (wdeband nterference cancellaton) 7. the TDMA sgnals are demodulated wth the resultant sgnal. IV. Hardware Constructon and Specfcatons of the Experment System Fg.5 shows the constructon of the experment system and Fg.6 shows ts appearance. Ths system conssts of two parts. The frst part s a host termnal whch s a wor staton. The host termnal controls a DSP unt (dgtal sgnal processng unt) whch s explaned below and has functons generatng 6bt A/D converted sgnals that are transmtted to the DSP unt and measurng the ER (bt error rate). The second part s the DSP unt that conssts of one Interface board and three DSP boards (dgtal sgnal processng boards). Table shows the hardware specfcatons of the Interface board and the DSP board. The DSP unt s connected wth the host termnal usng an IEEE84 parallel port. The Interface board has memory that all s (central processng unts) on DSP unt such as DSP can access n common but not at the same tme. The DSP boards are dvded nto two types by roles. e call one master DSP board and another slave DSP board. The master and slave DSP boards are the same hardware desgn and we tell the master DSP board from the slave by changng smply ther desgn of CPLD (complex programmable logc devce) whch s a reconfgurable devce. The master DSP board whch s only one n the DSP boards controls a flow calculatng the adaptve canceler and gves a command to slave DSP boards that they start dgtal sgnal processng. The master DSP board also manages the common memory area so t allocates memory out of common memory area to each slave DSP board gvng a command. The slave DSP board
4 Host Termnal IEEE84 parallel 6bt parallel Master DSP board Slave DSP board Slave DSP board 3bt parallel DSP Unt Interface board Fg. 5 Constructon of Experment System calculates the followng dgtal sgnal processes analyss flter ban synthess flter ban TDMA sgnal demodulaton CDMA sgnal demodulaton TDMA sgnal replca generaton CDMA sgnal replca generaton. ote that these are calculated wth the 6bt fxedpont operatons. The demodulaton data of TDMA or CDMA sgnal are temporarly stored n common memory and they are returned to the host termnal fnally. (a) Experment System V. Expermental Results Fg.7 shows the ER performance of the proposed canceler obtaned from experment smulaton: the ER versus E b. Here we assume a stuaton as a channel model where one TDMA sgnal and one CDMA sgnal are sharng the same band and the followng assumptons are made: the CDMA sgnal s based on QPSK/coherent detecton format ( α.5) whereas the TDMA sgnal based on DQPSK/dfferental detecton format ( α.5) the center of TDMA sgnal s located at that of bandpass flters constructed by the sxstage multrate flter ban the bandwdth rato of TDMA to CDMA sgnals s /64 the power rato of TDMA to CDMA sgnals s [d] so the TDMA sgnal (narrowband nterference) should be frst canceled Fg.7 shows that the obtaned ERs are excellent and they are closed to the lower bounds n TDMA and CDMA cases so the developed canceler can do a good cancellaton of narrowband and wdeband nterference. (b) DSP board Fg. 6 Appearance of Experment System Table Hardware Specfcatons of DSP Unt Interface board I/O Connector DSP board I/O Connector HITACHI SH73 MH M (local use) M (common use) 3bt parallel 8bt parallel (IEEE84) DI96pn DSU5pn TI TMS3C6 MH M 3bt parallel 6bt parallel DI96pn
5 ER (CDMA).. 3. w/ Canceler w/o Canceler Sngle User Detecton w/o Interference CDMA Sgnal TDMA Sgnal PTDMA/PCDMA d Eb/o [d] ER (TDMA).. 3. w/ Cnaceler w/o Canceler Lower ound (DQPSK Theory) Eb/o [d] CDMA Sgnal TDMA Sgnal PTDMA/PCDMA d Fg. 7 ER versus Eb/o VI. Concluson Table Poles of 63rdorder IIR flter e have developed the experment system for multrate flter banbased narrowband/wdeband nterference canceler. In ths paper we have descrbed detaled hardware desgn and have shown the developed canceler can ncely separate both TDMA and CDMA sgnals. References [] S. Hara D. Ktaawa and H. Yomo Impact of Access Scheme Selectablty on Traffc Performance n Softwareased reless Multmeda Communcatons System Proc. of VTC 99 Fall Sept [] T. Matsuda S. Hara and. Mornaga Feasblty Study on DSCDMA/TDMA Frequency Sharng System Proc. of IEEE ICC 97 pp June 997. [3] S. Hara H. Masutan and T. Matsuda Flter anased Adaptve Interference Canceler for CoExstence Problem of TDMA/CDMA systems Proc. of VTC 99 Fall pp Sept [4] P. P. Vadyanathan Multrate Systems and Flter ans. Englewood Clff J: PrentceHall 993. [5]. C. Moore Prncpal Component Analyss n Lnear System: Controllablty Observablty and Model Reducton IEEE Trans. on Automatc Control vol.ac 6 o. pp.73 Feb. 98. Ths research was a part of the Publc Partcpaton Program for Frequency Resources Development by the Mnstry of Posts and Telecommuncatons of Japan p 7.536e e 7.536e e e 3.977e e 3.977e e e e e.6587e e.6587e e.3576e e.3576e e e.966e e.966e e e e e e e e e p e.47383e e.47383e e e e e e e e e e e e e.5553e e.5553e e 6.86e.9497e 6.86e.9497e 5.59e e 5.59e e e
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