Integration and Performance of Architectures for UWB Radio Transceiver

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1 N o d ordre : D09-04 THESE présentée devant l INSTITUT NATIONAL DES SCIENCES APPLIQUÉES DE RENNES pour obtenir le grade de Docteur Mention Electronique par Mohamad MROUÉ Integration and Performance of Architectures for UWB Radio Transceiver Intégration et Performance d Architectures de Transmetteur Radio ULB Soutenue le 6 février 2009 devant la commission d examen Composition du jury Rapporteurs Emil NOVAKOV Professeur à l INP, Grenoble Alain SIBILLE Professeur à l ENSTA, Paris Examinateurs Ghaïs EL ZEIN Jacques PALICOT Sylvain HAESE Stéphane MALLEGOL Stéphane PAQUELET Professeur à l INSA, Rennes Professeur à Supélec, Rennes Maître de Conférences à l INSA, Rennes Ingénieur-Chercheur chez Thalès, Brest Ingénieur-Chercheur chez Renesas, Rennes Institut d Electronique et de Télécommunications de Rennes Mitsubishi Electric R&D Centre Europe

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3 Acknowledgments It is a pleasure to thank many people for their support and encouragement, and for helping to make my experience both enriching and rewarding. I would like to express my sincere gratitude to my academic advisor, Dr. Sylvain Haese, whose expertise, understanding, and patience, added considerably to my graduate experience. I would like to thank Eng. Stéphane Paquelet for many ideas and good advice during the preparation of this thesis. His breadth of knowledge and perspectiveness have instilled in me great interests in wireless communications. Also, i would like to express my deep gratitude to him for taking time out from his busy schedule to serve as my external advisor. I wish to express my sincere thank to Prof. Ghaïs El Zein for his support, motivation and encouragement during the past three years. I wish to thank Dr. Stéphane Mallégol for his technical support, many good suggestions and helpful discussions. I wish to thank Prof. Jacques Palicot for honoring me by serving as chairman of my oral committee. I am grateful to Prof. Emil Novakov and Prof. Alain Sibille for their careful and detailed review of my work and for their constructive comments. The research work presented in this thesis was done in a collaboration between the company Mitsubishi Electric R&D Centre Europe and the Institute of Electronics and Telecommunications at Rennes (IETR). This work was generously financed by the ANRT French foundation and the company Mitsubishi Electric R&D Centre Europe. I wish to thank the administration of Mitsubishi Electric for their continuous financial support of this thesis work. I am grateful to my colleagues in the old UWB team at Mitsubishi Electric for their support. It was a great pleasure to work with all of them. My thanks also go to my academic colleagues at IETR. I am grateful to all my friends for being the surrogate family during the many years i stayed in Rennes and for their continued moral support there after. Finally, i owe my greatest debt to my family my parents, my brother Abdul- Hussein, my sister Fatima, my brother-in-law Ayman and my lovely little nephew Mohamad. I am most grateful for their love, understanding, endless patience, encouragement and support throughout my life. Mohamad Mroué February 28, 2009 i

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5 Abstract Ultra Wide Band (UWB) technology offers a promising solution to the spectrum drought by allowing new services to coexist with current radio systems with minimal or no interference. In February 2002, the FCC approved the First Report and Order (R&O) for commercial use of UWB technology under strict power emission limits for various devices. UWB communication is fundamentally different from all other communication techniques because it employs extremely narrow RF pulses to communicate between transmitters and receivers. This thesis concerns with the study of the performance and the implementation of a UWB transceiver based on Impulse Radio (IR) in a multiband configuration. The adopted non-coherent receiver is based on energy detection with an On-Off Keying modulation. The demodulation is based on a non-trivial energetic threshold comparison. This Ph.D. thesis is decomposed into three parts. In the first part, functional tests in real environment were realized, and a comparison between the use of omnidirectional and directional antennas in LOS and NLOS configurations is reported. These studies and the measurement results will permit to evaluate the signal level at the different stages of the receiver and its noise performance. The second part presents the study of the performance of the energy-based receiver with a UWB channel model. The statistical distribution of the transmitted signal and its energy is studied when taking into account the essential effects of the channel. A new statistical model of the transmitted signal is proposed based on these studies. Finally, the channel capacity is evaluated and a link budget study with a data rate estimation of the communicating system is provided as a function of the received SNR and the range between the transmitting and receiving antennas. The third part concerns with the study of a suitable on-chip implementation of a pulse energy detector for a multi-band OOK UWB receiver. The pulse energy detector must conform with the requirements of UWB high data rates applications in terms of low cost, low power consumption and reduced size chips. The detector must be able to operate in the GHz UWB band. Possible imperfections and mismatches effects of the different stages constituting the pulse detector are identified and studied in order to evaluate the architecture performance. Theoretical studies and CADENCE simulation results in AMS SiGe 0.35 µm BiCMOS technology are presented to validate this low complexity approach. Keywords - Analog energy detector, CMOS technology, High data rate, Impulse radio, Multi-band, Non-coherent receivers, Ultra Wide Band (UWB). iii

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7 Résumé Les systèmes de transmission à très large bande (ULB) ont récemment attiré l attention de la communauté scientifique et des industriels. En février 2002, la Commission Fédérale de Communication (FCC) aux Etats-Unis a décidé d autoriser l utilisation sans licence de la bande de fréquence allant de 3.1 jusqu à 10.6 GHz avec une puissance maximale de 41.3 dbm/m Hz. Le principe de la technologie Ultra Large Bande (ULB) consiste à transmettre sans porteuse des impulsions très courtes selon une récurrence prédéfinie. Ces impulsions possèdent une densité spectrale de puissance très faible étalée sur une large bande de fréquence. Cette thèse s intéresse à l étude des performances et à l implémentation d un transmetteur ULB basé sur de la radio impulsionnelle en configuration multibandes. L approche adoptée est en rupture avec l état de l art et tire profit des caractéristiques du canal ULB. Cette solution repose sur un récepteur non-cohérent basé sur la détection d énergie du signal reçu avec une modulation OOK associée à une démodulation par seuillage. Cela permet d alléger les contraintes sur le matériel en relaxant celles de la synchronisation et de l estimation du canal. Cette thèse peut être divisée en trois parties. La première partie concerne la réalisation des tests fonctionnels du système ULB adopté en environnement réel. Cela permet d établir un bilan de liaison réel et d évaluer le niveau du signal à chaque étage du transmetteur radio ULB. Dans la deuxième partie, nous étudions les performances du système ULB au sens du traitement de signal en évaluant l effet du canal multitrajet ULB sur la statistique de l énergie du signal reçu. Ensuite, la capacité du canal est calculée pour un tel système à base de détection d énergie avec une modulation OOK et un bilan de liaison théorique est déduit. La troisième partie concerne l étude d implémentation d un détecteur d énergie analogique en technologie CMOS opérant dans la bande de fréquence GHz en tenant compte des spécificités des applications très haut débit en termes de faible consommations d énergie, de faible coût de fabrication et de taille réduite de puce. Les effets d imperfections et ceux de la variation des paramètres technologiques des transistors ont été pris en compte dans l étude de performance du circuit. Le comportement de ce détecteur d énergie a été simulé sous CADENCE avec une technologie AMS SiGe 0.35 µm BiCMOS. Mots clefs - Détecteur d énergie analogique, Haut débit, Multi-bandes, Radio impulsionnelle, Récepteurs non-cohérents, Technologie CMOS, Ultra Large Bande (ULB). v

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9 Publications International Conferences Mohamad Mroué, Stéphane Paquelet and Stéphane Mallégol, Performance of a Low-Power Multi-Band IR-UWB Transceiver based on Energy Detection, IEEE Proceedings of the International Conference on Consumer Electronics, January 2010, Las Vegas, NV, USA. Mohamad Mroué, Stéphane Mallégol, Sylvain Haese, Ghaïs El-Zein, Alexis Bisiaux and Stéphane Paquelet, A Multi-Band IR-UWB HDR Transceiver: Architecture and Indoor Channel Measurements, IEEE Proceedings of the International Conference on Signal Processing and Communication Systems, September 2009, Omaha, NE, USA. Mohamad Mroué, Sylvain Haese, Stéphane Mallégol, Stéphane Paquelet and Ghaïs El-Zein, Performance of a Simple Architecture of an Analog CMOS Detector for MB-UWB Receiver, IEEE Proceedings of the International Conference on Ultra-Wideband, September 2009, Vancouver, BC, Canada. Mohamad Mroué, Sylvain Haese, Stéphane Paquelet, Stéphane Mallégol and Ghaïs El-Zein, An Implementation Study of an Analog CMOS Detector for IR- UWB Non-Coherent Receiver, IEEE Proceedings of the International Workshop on Radio-Frequency Integration Technology, December 2007, Singapore. Mohamad Mroué, Sylvain Haese, An Analog CMOS Pulse Energy Detector for IR-UWB Non-Coherent High Data Rates Receiver, IEEE Proceedings of the International Conference on Ultra-Wideband, September 2006, Waltham, MA, USA. Oral Communications Mohamad Mroué, Integration and Performance of Architectures for UWB Radio Transceiver, Séminaire SCEE - Supélec, January 2009, Rennes, France. vii

10 viii Publications Mohamad Mroué, An Analog CMOS Pulse Energy Detector for IR-UWB Non- Coherent Receiver, Journée des Doctorants de l IETR, June 2007, Rennes, France. Mohamad Mroué, An Ultra-Wideband Transceiver for High Data Rates Applications, Doctoriales de Bretagne, November 2007, Vannes, France. Mohamad Mroué, IR-UWB Non-Coherent High Data Rate Receiver: An Implementation Study of an Analog CMOS Pulse Energy Detector, Technical presentation - Mitsubishi Electric ITCE, November 2006, Rennes, France.

11 Contents Acknowledgments Abstract Résumé Publications Contents Résumé étendu en Français List of Figures List of Tables Abbreviations i iii v vii ix xiii xxi xxvii xxix General Introduction 1 1 State-of-the-Art UWB and Adopted Modulation Scheme Introduction UWB definition and applications UWB regulation constraint Problem statement FCC regulation in USA European regulation Regulation in Asia Modulation schemes for UWB communication systems Impulse Radio modulation techniques Pulse Amplitude Modulation Pulse Position Modulation Transmitted-Reference modulation PPM with Time Hopping Modulation schemes proposed for standardization ix

12 x contents Direct-Sequence UWB Multi-Band OFDM Adopted UWB system Problem statement Modulation principle: asynchronous approach System analysis System performance Conclusion MB-OOK Transceiver Architecture and Link Budget Realization Introduction FCC power limitation and theoretical link budget study Model of the transmitted pulse Spectral density of the modulated signal Power constraint at the emission Average power constraint Peak power constraint Maximum Gaussian pulse amplitude at the emission Maximum pulse amplitude at the reception Signal at the emission Signal at the reception MB-OOK transceiver architecture Pulse generator Filter banks for (de)multiplexing Descriptions of the fabricated quadriplexer prototype Measurement results Passive balun Amplification stages UWB antennas Link budget realization for IR-UWB MB-OOK transceiver Configurations description Measurement results Conclusion and prospects Performance of the Adopted Energy-Based UWB System Introduction Statistical model for UWB channel Path loss model IEEE a multipath model for HDR applications Channel effects evaluation Statistical characterization of the received signal Gaussian assumption verification Stationarity assumption verification Study of the channel effects on the signal s statistic.. 65

13 contents xi Proposed statistical model for the received signal Statistical characterization of the energy of the received signal Evaluation of the central Chi-square distribution s parameters Comparison between the theoretical and simulation results Performance of the proposed IR-UWB system Channel capacity evaluation Numerical applications Conclusion Integrated Circuits Technologies Introduction GaAs-based technology Silicon-based technologies Bipolar technology Bipolar Junction Transistor characteristics Heterojunction Bipolar Transistor CMOS technology The MOS transistor Passive components Basic MOS semiconductor fabrication processes Silicon on Insulator (SOI) substrate technology SiGe HBT BiCMOS technology Comparison between MMIC technologies AMS 0.35 µm SiGe BiCMOS technology Conclusion Implementation Study of an Analog CMOS Pulse Energy Detector Introduction Squaring stage State-of-the-art on detectors Diode detectors Squarer circuits in MOS technology Adopted squarer circuit Simulation results Integrator Circuit description Pulse detector architecture and simulation results Sample and hold circuit MOS switch Charge injection effect and evaluation Charge injection effect cancelation in S/H circuits Open-loop S/H with Miller feedback

14 xii contents Closed-loop S/H circuit Adopted S/H circuit Circuit description CMOS pulse detector architecture and simulation results Detection with one S/H and integration stages Extension into two S/H and integration parallel stages Circuit performance Detector noise Noise in MOSFETs Noise performance of the pulse energy detector Imperfection effect study Analytical study Simulation results Mismatch effect study Mismatch effect on the squarer circuit Mismatch effect on the current amplifier Conclusion General Conclusion and Prospects 149 Appendices 153 A Theoretical study of the performances of the adopted energy-based system 155 A.1 Covariance function of a signal model composed of one cluster A.2 Covariance function of the proposed transmitted signal A.3 Variance of the energy of the proposed transmitted signal A.4 Channel capacity evaluation B Imperfection and mismatch effects modeling of the proposed pulse energy detector 167 B.1 Modeling of the squarer circuit with ideal conditions B.2 Equivalent circuit of the squarer circuit with real conditions B.3 Modeling of the mismatch effect on the squarer circuit B.4 Modeling of the effect of the process parameters variations on the current amplifier circuit Bibliography 179

15 Résumé étendu en Français Introduction Le principe de la technologie Ultra Large Bande (ULB) consiste à transmettre sans porteuse des impulsions très courtes selon une récurrence prédéfinie. Ces impulsions occupent un spectre très large, typiquement de l ordre de 500 MHz à plusieurs GHz, couvrant des bandes plus réduites utilisées par d autres systèmes. Les systèmes de transmission à très large bande (ULB) ont récemment attiré l attention de la communauté scientifique et des industriels. Leur robustesse face aux évanouissements et leur supériorité lors de la pénétration d obstacles permettent des communications fiables dans des environnements difficiles. La technologie ULB a été utilisée pour la première fois par Guglielmo Marconi au début du vingtième siècle pour transmettre des séquences codées en Morse. Malgré cela, l intérêt du système ULB et la gestion simultanée de plusieurs utilisateurs n ont pas été considérés. Les expérimentations sur les systèmes radioélectriques de types impulsionnels débutent vers 1960 dans le domaine du radar. Ces systèmes constituent les premières techniques à base de signaux ULB. En février 2002, la Commission Fédérale de Communication (FCC) aux Etats-Unis a décidé d autoriser l utilisation sans licence de la bande de fréquences allant de 3.1 jusqu à 10.6 GHz avec une puissance maximale de dbm/mhz soit 0.5 mw au total. Ces contraintes sont imposées afin de limiter les interférences de cette nouvelle technologie sur les systèmes existants. La technologie ULB désigne désormais tout système occupant une bande de fréquences supérieure à 500 MHz dont la largeur de bande fractionnelle B/f c est supérieure à 20 %, f c étant la fréquence centrale du système. Les signaux ULB possèdent une densité spectrale de puissance très faible étalée sur une large bande de fréquence. Selon les principes énoncés par C. Shannon, les systèmes ULB offrent une capacité globale très importante qui peut être mise à profit pour des applications de communications. La technologie ULB se distingue des systèmes à bande étroite traditionnels par différents atouts majeurs : ˆ La largeur de bande occupée instantanément par le signal ULB conduit à une résolution temporelle très fine permettant d envisager des applications de localisation et de communication bas ou hauts débits au sein d un même appareil. xiii

16 xiv Résumé étendu en Français ˆ La très courte durée des impulsions émises assure une transmission robuste dans un canal multi-trajets dense. ˆ La faible densité spectrale du signal permet au système ULB de coexister avec les applications existantes. ˆ La technique ULB se caractérise également par la possibilité d une implémentation simple à faible consommation et faible coût. Contexte et objectifs de la thèse Le groupe Mitsubishi Electric est un des leaders mondiaux dans les domaines de la recherche, l ingénierie, la conception et la commercialisation des équipements électroniques et électriques utilisés en communications, industrie technologique, énergies et transport. Le laboratoire Européen Mitsubishi Electric R&D Centre Europe a été créé à Rennes en novembre Ce laboratoire s est entièrement consacré à la conception d outils de communication du futur dans le domaine des télécoms sans fil et du réseau d accès. En 2002, les activités de recherche sur le système ULB ont commencé avec les études théoriques réalisées par S. Paquelet. Les principes de fonctionnement d un transmetteur ULB basé sur la radio impulsionnelle pour des applications très haut débit ont été définis. Les solutions traditionnelles reposent sur des systèmes synchrones dans lesquels l émetteur et le récepteur sont parfaitement synchronisés avec une démodulation cohérente en réception basée sur la corrélation du signal avec un signal généré localement. Cette approche nécessite une connaissance très précise du canal de propagation. En tenant compte des caractéristiques des signaux et du canal ULB, la mise en oeuvre d un tel système présente une difficulté majeure. L approche adoptée est en rupture avec l état de l art et tire profit des caractéristiques du canal ULB. Les contraintes de synchronisation et de l estimation du canal sont relaxées en évitant l identification précise de l instant d arrivée des trajets. Cela simplifie l architecture du récepteur. Cette approche asynchrone mène à un récepteur non-cohérent basé sur la détection d énergie du signal reçu avec une modulation OOK associée à une démodulation par seuillage. Cela permet d être insensible à la phase du signal ULB et de tirer le meilleur profit de l énergie disponible. Pour éviter les interférences inter-symboles, la période de répétition des impulsions est choisie supérieure à la durée d étalement du canal. Pour compenser l étalement du canal et augmenter la capacité de la transmission, le système est dupliqué sur plusieurs sous-bandes adjacentes. Dans le but de valider les études théoriques et pour permettre une implémentation d un tel système dans le futur, une architecture d un multiplexeur/démultiplexeur d énergie faibles pertes avec des bandes de fréquences adjacentes a été étudiée par S.

17 Résumé étendu en Français xv Mallégol. Ces études ont été suivies par la conception et la réalisation des maquettes électroniques du transmetteur ULB à Mitsubishi Electric R&D Centre Europe. Cela a pour but de réaliser des démonstrations et de valider les principes de fonctionnement du système ULB proposé. Dans ce contexte, le travail de la thèse vise à : ˆ Réaliser des tests fonctionnels du système en environnement réel permettant d établir un bilan de liaison réel et d évaluer le niveau du signal à chaque étage du transmetteur radio ULB étudié. ˆ Etudier les performances du système ULB au sens du traitement du signal en évaluant l effet du canal multitrajet ULB sur la statistique de l énergie en réception et calculer la capacité du canal avec une détection d énergie. ˆ Etudier un détecteur d énergie analogique en technologie CMOS opérant dans la bande de fréquences GHz en tenant compte des spécificités des applications très haut-débit en terme de faible consommation d énergie, de faible coût de fabrication et de taille réduite de puce. Contenu de la thèse et contributions La thèse est divisée en cinq chapitres dont le contenu et les principales contributions sont détaillés ci-après. Dans le Chapitre 1, nous présentons la technologie ULB et ses applications potentielles pour les systèmes de communications. Ensuite, les aspects réglementaires de l ULB au niveau des Etats-Unis, de l Asie et de l Europe sont définis. De plus, les différentes techniques de transmissions ULB proposées pour les applications très hauts débits sont présentées. Plusieurs solutions ont été proposées dans le cadre de la procédure de standardisation pour les communications hauts débits ULB. Deux solutions principales étaient en compétition : DS-CDMA et MB-OFDM. La mise en oeuvre de tels systèmes sur un canal ULB multi-trajets réaliste présente des difficultés. L approche synchrone nécessite un traitement complexe au niveau du récepteur qui représente une grande part de l énergie consommée. Les performances de ces systèmes sont très sensibles aux erreurs d estimation. Pour cela, l approche asynchrone a été privilégiée par l étude préliminaire sur la synchronisation menée par S. Paquelet. Système ULB adopté La dernière partie du Chapitre 1 précise les principes de la solution adoptée. Le système ULB adopté est basé sur l émission de signaux de types impulsionnels. Cette approche asynchrone consiste à relaxer les contraintes sur la connaissance requise du canal. Ainsi, le récepteur non-cohérent adopté est basé sur la détection d énergie du

18 xvi Résumé étendu en Français signal reçu. Cela permet d être insensible à la phase du signal ULB. En favorisant une démodulation incohérente avec un récepteur fonctionnant comme un détecteur d énergie, l information est donc transmise par l amplitude du signal et non pas par sa phase. Pour cela, le meilleur choix sera la modulation OOK (On-Off Keying) associée à une démodulation par seuillage. Pour éviter l interférence inter-symboles, la période de répétition des impulsions est choisie supérieure à la durée d étalement du canal. Pour compenser l étalement du canal et augmenter la capacité de la transmission, le système est multiplexé sur plusieurs sous-bandes adjacentes. Architecture du transmetteur ULB L architecture du transmetteur ULB adopté est présentée dans le Chapitre 2. Le principe de fonctionnement du transmetteur MB-OOK est basé sur la génération d une impulsion permettant de couvrir toute la bande de fréquences ULB allant de 3.1 jusqu à 10.6 GHz. L architecture du transmetteur est composée d un générateur d impulsions suivi d un banc de filtres permettant de séparer simultanément la bande ULB en plusieurs sous-bandes adjacentes. Ensuite, une modulation OOK est appliquée sur chaque sous-bande. Finalement, les impulsions des sous-bandes adjacentes sont combinées, amplifiées et transmises à travers une antenne ULB. A la réception, le signal est capté par une antenne ULB avant de passer par un filtre passebande. Cela a pour but de réduire les effets d intermodulation lors de l amplification. Un état de l art sur les différentes parties du récepteur (antennes ULB, amplificateurs, banc de filtres, détecteurs d énergie, échantillonneurs bloqueurs) a aussi été réalisé. Bilan de liaison et tests fonctionnels du système ULB proposé Pour l étude du bilan de liaison du système de transmission et l étude des performances du détecteur d énergie présenté au dernier chapitre, il est nécessaire de déterminer le niveau du signal à l émission et à la réception. L étude présentée dans le Chapitre 2 est basée sur la réglementation FCC. Le modèle du signal transmis adopté est celui de la gaussienne transposée en fréquence par un mélange avec une porteuse sinusoïdale. L impulsion Gaussienne constitue un modèle mathématique facilement manipulable et est compatible avec les possibilités de filtrage réel. Ainsi, le niveau maximal du signal émis est calculé en se référant aux contraintes de puissance imposées par la réglementation FCC. Pour établir un bilan de liaison théorique, on a simplement considéré un trajet direct. L effet du canal multitrajets n a pas été pris en compte. Les antennes ont été considérées comme isotropes. Finalement, le niveau du signal reçu a été calculé après la prise en compte de l atténuation en espace libre. Ensuite, des maquettes électroniques internes à Mitsubishi Electric, associées à des antennes large bande disponibles à l IETR-INSA, ont été mises à profit pour des tests fonctionnels, en environnement réel, d une liaison ULB multi-bandes à base de radio impulsionnelle. Le dispositif permettant de réaliser ces tests est composé d un générateur d impulsions commercial, d un oscilloscope numérique large bande, d amplificateurs de puissance à l émission, d antennes ULB, de banc de filtres et des

19 Résumé étendu en Français xvii étages d amplifications à la réception. Cela permet d établir un bilan de liaison réel basé sur des mesures réalisées au laboratoire et d étudier les performances du détecteur d énergie présenté dans le dernier chapitre. De plus, les possibilités d intégration des principaux éléments formant le transmetteur sont décrites. D autre part, une comparaison entre l utilisation des antennes directives et omnidirectionnelles est présentée. Les effets de la directivité sur les caractéristiques du signal transmis sont décrits. Les résultats de mesures montrent que le temps d étalement est réduit lorsque les antennes omnidirectionnelles sont remplacées par des antennes directives. De plus, le gain des antennes directives permet de compenser l effet de l atténuation en espace libre due à la fréquence. Cette partie expérimentale de la thèse était requise pour considérer des signaux réels (étalement d impulsions, niveaux de tension,...) en entrée du détecteur d énergie étudié théoriquement. L association des résultats expérimentaux obtenus dans les domaines fréquentiel et temporel, et des résultats théoriques du détecteur autorise à établir un bilan de liaison réaliste du lien ULB considéré : l atténuation liée à la propagation, la désadaptation d impédance, le gain, le facteur de bruit à la réception et le recouvrement entre les sous-bandes adjacentes. Etude de performance d un récepteur ULB basé sur la radio impulsionnelle Le Chapitre 3 de la thèse est dédié à l étude et l évaluation des performances du récepteur non-cohérent au sens du traitement de signal, de manière à faciliter la comparaison avec les systèmes ULB existants. Les propriétés d un signal reçu après passage dans un canal ULB sont étudiées en se basant sur la modélisation statistique du canal ULB adoptée par le groupe de travail IEEE a. Ainsi, un nouveau modèle simple du signal reçu est proposé en tenant compte des paramètres essentiels du canal. Les principaux effets du canal ULB (effet de la variation de la bande de fréquence considérée et de la répartition temporelle des trajets dans un intervalle d intégration) ont été pris en compte pour étudier la statistique de l énergie du signal reçu au niveau du récepteur. Cela permet d évaluer l effet fading du canal sur le signal reçu, et ainsi, le comportement de la densité de probabilité de l énergie du signal reçu au voisinage de zéro. Une comparaison entre les résultats de simulation et ceux de l étude théorique (calcul théorique des paramètres de la densité de probabilité de l énergie en fonction des paramètres du canal) en se basant sur le modèle proposé précédemment a été présentée. Cela permet de vérifier les résultats du calcul réalisé et de valider la procédure suivie. Finalement, la capacité du canal binaire à détection d énergie pour une modulation OOK est calculée et un bilan de liaison théorique est déduit en fonction de la distance entre l émetteur et le récepteur et en se basant sur la réglementation FCC à l émission. Etat de l art sur les technologies des circuits intégrés Une étude de l état de l art des différentes technologies de circuits intégrés et des procédés de fabrication associés a été réalisée dans le Chapitre 4. Une comparaison

20 xviii Résumé étendu en Français entre les différentes technologies à base de Silicium, AsGa, GaN, SiC et InP a été présentée. Nous avons ensuite étudié les performances des circuits et de leur technologie vis-à-vis des besoins et des spécificités de notre circuit de détection. Cela nous a permis d adopter la technologie SiGe BiCMOS qui permet d implémenter les différentes parties actives du récepteur à partir de transistors Bipolaires et CMOS sur le même substrat. Etude d implémentation d un détecteur d énergie analogique en technologie CMOS Le Chapitre 5 de la thèse est consacré à l élaboration de structures permettant la mise en oeuvre d un détecteur d énergie analogique en technologie intégrée faisant partie du récepteur ULB MB-OOK décrit au Chapitre 2. Un état de l art sur les différentes parties formant le détecteur d énergie (blocs de mise au carré, amplificateurs, intégrateurs et échantillonneurs bloqueurs) a été réalisé. Les multiplieurs analogiques peuvent être utilisés pour implémenter la fonction de mise au carré en connectant le signal aux deux entrées du circuit. Les détecteurs à base de diodes et les circuits à base de transistors MOS sont les dispositifs les plus utilisés pour obtenir un circuit de mise au carré à large bande de fréquence. Dans le but de conserver la fonctionnalité large bande, nous avons cherché à obtenir une architecture à faible complexité. A ce titre, plusieurs types d architectures de mise au carré sont présentées dans le Chapitre 5. Les avantages et les inconvénients de chacune sont montrés. Une nouvelle architecture simple d un détecteur d énergie analogique opérant dans la bande de fréquences GHz a été proposée. Ce détecteur répond aux spécificités des applications très haut-débit en termes de faible consommation d énergie, de faible coût de fabrication et de taille réduite de puce grâce à la technologie CMOS. Il est composé principalement de quatre étages : un bloc de mise au carré, un suiveur de courant, un intégrateur et un échantillonneur bloqueur. Le principe de fonctionnement du bloc de mise au carré est basé sur le fonctionnement de deux transistors opérant en zone ohmique. Ce circuit est alimenté en mode différentiel (tension d entrée : ±V in ). Ainsi, le courant récupéré en sortie de ce bloc est proportionnel au carré de la tension d entrée. Un étage suiveur de courant permet une meilleure isolation entre le bloc de mise au carré et l intégrateur et ainsi il garantit un bon fonctionnement du circuit de mise au carré. Il offre une impédance d entrée faible et une impédance de sortie élevée. L opération d intégration du signal mis au carré se déroule autour d un condensateur placé en sortie du suiveur de courant. L échantillonneur bloqueur permet de transmettre proprement l information au convertisseur analogique numérique (A/N). Il a pour fonction d acquérir une valeur de la tension présente à l entrée à un instant donné et de maintenir cette valeur stable pendant toute la durée de la conversion (A/N). L architecture de l échantillonneur bloqueur comprend le condensateur ayant pour rôle de réaliser l intégration du signal reçu. Dans le but d éviter que le condensateur se décharge à travers le circuit, un amplificateur opérationnel à grande impédance d entrée est placé à la sortie du

21 Résumé étendu en Français xix circuit. Deux types d architectures d échantillonneurs bloqueurs sont envisageables : échantillonneur bloqueur en boucle ouverte ou en boucle fermée. La première topologie a l avantage de fonctionner à une fréquence d échantillonnage plus importante que la deuxième mais cela en dépit de la précision d échantillonnage. Pour cela, une architecture simple d un échantillonneur bloqueur fonctionnant en boucle ouverte est adoptée. Pour réduire les erreurs d échantillonnage et compenser les erreurs dûes aux injections de charge dans les transistors MOS, une structure de commutateur CMOS est proposée. Le comportement de ce détecteur d énergie a été simulé sous le logiciel CADENCE avec une technologie SiGe 0.35 µm BiCMOS. Cela nous a permis de déterminer les principales caractéristiques de ce détecteur. Ce circuit présente une faible consommation d énergie (0.6 mw ) avec une alimentation de circuit de ±1.8 V pour le suiveur de courant. Deux architectures du détecteur d énergie sont proposées. La première comporte un seul étage d intégration. La deuxième offre la possibilité d augmenter le débit du système en parallélisant l étage d intégration et d échantillonnage. Performances du détecteur d énergie proposé Les performances du bruit du détecteur d énergie ont été simulées sous le logiciel CADENCE. Le niveau du bruit a été évalué en sortie en tenant compte du fonctionnement non-linéaire du circuit et de l intégration du signal détecté dans un intervalle de temps T. Dans le but d évaluer les effets d imperfections dûs à l impédance d entrée de l amplificateur de courant, une étude théorique permettant d étudier ces effets sur le comportement du détecteur d énergie a été réalisée. De plus, l influence de la variation des paramètres technologiques des transistors a aussi été prise en compte. Un modèle analytique incluant ces effets dans l équation équivalente du circuit a été déduit. Des analyses de type Monte-Carlo permettant d évaluer l influence de la variation des paramètres technologiques des transistors et de valider le modèle analytique ont été menées sous le logiciel CADENCE. Ces études ont montré que l impédance d entrée du suiveur de courant n affecte pas le principe de fonctionnement du bloc de mise au carré. Par contre, le gain de ce circuit est affecté. Cela a été montré théoriquement et par simulation sous CADENCE. D autre part, la variation des paramètres technologiques formant le bloc de mise au carré a un effet sur le gain du circuit. Cela a été vérifié par des analyses de type Monte-Carlo sous CADENCE. Au niveau de l amplificateur de courant, la variation des paramètres technologiques formant ce bloc génère un courant d offset à l entrée et la sortie de cet étage. L effet résultant a été modélisé et inclus dans l équation équivalente du circuit. Des analyses de type Monte-Carlo ont été réalisées sous le logiciel CADENCE pour évaluer le niveau d offset généré à la sortie de cet étage et l effet correspondant sur le gain de l amplificateur de courant. Une nouvelle architecture de l amplificateur de courant permettant de compenser ces effets et de réduire le courant d offset généré à la sortie de l amplificateur de courant a été proposée.

22 xx Résumé étendu en Français Conclusion et perspectives Cette thèse s intéresse à l étude de performance et d intégration d une architecture d un transmetteur ULB basé sur la radio impulsionnelle en configuration multibandes. Nous avons étudié l architecture du système ULB adopté. Des tests fonctionnels du système en environnement réel sont présentés. Ils permettent d établir un bilan de liaison réaliste. Ensuite, nous avons mené une étude permettant d évaluer les effets du canal sur les propriétés du signal ULB reçu. Ainsi, un modèle théorique simple du signal est déduit. Cela permet d estimer les performances du système en terme de capacité de canal et d établir un bilan de liaison théorique en tenant compte des effets du canal. La dernière partie de cette thèse est consacrée à l étude d implémentation d un détecteur d énergie analogique en technologie CMOS opérant dans la bande de fréquences GHz. Une architecture originale du détecteur a été proposée. Elle répond aux spécificités des applications très haut-débit en termes de faible consommation d énergie, de faible coût de fabrication et de taille réduite de puce. Les performances du bruit de ce détecteur ont été présentées. De plus, une étude théorique a été menée, permettant d évaluer l effet des imperfections et de l influence de la variation des paramètres technologiques des transistors. Des analyses de type Monte-Carlo ainsi que des simulations du comportement de ce détecteur ont été menées sous le logiciel CADENCE avec une technologie SiGe 0.35 µm BiCMOS. Les perspectives liées à ce travail sont nombreuses. Nous retenons les quatre axes de recherche principaux suivants: ˆ Etendre et enrichir le modèle théorique du signal transmis avec d avantage de paramètres représentant les effets du canal et des antennes. ˆ Comparer le système ULB adopté avec le système MB-OFDM en terme de capacité de canal en fonction de l énergie du signal reçu. ˆ Etudier les possibilités d intégration des bancs de filtres. ˆ Poursuivre la phase de l étude d implémentation du détecteur d énergie analogique afin d aboutir à un circuit intégré en technologie CMOS (effet du routage sur les performances du circuit et utilisation d une technologie plus fine).

23 List of Figures 1.1 Comparison of the spectrum allocation for different wireless radio systems Maximal range and data rate of principal WLAN/WPAN standards Different radio systems in the UHF and SHF band Spectral mask for UWB EIRP emission limit (a) OOK demodulator, (b) 2-PPM demodulator A Transmitted-Reference pulse modulation and a block diagram of a TR receiver An illustration of the TH-PPM The DS-UWB spectrum The Multi-Band OFDM spectrum An illustration of a time-frequency coding for the MB-OFDM system in mode Repetition time T r, delay spread T d and integration time T i Non-coherent OOK transmission system (a) Probability density functions under H 0 and H 1 and (b) the function φ used for the threshold estimation [16] Error probability as a function of E m /N for different values of M [16] (a) Temporal and (b) spectral representation of a Gaussian pulse transposed in frequency (a) Maximum amplitude as a function of the PRP and the corresponding (b) pulses PSD with R = 50 Ω Maximum received pulse amplitude as a function of the (a) central frequency and (b) distance between the receiver and transmitter antennas Transmitter implementation sketch Receiver implementation sketch Measured time-domain waveform and FFT of the pulse generator output (a) The structure of a basic pulse generator (b) Monocycle pulse generation example Layout (a) and photography (b) of the GHz quadriplexer. Layout s indications: cut-off frequency at -3 db for the filters [23] Measured (a) transmission [3] and (b) S 11 responses versus frequency for the GHz quadriplexer xxi

24 xxii list of figures 2.10 Measured time-domain waveforms at the outputs of the GHz quadriplexer [3] (a) Layout and (b) photography of the realized passive balun Measured (a) transmission and (b) phase responses versus frequency for the passive balun Measured time-domain waveforms and their FFT at the outputs of the realized passive balun for the second sub-band of the quadriplexer Photography of (a) the realized receiver: 1 bandpass filter, 1 LNA and 4 amplifiers, (b) the amplification stage with 2 LNA [23] Measured (a) transmission and (b) reflection responses versus frequency for the GHz bandpass filer Measured transmission responses versus frequency for the (a) Mini- Circuits ERA 2SM LNA and (b) Hittite HMC311ST 89 amplifier The pattern of a constant gain antenna remains fixed with increasing frequency (top), while the pattern of a constant aperture antenna narrows and gain increases with increasing frequency (bottom) [33] The relationship between antenna directivity and link performance for an omni TX to omni RX (top), an omni TX to directional RX (middle) and a directional TX to directional RX (bottom) Wideband antennas: (a) omnidirectional: conical monopole [36] and (b) directional: double-ridged waveguide horn [37] (a) Gain, (b) VSWR and (c) half power beamwidth of the directional antenna shown in Fig. 2.19(b) [37] (a) Photograph of some fabricated omnidirectional UWB antenna s prototypes and its (b) simulated and measured gain [40] Photography of the transceiver s components used for measurements (a) Transmitter and (b) receiver architecture conceived for the functional tests realized in real indoor environment Measured time-domain waveform and FFT at the output of the second transmitter s filter bank Measured time-domain waveform at the first sub-band output of the GHz quadriplexer for a wire link Measured transmission responses versus frequency for the (a) de-multiplexer and multiplexer and (b) with the de-multiplexer of the receiver s filter bank Measured time-domain waveforms at the outputs of the GHz quadriplexer: (a) for a link with omni-directional antennas and (b) for a link with directional antennas, at both emission and reception with a range of 3 meters Measured time-domain waveforms at the (a) first and (b) third subband output of the (a) GHz quadriplexer for 3 transmission configurations with a range of 3 meters

25 list of figures xxiii 2.29 Simultaneous acquisition: measured time-domain waveforms at the first two sub-bands outputs of the GHz quadriplexer for a link with directional antennas at both emission and reception with a range of 1 meter and a specific transmitted code for each sub-band LOS and NLOS configurations for measurements with (a) directional antennas and (b) omnidirectional antennas Measured time-domain waveforms at the third sub-band output of the GHz quadriplexer for 4 transmission LOS and NLOS configurations described in Fig for (a) directional antennas and (b) omnidirectional antennas at both emission and reception Pathloss at the reference distance (d=1m) as a function of the central frequency Signal to noise ratio at the reception as a function of the distance between the transmitting and the receiving antennas in LOS (n = 1.63 and n = 2) and NLOS (n = 3.07) configurations with (a) B = 250 MHz, P RP = 30 ns, and (b) B = 500 MHz, P RP = 20 ns A schematic representation of the multipath model. (a) A realization of the impulse response. (b) Exponentially decaying ray and cluster average powers Impulse response realizations of the IEEE a UWB channel model for PHY proposal evaluation Gaussian distribution verification for (a) CM1, (b) CM2, (c) CM3 and (d) CM4 channel models An illustration of a generated received signal based on the proposed model for different values of the number of paths L The studied energy-based system with a zero-memory quadratic rectifier and filter Chi-square distribution verification of the energy of the received signal as a function of the considered bandwidth for T = 20 ns, (a) B = 500 MHz, (b) B = 1 GHz, (c) B = 2 GHz, (d) B = 3 GHz, (e) B = 5 GHz, (f) B = 7.5 GHz Chi-square distribution verification of the energy of the received signal for different values of the considered number of paths within the integration period T = 20 ns, (a) N paths = 10, (b) N paths = 15, (c) N paths = 20, (d) N paths = 25, (e) N paths = 30, (f) N paths = Average mutual information as a function of the parameter µ for B = 500 MHz, T = 20 ns and for different values of the mean SNR at the reception Channel capacity as a function of the mean signal to noise ratio (SNR m ) for different values of the bandwidth B for a repetition time of T = 20 ns Channel capacity as a function of the mean signal to noise ratio (SNR m ) for different values of the number of degrees of freedom 2M = 2BT... 80

26 xxiv list of figures 3.13 Channel capacity as a function of the bandwidth B for a repetition time of T = 20 ns for different values of the mean signal to noise ratio (SNR m ) Channel capacity as a function of the number of degrees of freedom 2M = 2BT for different values of the mean signal to noise ratio (SNR m ) Average channel capacity in Mbps as a function of the distance between the transmitting and the receiving antennas in LOS (n=1.63 and n=2) and NLOS (n=3.07) configurations with (a) B = 250 MHz, PRP = 30 ns, and (b) B = 500 MHz, PRP = 20 ns Schematic cross section of (a) a Schottky diode and a n-channel MES- FET transistor and (b) a npn HBT structure in GaAs-based technology A cross-section diagram of a bipolar technology structure Complementary CMOS structure (a) A cross-section diagram and (b) Current-voltage characteristics of a n-channel enhancement-mode MOSFET Cross section of the silicon-on-insulator (SOI) A cross-section diagram of a BiCMOS technology structure Diode detector (a) Detector transfer curve and (b) Voltage sensitivity versus input power and temperature at zero frequency [71] Schematic of the Gilbert multiplier core (a) Structure basic of a NMOS Floating-Gate MOS transistor with n-input gates, (b) Symbolic representation Squarer based on FGMOS transistors Squarer based on MOS transistors Squarer architecture Relative error versus frequency of the squared signal compared with the same operation of an ideal squarer Simulation of the squarer circuit with an 100 mv pp input sine wave signal at: (a) 1 GHz, (b) 3.5 GHz, (c) 7 GHz, and (d) 10 GHz A simple architecture of continuous time integrator (a) Current amplifier stage. (b) a modified architecture of (a) Current conveyor (a) Architecture of the proposed pulse energy detector. (b) Input voltage v in, output current i C and output voltage v C of the pulse energy detector in the GHz sub-band Waveforms for a sample-and-hold circuit (a) An n-channel MOS transistor used as a switch. (b) Model for MOS switch (a) An application of a MOS switch. (b) Model of the ON state of the switch in (a)

27 list of figures xxv 5.17 Equivalent lumped model for the analog switch. (a) Transistor is ON. (b) Transistor is OFF (a) The Miller-capacitance-based S/H circuit cited in [100]. (b) An improved version cited in [101] (a) Closed-loop S/H circuit. φ 1 is the sample phase and φ 2 is the hold phase. (b) Switched capacitor closed-loop S/H circuit Illustration of the architecture of the integration and sample and hold stages (a) MOS switch with a dummy transistor. (b) A CMOS switch. (c) Architecture of the adopted CMOS switch associated with dummy transistors Unity-gain output buffer Pulse energy detector: squarer, current amplification, integration and sample and hold stages Energy detection of a pulse at the output of the first sub-band of the system according to time domain diagram in Fig Time domain diagram of the pulse energy detector control of Fig Pulse Energy Detector with two parallel stages for the integrator and S/H stages Energy detection with two parallel S/H and integration stages according to time domain diagram in Fig Time domain diagram of the pulse energy detector control of Fig Noise-current spectral density at the output of the pulse detector Study of the imperfection effect: modeling of the equivalent input impedance of the current amplifier and its effect on the squarer circuit Magnitude and phase of the input impedance of the current amplifier for different values of biasing current versus frequency iterations Monte-Carlo simulation: Output current i sq for a 200 mv pp input sinus signal v in at 6.85 GHz with variation on (a) mismatch and (b) mismatch and process parameters of MOS transistors M 1 and M Study of the mismatch effect: modeling of the input offset voltage of the current amplifier and its effect on the squarer circuit Input offset current I i,ɛ versus input offset voltage V 0 of the amplification stage and (b) Error of the squared signal with offset voltage V 0 relatively to the ideal case (V 0 = 0 V ) Study of the mismatch effect: modeling of the input and output offset current of the current amplifier iterations analytical and Monte-Carlo simulation results for the offset current at the output of the current amplifier with variations on (a) mismatch and (b) mismatch and process parameters

28 xxvi list of figures iterations Monte-Carlo simulation results: Magnitude and phase of the input impedance of the current amplifier with variations on (a) mismatch and (b) mismatch and process parameters (a) 500 iterations analytical and Monte-Carlo simulation results for the gain of the current amplifier at 1 MHz with variations on mismatch parameters. (b) 500 iterations Monte-Carlo simulation results: Current amplifier gain with variations on mismatch and process parameters iterations analytical and Monte-Carlo simulation results for the offset current at the output of the modified current amplifier architecture with variations on (a) mismatch and (b) mismatch and process parameters iterations analytical and Monte-Carlo simulation results for the gain of the modified current amplifier architecture with variations on (a) mismatch and (b) mismatch and process parameters B.1 Squarer architecture: ideal case B.2 Squarer architecture: impedance and offset effect

29 List of Tables 2.1 Characteristics of the quadriplexer s sub-bands Characteristics of the employed surface-mounted amplifiers Typical VSWR and Gain of the conical monopole antenna [36] Measured characteristics of different stages of the receiver Delay spread (ns) for 85% of received energy as a function of the distance and for different transmission configurations Data rate for different transmission configurations and a range of 3 m Parameters values for the 4 channel models Chi-square parameters and mean C T and variance D T of the random variable representing the received signal energy as a function of the considered bandwidth for 20 paths within an integration period T = 20 ns Chi-square parameters as a function of the number of paths within the integration period and for a bandwidth B = 500 MHz Performance of the energy-based system as a function of M Performance of the energy-based system for LOS and NLOS configurations Key characteristics and comparison of MMIC technologies Specification of the AMS 0.35 µm SiGe BiCMOS Technology Key characteristics and comparison of transistor technologies Circuit and performance parameters of the pulse energy detector Circuit and performance parameters of the modified current amplifier Circuit and performance parameters of the current conveyor Adopted CMOS switch parameters of the S/H circuit Circuit and performance parameters of the output buffer xxvii

30

31 Abbreviations ADC ADS AlGaAs AMS AWGN BiCMOS BJT BOK BPSK CDMA CM CMOS CVD DAA DC DS-UWB DSSS EC ECC EIRP FCC FET FFT FGMOS GaAs GPS HBT HDR HEMT HFET IEEE IC InP IR ISI Analog to Digital Converter Advanced Design System Aluminium Gallium Arsenide Austria Micro Systems Additive White Gaussian Noise Bipolar Complementary Metal Oxide Semiconductor Bipolar Junction Transistor Binary Orthogonal Keying Binary Phase Shift Keying Code Division Multiple Access Channel Model Complementary Metal Oxide Semiconductor Chemical Vapor deposition Detect and Avoid Direct Current Direct Sequence Ultra Wide Band Direct-Sequence Spread Spectrum European Commission Electronic Communication Commission Equivalent Isotropic Radiated Power Federal Communications Commission Field-Effect Transistor Fast Fourier Transform Floating-Gate Metal Oxide Semiconductor Gallium Arsenide Global Positioning System Heterojunction Bipolar Transistor High Data Rate High Electron Mobility Transistor Heterostructure Field-Effect Transistor Institute of Electrical and Electronics Engineers Integrated Circuit Indium Phosphide Impulse Radio Inter-Symbol Interference xxix

32 xxx Abbreviations JFET LNA LPI/D LOS MB MBOA MESFET MMIC MOS MOSFET NLOS NMOS OFDM OOK PAM PDF PHY PMOS PPM PR PRP PSD PTFE RF RX SiC SiGe SNR SOI SOS THD TH TR TX UNII USB UWB VGA VLSI VNA VSWR WiFi WLAN WPAN Junction Field-Effect Transistor Low Noise Amplifier Low Probability of Intercept and Detection Line Of Sight Multi Band Multi-Band OFDM Alliance Metal-Semiconductor Field-Effect Transistor Monolithic Microwave Integrated Circuit Metal Oxide Semiconductor Metal Oxide Semiconductor Field-Effect Transistor Non Line Of Sight N-channel Metal Oxide Semiconductor Orthogonal Frequency Division Multiplexing On-Off Keying Pulse Amplitude Modulation Probability Density Function Physical layer P-channel Metal Oxide Semiconductor Pulse Position Modulation Pseudo-Random Pulse Repetition Period Power Spectral Density PolyTetraFluoroEthylene Radio Frequency Receive Silicon Carbide Silicon Germanium Signal to Noise Ratio Silicon On Insulator Silicon On Sapphire Total Harmonic Distortion Time Hopping Transmitted-Reference Trasmit Unlicensed-National Information Infrastructure Universal Serial Bus Ultra Wide Band Variable Gain Amplifier Very Large Scale Integration Vector Network Analyzer Voltage Standing Wave Ratio Wireless Fidelity Wireless Local Area Network Wireless Personal Area Network

33 General Introduction History and background The UWB communication technology was first employed by Guglielmo Marconi in 1901 to transmit Morse code sequences across the Atlantic Ocean using spark gap radio transmitters. However, the benefit of a large bandwidth and the capability of implementing multiuser systems provided by electromagnetic pulses were never considered at the time. Approximately fifty years after Marconi, modern pulse-based transmission gained momentum in military applications in the form of impulse radars. The origin of Ultra-Wideband (UWB) technology stems from work in time-domain electromagnetic begun in 1962 to fully describe the transient behavior of a certain class of microwave networks through their characteristic impulse response. Through the late 1980s, this technology was alternately referred to as baseband, carrier-free or impulse. The term Ultra-wideband has not been applied until approximately 1989 by the U.S. Department of Defence (DoD). By that time, UWB theory, techniques and many hardware approaches had experienced nearly 30 years of extensive development. From 1960s to the 1990s, the work in the UWB field, particularly in the area of impulse communications, was restricted within the United States to military and Department of Defense (DoD) applications under classified programs such as highly secure communications. Since 1994, however, much of the work has been carried out without classification restrictions, and the development of UWB technology has greatly accelerated. The recent advancement in microprocessing and fast switching in semiconductor technology has made UWB ready for commercial applications. As interest in the commercialization of UWB has increased over the past several years, developers of UWB systems began pressuring the FCC to approve UWB for commercial use. In February 2002, the FCC approved the First Report and Order (R&O) for commercial use of UWB technology under strict power emission limits for various devices. UWB technology offers a promising solution to the spectrum drought by allowing new services to coexist with current radio systems with minimal or no interference. This coexistence brings the advantage of avoiding the expensive spectrum licensing fees that providers of all other radio services must pay. UWB communications is fundamentally different from all other communication techniques because it employs extremely narrow RF pulses to communicate between transmitters and receivers. Thus, 1

34 2 General Introduction several advantages, such as the throughput, robustness to jamming and coexistence with current radio services, are offered by this technique. UWB has several features that differentiate it from conventional narrowband systems: ˆ Large instantaneous bandwidth enables fine time resolution for network time distribution, precision location capability, or use as a radar. ˆ Short duration pulses are able to provide robust performance in dense multipath environments by exploiting more resolvable paths. ˆ Low power spectral density allows coexistence with existing users and has a Low Probability of Intercept and Detection (LPI/D) that is a critical need for military operations. ˆ Data rate may be traded for power spectral density and multipath performance. Thesis context and objectives The Mitsubishi Electric corporation is one of the worldwide leader in the research, engineering, manufacturing and marketing of electrical and electronic equipment used in communications, consumer electronics, industrial technology, energy and transportation. The European research laboratory, Mitsubishi Electric R&D Centre Europe, was established in 1995 in Rennes. One of the main activities of this lab was devoted for the conception of future wireless communications tools. In 2002, research activities on UWB system started with the theoretical studies realized by Stéphane Paquelet. The functionality principles of a UWB transceiver based on Impulse Radio for High Data Rate (HDR) applications were established [1]-[2]. As low-cost and low-power consumption hardware architectures are targeted, the asynchronous approach was adopted since it requires relaxed synchronization constraint. Thus, the proposed non-coherent receiver is based on energy detection with an On-Off Keying (OOK) modulation because it possesses a good optimality regarding channel capacity. The demodulation is based on a non-trivial energetic threshold comparison. To avoid Inter-Symbol Interference (ISI), the symbol repetition period is chosen to be greater than the delay spread of the channel. To be close to channel capacity, it is proposed to duplicate this basic scheme on several separate frequency sub-bands. In order to validate the theoretical studies and to permit a future implementation of such a multiband system based on impulse radio, an investigation of a low-loss planar multiplexer/demultiplexer with adjacent frequency bands was realized by Stéphane Mallégol [3]. These studies were followed by the fabrication of RF prototypes for the MB-OOK transceiver at Mitsubishi Electric R&D Centre Europe. They had the objective of making a functionality demonstration of such a system and validating the previous studies. These research topics took part of the French project BILBAO and the European project PULSERS. In this context, the objectives of this thesis were:

35 General Introduction 3 ˆ To measure in real environment the transmitted pulses via the proposed UWB transceiver and provide a realistic link budget. ˆ To study the performance of the HDR UWB receiver based on energy detection when considering the effects of the channel on a propagating wideband signal. ˆ To elaborate in the implementation study of a pulse energy detector in CMOS technology able to operate in the 3.1 to 10.6 GHz UWB band. This work was achieved during a collaboration between the Institute of Electronics and Telecommunications of Rennes (IETR-INSA) and Mitsubishi Electric R&D Centre Europe at Rennes. Wideband directional and omnidirectional antennas were offered by the IETR laboratory in order to realize functional tests of the proposed UWB system. The implementation study of a pulse energy detector was also made at the IETR laboratory. Thesis overview and contributions This Ph.D. thesis is decomposed into three parts. The first part concerns with the study of the performances of the energy-based receiver with a UWB channel model. The second part presents the results of measurements done in a real environment using prototypes fabricated at Mitsubishi Electric. The last part describes an implementation study of a pulse energy detector aimed at operating in each sub-band of the receiver before the numerical treatment stage. The thesis report is organized into five chapters. The contents and contributions are described below. In Chapter 1, we present the state-of-art of the UWB technology along with different modulation techniques proposed for UWB systems. First, we show the key benefits and applications of the UWB for wireless transmission as well as the state of the spectrum regulation in the world. Then, we describe the different proposed UWB transmission architectures for high data rates applications. Finally, we describe the principle of the solution adopted by Mitsubishi Electric. It consists of a OOK modulation generalized over multiple sub-bands with a non-trivial energetic threshold comparison at the reception. In Chapter 2, a theoretical and an experimental link budget are provided. In the first part, the FCC regulation is adopted in order to identify the maximum amplitude of the transmitted pulse authorized at the emission. A theoretical link budget is then described and the received signal is studied as a function of the central frequency and the range between the transmitting and receiving antennas. In the second part, the different stages of the adopted UWB transceiver architecture are presented, and the state-of-art on-chip implementation possibilities and the corresponding integrated circuits technologies are reported. Then, the realized prototypes at Mitsubishi Electric and their performances are presented. Finally, functional tests in real environment were realized, and a comparison between the use of omnidirectional and directional

36 4 General Introduction antennas in Line Of Sight (LOS) and Non Line Of Sight (NLOS) configurations is reported. These studies and the measurement results will permit to evaluate the signal level at the different stages of the receiver and its noise performance. In Chapter 3, we first describe the statistical model proposed by the IEEE group for HDR applications. Then, the statistical distribution of the received signal and its energy is studied when taking into account the essential effects of the channel. A new statistical model of the received signal is proposed based on these studies. The main objective is to evaluate the effects of combinations between paths on the statistical distribution of the received signal energy when the signal passes through the channel. Thus, the fading is characterized for energy-based receivers. Finally, the performances of the proposed system will be evaluated and a link budget study with a data rate estimation of the communicating system is provided as a function of the received Signal to Noise Ratio (SNR) and the range between the transmitting and receiving antennas. In Chapter 4, we give a general overview about the available Monolithic Microwave Integrated Circuit (MMIC) technologies in order to validate the choice of a suitable technology for implementing a pulse energy detector. Also, we point out the advantages and the drawbacks of the principal semiconductor materials, and we make a comparison based on the performances (cost, power consumption, reduced size chip, RF performances,...) of these technologies. Finally, we describe the principal characteristics of the AMS 0.35 µm SiGe BiCMOS technology used to test and to evaluate the performance of the studied circuit. In Chapter 5, we present a suitable on-chip implementation of a pulse energy detector for the considered multi-band OOK UWB receiver. The adopted non-coherent receiver structure per sub-band is composed of a band-pass filter, a single ended input to balanced output converter, a squarer, a current amplifier, an integrator and a sample and hold circuit. The pulse energy detector must conform with the requirements of UWB high data rates applications in terms of low cost, low power consumption and reduced size chips. It includes the four stages: a squarer, a current amplifier, an integrator and a sample and hold circuit. The squarer must be able to operate in the 3.1 to 10.6 GHz UWB band. Also, it must have a wide in-bandwidth functionality (of about 500 M Hz in each sub-band of the system). Different techniques to realize the squaring function and the integration are presented and studied. Advantages and drawbacks of each of them are pointed out. Also, the charge injection effects that could affect the precision of the sampler are studied and several techniques are proposed in order to compensate them. The noise performance of the detector was studied. Possible imperfections and mismatches effects of the different stages constituting the pulse detector are identified and studied in order to evaluate the architecture performance. Finally, theoretical studies and CADENCE simulation results in 0.35 µm CMOS technology are presented to validate this very low complexity approach.

37 Chapter 1 State-of-the-Art UWB and Adopted Modulation Scheme Contents 1.1 Introduction UWB definition and applications UWB regulation constraint Problem statement FCC regulation in USA European regulation Regulation in Asia Modulation schemes for UWB communication systems Impulse Radio modulation techniques Modulation schemes proposed for standardization Adopted UWB system Problem statement Modulation principle: asynchronous approach System analysis System performance Conclusion

38 6 State-of-the-Art UWB and Adopted Modulation Scheme 1.1 Introduction The rapid growth in technology and the successful commercial deployment of wireless communications are significantly affecting our daily lives. The rise of new generation radio systems and the replacement of wired connections with WiFi and Bluetooth are enabling consumers to access a wide range information from anywhere and any time. The demand of new wireless communication systems offering higher capacity, faster service and more secure wireless connections with higher quality continue to increase. Thus, new enhanced technologies have to find their place in the overcrowded Radio Frequency (RF) spectrum. UWB technology offers a promising solution to the RF spectrum drought by allowing new services to coexist with current radio systems with minimal or no interference. The UWB using large absolute bandwidth, are robust to frequency-selective fading, which has significant implications on both, design and implementation. Additionally, the spreading of the information over a very large frequency range decreases the spectral density and makes it compatible with existing system. UWB signaling can potentially be implemented with very low cost and low power consumption components, representing an interesting solution for remote control and sensor network applications. For designing and implementing any wireless system, channel sounding and modeling are a basic necessity. Several studies, theoretical and practical, have shown an extreme difference with narrowband channels. In this chapter, we give an overview about the UWB technology, its key benefits and applications for wireless transmission as well as the state of the spectrum regulation in the world. Also, we present different modulation techniques proposed for UWB systems. Finally, we describe the principle of the solution adopted by Mitsubishi Electric R&D Centre Europe. 1.2 UWB definition and applications Ultra Wideband (UWB) communication systems can be broadly classified as any communication system whose instantaneous bandwidth is many times greater than the minimum required to deliver particular information. The first definition for a UWB signal was based on the fractional bandwidth, which is defined as [4]: B f = 2 f H f L f H + f L, (1.1) where f H and f L are respectively the higher and the lower frequency boundaries at 3 db below the highest radiated emission. In this first definition, a signal can be classified as a UWB signal if the fractional bandwidth B f is greater than 25 %. In 2002, the FCC defined a UWB signal as any signal having a 10 db fractional bandwidth larger than 20 % and/or an absolute bandwidth of more than 500 MHz. The spectrum of a UWB signal is depicted in Fig. 1.1 and compared to other existing narrowband systems.

39 1.3 UWB regulation constraint 7 GHz y Power spe ectral density (dbm m/mhz) MHz Conventional narrowband modulations UWB KHz Spread spectrum systems - 41 dbm/mhz Bandwidth (Hz) Figure 1.1: Comparison of the spectrum allocation for different wireless radio systems. UWB technology is revolutionizing the wireless industry by opening doors for new applications as well as complementing existing wireless systems. The fine positioning characteristics of narrow UWB pulses enables them to offer high-resolution radar for military and civilian applications. There are many commercial applications of UWB radar and imaging, such as intrusion-detection radars, Ground-Penetrating Radar (GPR) and precision geolocation systems. Also, it addresses needs for new radio communication systems and short-range high-speed data transmissions systems. In the recent years, the high speed wireless connectivity gained much more interest especially for personal area network applications. Thus, many standards for wireless communication over short distances were developed. One can mention the family of WiFi standards (IEEE ), the Bluetooth, the Zigbee (IEEE ) and the standard These standards are used for Wireless Local Area Networks (WLAN) and Wireless Personal Area Networks (WPAN), (see Fig. 1.2). However, most of these technologies use the ISM and the UNII bands with maximum bandwidths of about 10 MHz. A UWB link can be considered as a cable replacement with data rate attaining several hundreds of Mbps. Therefore, it has the potential of being able to be adopted by new applications which to date have not been fulfilled by the aforementioned wireless short range technologies. 1.3 UWB regulation constraint UWB technology, typically characterized by very low power radiation over a very large radio bandwidth, could provide a host of communications, measurement, location, medical, surveillance and imaging applications of benefit. In this context, it is important to establish regulatory conditions which will encourage the development of economically viable markets for applications of UWB technology as commercial opportunities arise. Also, harmonized worldwide regulations would provide a significant

40 8 State-of-the-Art UWB and Adopted Modulation Scheme 1000 Maximum data a rate (Mbps) UWB Bluetooth a g b a (Low rate UWB) Zigbee Maximal range in indoor (m) Figure 1.2: Maximal range and data rate of principal WLAN/WPAN standards. benefit for UWB technology, allowing devices to be carried around the world without service interruption Problem statement UWB systems can operate on an unlicensed radio spectrum from 3.1 to 10.6 GHz. However, an obvious problem for UWB usage can be identified here; these frequencies are already in use, at least partly in every corner of the world. Fig. 1.3 compares the spectral occupation of different radio systems. It is well known that the frequency spectrum is limited resource, and it should be used efficiently. The existing systems should not be interfered by new systems operating at the same frequency. Therefore, strict regulation is needed for UWB, before it could be commercially launched. Emitted signal powe er GSM GPS DCS UMTS ISM Bluetooth, b, g, , Cellular phones, Microwave ovens UNII a Hyperlan Non-intentional emission limit - 41 dbm/mhz UWB Spectrum Frequency (GHz) Figure 1.3: Different radio systems in the UHF and SHF band.

41 1.3 UWB regulation constraint FCC regulation in USA The Federal Communications Commission (FCC) is an independent United States government agency. The FCC was established by the Communications Act in 1934 and is charged with regulating interstate and international communications by radio, television, wire, satellite and cable. It operates in agreement with the National Telecommunications and Information Administration (NTIA) which is in charge of regulating use of spectrum allocated to the Federal Government. After several years of debate, the FCC approved the deployment of UWB on an unlicensed basis in the 3.1 to 10.6 GHz band in 2002 [5]. The average Effective Isotropic Radiated Power (EIRP) is restricted at the emission to dbm or 75 nw per MHz constant Power Spectral Density (PSD) over a 7.5 GHz of bandwidth and for a period that is less than 1 ms. A peak EIRP limit is also imposed by the FCC. It depends on a resolution bandwidth RBW which has a value between 1 and 50 MHz. The peak EIRP can be expressed by: EIRP limit peak = 20 log 10 ( RBW 50 ), (1.2) where RBW is expressed in MHz. For RBW = 50 MHz, the peak EIRP should not be greater than 0 dbm, or 1 mw. Additional PSD limits have been placed below 2 GHz to protect critical applications such as the Global Positioning System (GPS) and the cell phone systems (GSM and UMTS), (see Fig. 1.3). The FCC regulation expands the design options for UWB communication systems. System designers are free to use a combination of sub-bands within the spectrum to optimize system performance, power consumption and design complexity. UWB systems can maintain the same low transmit power as if they were using the entire bandwidth by interleaving the symbols across these sub-bands. Dividing the available spectrum into several smaller bands allows the selective implementation of bands at certain frequency ranges while leaving other parts of the spectrum unused. The dynamic ability of the radio is important because it can adapt to regulatory constraints European regulation In Europe, the European Telecommunications Standards Institute (ETSI) works since 2001 to develop a European standard for UWB systems. The studies are performed in a cooperation with the European Conference of Postal and Telecommunications (CEPT). They have the objective of analyzing the eventual harmful interference with existing radiocommunication services that could exist and need to be managed [6]-[7]. In February 2007, the European Commission (EC) ratified an authorization of the UWB spectrum as shown in Fig The use of equipment using UWB technology is forbidden when they are fixed to an outdoor location or when they are connected to a fixed outdoor antenna or in vehicles. The equipment using UWB technology must operate predominantly indoors and it must cease transmission within 10 seconds unless it receives an acknowledgement from an associated receiver that its transmission

42 10 State-of-the-Art UWB and Adopted Modulation Scheme -40 UWB EIRP em mission le evel (dbm m/mhz) Part 15 limit FCC indoor FCC outdoor CEPT * CEPT ** CEPT * : until 31 December 2010 ** : beyond 31 December Frequency (GHz) Figure 1.4: Spectral mask for UWB EIRP emission limit. is being received. Appropriate mitigation techniques (including detect-and-avoid or low-duty-cycle approaches) was studied and specified by CEPT and ETSI. Thus, a maximum mean EIRP density of 41.3 dbm/mhz can be allowed in the 3.4 to 4.8 GHz bands with low duty cycle restriction [8] Regulation in Asia In February 2003, Singapore authorized technical trails for UWB applications in a specific geographical location (UWB friendly zone). Emission limits was relaxed by 6 db (from 2.2 to 10.6 GHz) relative to the FCC UWB masks. In May 2005, the office of the Telecommunications Authority of Hong Kong announced the release of the 3.1 to 10.6 GHz band for technical UWB trials. All the band was assigned for indoor trials. However, the 4.2 to 10.6 GHz was assigned for outdoor trials. Emission limits for both indoor and outdoor was relaxed by 8.3 db relative to the FCC UWB masks. In August 2005, temporary UWB rules were introduced in Japan with a preliminary transmission mask for indoor use. These rules were similar to those defined by the FCC regulation in the 3.1 to 10.6 GHz UWB band with some modification. In the 3.4 to 4.8 GHz band, Detect and Avoid (DAA) techniques must be applied or the EIRP density limit must be less than 70 dbm/m Hz without DAA techniques. Also, transmission limits are tighter by about 29 db than the FCC limits in the 4.8 to 7.25 GHz band. Finally, below 3.4 GHz and above 10.6 GHz, the emission limits are the same as those of Electronic Communications Commission (ECC) limits in Europe.

43 1.4 Modulation schemes for UWB communication systems Modulation schemes for UWB communication systems The choice of modulation method can affect a number of design parameters in UWB system development. Theses parameters include data rate, robustness to interference and noise, spectral characteristics of the transmitted signal and transceiver complexity that directly impacts the overall size and cost of the system Impulse Radio modulation techniques After generating very short-duration pulses, data modulation for UWB systems is typically done using pulse modulation techniques in time domain. The transmitted pulses are typically the derivative of Gaussian pulses. In this section, we will consider some commonly employed IR-UWB modulation options Pulse Amplitude Modulation The Pulse Amplitude Modulation (PAM) encodes the data bits based on different levels of power (amplitude) in short-duration pulses. Theoretically, an unlimited number of amplitude level can be defined in order to implement this modulation technique. However, in the typical cases, this modulation scheme is limited into only two cases where the polarity of the pulse changes to represent digital data bits. A pulse with positive polarity represents a bit 1, where a pulse with negative polarity corresponds to a bit 0. Thus, the transmitted signal for this modulation can be expressed as: s(t) = + l= a k,l p(t lt ), (1.3) where k represents the transmitted bits, p(t) is the UWB pulse waveform, T is the pulse repetition period and a k,l represents the l th data bit with a k,l = 1 if k = 0 and a k,l = +1 if k = 1. Within these conditions, the PAM modulation can be seen as a form of the biphase or Binary Phase Shift Keying (BPSK) modulation which possesses a good robustness regarding the channel effects and simplifies the synchronization procedure. A special case of PAM modulation consists of the On-Off Keying (OOK) modulation. Its main advantages are simplicity and low implementation cost. The OOK transmitter is quite uncomplicated, a simple RF switch can be turned on and off to represent data. This way, OOK modulation allows transmitter to idle while transmitting a data bit 0, and thus it saves power. An OOK modulated pulse is typically detected using a non-coherent energy detector receiver (see Fig. 1.5(a)) Pulse Position Modulation In Pulse Position Modulation (PPM), the information is encoded based on the position of the transmitted pulse by shifting it in a predefined time window. While a pulse

44 12 State-of-the-Art UWB and Adopted Modulation Scheme 2 (.) T i 0 {0, 1} 2 (.) T 0 δ +T T δ MAX {0, 1} (a) (b) Figure 1.5: (a) OOK demodulator, (b) 2-PPM demodulator. shifted in time with respect a specific time reference represents a data bit 1, a bit 0 is represented with a pulse without a time shift. The general signal model for PPM is given as: s(t) = p(t kt a k δ), (1.4) k=1 where p(t) denotes the transmitted UWB pulse, T is the pulse repetition period and δ indicates the time shift between two states of the PPM modulation. The symbol is encoded by the integer a k (0 a k M) where M is the number of states of the modulation. The total duration of the symbol is T s which is fixed and chosen greater than Mδ + T GI where T GI is a Guard Interval (GI) inserted for Inter Symbol Interference (ISI) mitigation. The binary transmission rate is thus equal to R = log 2 (M)/T s. A 2-PPM demodulator is shown in Fig. 1.5(b). The value of δ may be chosen according to the autocorrelation characteristics of the pulse. Thus, its optimum value δ opt can be obtain as follows: + p(t) p(t + δ opt ) = 0. (1.5) Transmitted-Reference modulation Transmitted-Reference (TR) modulation is defined as the transmission of a pair of pulses or doublets separated in time. The first pulse in a TR doublet is the reference pulse. This pulse is unmodulated and does not carry any information. After a certain time interval δ, the reference pulse is followed by a data-modulated pulse. The transmitted data is modulated based on the relative polarity of the reference and data pulse. For example, a reference and a data pulse of the same polarity designate a binary value of 1, while a data pulse opposite in polarity to the reference pulse corresponds to a binary value of 0 (see Fig. 1.6). A TR receiver uses the correlation scheme but with one major difference. Instead of correlating the received pulses with a predefined template, a TR receiver correlates the received signal with a delayed version of itself. Both reference and data pulses experience the same type of channel distortion. Thus, each reference pulse acts as a template for its subsequent data pulse.

45 1.4 Modulation schemes for UWB communication systems 13 H 0 T i {0, 1} 0 H 1 Δτ Δτ Figure 1.6: A Transmitted-Reference pulse modulation and a block diagram of a TR receiver. TR modulation suffers from a major drawback associated with the correlation of noise on noise caused by the overlap of reference and data pulses. Also, for every data bit, two pulses must be transmitted. As a consequence, the data rate is reduced PPM with Time Hopping In Time Hopping (TH) with PPM, a time frame T f is divided into N s subunits called chips with a duration T c. Each data bit is represented by a pulse where its position is determined by a Pseudo-Random (PR) code. With this modulation scheme, the multiple-access can be achieved using unique TH code for each user. The general model of a TH-PPM signal in a multiple-access channel for a user j is given by: s (j) (t) = k= N s 1 l=0 p(t kt s lt f c (j) l T c a (j) k δ), (1.6) where a k is the k th data bit, N s is the number of pulses transmitted for each information symbol and T s is the total transmission time of the symbol which is divided into N s frames of duration T f. Also, each frame is subdivided in its turn into slots of duration T c. c l represents the PR TH code sequence determining the position of the pulse within each frame. At the reception, the data detection process is performed by correlating the received signal with a template v(t) = u 0 (t) u 1 (t), where u 0 (t) and u 1 (t) represent symbols with duration T s encoding a bit 0 and a bit 1, respectively. The decision rule at the correlator output for deciding between hypotheses H 0 (bit 0) and H 1 (bit 1) is given by: H 1 Ts 0 s(t)v(t)dt 0. H 0 When the number of users is large, the multi-user interference and noise are approximated with a Gaussian random process. This justifies the optimality of the

46 14 State-of-the-Art UWB and Adopted Modulation Scheme Figure 1.7: An illustration of the TH-PPM. correlation receiver for TH-PPM signals. The integration of all pulses encoding a symbol permit to obtain a processing gain increasing with the number of pulses per symbol. However, the data rate is reduced by a factor of N s. The other disadvantage of this approach is the severe modification introduced by the UWB channel on the shape of the transmitted signal. Thus, the receiver has to construct a template by using the shape of the received signal. The construction of an optimal template presents a major challenge to implement such a TH-PPM based system. The other major difficulty concerns the pulse-based modulation characteristics. The transmitted pulses have an extremely short duration which make the synchronization procedure complex Modulation schemes proposed for standardization The IEEE standardization group, responsible for wireless personal area networks (WPANs), organized task group 3a to develop an alternative physical layer based on UWB signaling. There were two main opponents for this standard: a codedivision multiple access (CDMA) based technique [9] and a frequency-hopping orthogonal frequency-division multiplexing (OFDM) proposal known as Multiband OFDM [10]. In this section, we will give an overview about these two modulation schemes in order to point out their main advantages and drawbacks Direct-Sequence UWB Direct-Sequence UWB is a single-band approach that uses narrow UWB pulses and time-domain signal processing combined with well understood Direct-Sequence Spread Spectrum (DSSS) techniques to transmit and receive information. This single-band technique is backed by Motorola/XtremeSpectrum. The Direct Sequence Code Division Multiple Access (DS-CDMA) approach for UWB is derived from the CDMA technology. The DS-UWB supports operation in two different bands: a low band of 1.75 GHz occupying the spectrum from 3.1 to

47 1.4 Modulation schemes for UWB communication systems 15 Low Band High Band GHz GHz Figure 1.8: The DS-UWB spectrum GHz and a high band of 3.5 GHz occupying the spectrum from 6.2 to 9.7 GHz (see Fig. 1.8) [9]. Thus, the Unlicensed-National Information Infrastructure UNII band is avoided. The two bands can be used independently or simultaneously. This offers an additional flexibility for the system functionality. Unlike the conventional DS-CDMA systems where spread spectrum signals are emitted, wide-band pulses are used for the DS-UWB to efficiently occupy the wide spectrum. It employs direct sequence spreading of Binary Phase Shift Keying (BPSK) and optionally quaternary Binary Orthogonal Keying (4-BOK) pulses. The various data rates are supported through the use of variable-length spreading code sequences, with sequence lengths ranging from 1 to 24 pulses or chips as well as variable rates for forward error correction using convolutional codes. In the BPSK data modes, each symbol carries only a single data bit. For BPSK modulation, the data bit determines whether the spreading code with the desired length is transmitted with a polarity of either +1 or 1. In the 4-BOK data modes, each symbol carries two data bits. For this mode, modulation is accomplished by dividing the data bit stream into a block of two bits, then mapping each block of two bits into one of two possible spreading codes for the desired data symbol rates as well as a polarity of either +1 or 1. One reason for including the 4-BOK mode in the DS-UWB proposal is to support the optional use of advanced iterative decoding techniques Multi-Band OFDM The Multi-Band Orthogonal Frequency Division Multiplexing (MB-OFDM) was proposed as a standard for wireless personal area network physical layer in [10]. This approach was supported by a group of international companies including Texas Instruments, Intel and Time Domain corporation and an alliance (called MBOA and then WiMedia) was made in order to support the OFDM based solution for multiband UWB. The proposed scheme divides the available UWB spectrum into several nonoverlapping sub-bands with each one having a bandwidth of 528 M Hz. This aproach is similar to the narrowband frequency-hopping technique. Dividing the UWB spec-

48 16 State-of-the-Art UWB and Adopted Modulation Scheme Channel #1 Channel #2 Channel #3 Channel #4 Channel #5 Band Band Band Band Band Band Band Band Band Band Band Band Band Band #1 #2 #3 #4 #5 #6 #7 #8 #9 #10 #11 #12 #13 # f (MHz) Figure 1.9: The Multi-Band OFDM spectrum. trum into multiple frequency bands offers the advantage of avoiding transmission over certain bands, such as at 5 GHz, to prevent potential interference. As shown in Fig. 1.9, five band groups are defined within the GHz frequency band. Two operation modes are currently considered: The first mode makes use of sub-bands 1 3, while the second mode employs sub-bands 1 3 and 6 9. Within each subband, information is transmitted using conventional coded OFDM modulation with a Frequency Hopping (FH) scheme. A different carrier frequency, corresponding to one of the center frequency of the three adjacent frequency bands for first mode devices, is employed at each time slot. According to [10], MB-OFDM uses N c = 128 sub-carriers per sub-band, through a frequency selective multipath fading channel with a bandwidth of 528 M Hz. This leads to a sub-carrier separation of f = MHz. The sub-carriers are modulated using Quadrature Phase-Shift Keying (QPSK). At each time slot, the transmitter applies an Inverse Fast Fourier Transform (IFFT) yielding an OFDM symbol with a duration of T F F T = 1/ f = ns. In order to mitigate the impact of ISI, a Cyclic Prefix (CP) with a duration of T CP = ns is added to the output of the IFFT signal. In addition, a Guard Interval (GI) with a duration of T GI = 9.5 ns is added to allow the transmitter and receiver to switch from one sub-band to the next. Finally, the OFDM symbol is passed through a Digital to Analog Converter (DAC) resulting to an analog baseband signal with a symbol duration of T SY M = ns, (see Fig. 1.10). The baseband signal to be transmitted at the n th block can be expressed as: x n = N c 1 k=0 s n ke j2πk f(t T CP ), (1.7) where s n k is the complex symbol to be transmitted over the kth OFDM sub-carrier during the n th OFDM symbol period and t [T CP, T F F T + T CP ]. x n (t) is zero in the two intervals [0, T CP ] and [T F F T + T CP, T SY M ] corresponding, respectively, to the CP

49 1.5 Adopted UWB system 17 95ns 9.5 Guard Interval for TX/RX switching Band # 1 Band # 2 Band # 3 Frequency (G GHz) ns Cyclic Prefix ns Symbol duration Time (ns) Figure 1.10: An illustration of a time-frequency coding for the MB-OFDM system in mode 1. duration and GI duration. The transmitted MB-OFDM signal is given by: r RF (t) = N SY M 1 n=0 R ( x n (t nt SY M )e j2πf n c t), (1.8) where N SY M is the total number of OFDM symbols in a transmitted frame. The carrier frequency fc n specifies the sub-band over which the n th OFDM symbol is transmitted. After several years of deadlock, the IEEE a task group has been dissolved in Today, UWB implementations are not constrained to any particular MAC or PHY and have the flexibility of using any MAC and PHY layers as long as they comply with the FCC spectrum mask limits. Many of the companies originally working on the IEEE standard joined the WiMedia Alliance creating their own specification of UWB based on OFDM PHY and a distributed USB-like MAC. This WiMedia specification was published as the European Computer Manufacturers Association ECMA-368 standard. Pulse-LINK developed and enhanced their impulse-based UWB signaling and implemented their solution based on the IEEE b MAC [11]. 1.5 Adopted UWB system Since this thesis is mainly focusing on the evaluation of the performances and providing an implementation of the MB-OOK non-coherent IR-UWB receiver, we devote this section to more description of the principles of the adopted asynchronous approach.

50 18 State-of-the-Art UWB and Adopted Modulation Scheme Problem statement The two competing technologies proposed for the standardization group IEEE were described in the previous section. These techniques are based on a synchronous approach with a coherent demodulation. They offer good performances on an Additive White Gaussian Noise (AWGN) channel. However, when considering the characteristics of a multipath channel with numerous number of significative paths [12] and signal distortion produced by both antennas and material propagation [13], synchronization and channel estimation in IR schemes turns out to be a critical point to design RAKE receivers. In addition, the performance of these systems have a high sensitivity to synchronization errors. As we here deliberately stress low-cost hardware architectures, asynchronous methods are favored since they require relaxed synchronization constraints. The adopted asynchronous approach is an IR-based system with a non-coherent processing technique consisting on estimating the energy of the received signal [1]-[2]. The On-Off Keying (OOK) modulation is adopted because it possesses a good optimality regarding channel capacity [14]. The demodulation is based on a non-trivial energetic threshold comparison. To be close to channel capacity, it is proposed to duplicate this basic scheme on several separate frequency sub-bands Modulation principle: asynchronous approach Considering the typical characteristics of a UWB channel, propagation aspects (see Fig. 1.11) and based on measurements made in [12], it was shown that typical values of delay spread T d are 30 to 150 ns for distances varying from 1 to 10 meters in LOS and NLOS configurations while the number of significant paths can be up to 60 to recover 85% of available energy. In addition, the transmitted signal suffers from distortion due to material propagation and antennas. The main idea consists on benefiting from the natural channel diversity and adopting a simple modulation scheme while prohibiting complex techniques which is a basic condition in order to conceive a high data rate communicating system with low-cost and low-power consumption. Therefore, non-coherent receivers working as energy detectors rather than RAKE structure are favored. Thus, the transmitted information is preferably carried by signal amplitude rather than its phase. This naturally leads to consider Pulse Amplitude Modulation. In that case and On-Off Keying (OOK) modulation appears to be a suitable candidate since it possesses a good optimality considering a noncoherent modulation [14]. To avoid ISI, the symbol repetition period is chosen such as T r T s + T d, where T s is the duration allocated to the symbol waveform (see Fig. 1.11). For high data rates IR schemes, an elementary symbol information is carried within a single pulse duration T s T pulse T d. As a consequence, it is simply imposed T r T d. To increase the system capacity while preserving these properties, the basic scheme is duplicated on several separate frequency sub-bands.

51 1.5 Adopted UWB system 19 Figure 1.11: Repetition time T r, delay spread T d and integration time T i. Pulse Generator OOK Modulation Channel Pulse Detector 1101 Figure 1.12: Non-coherent OOK transmission system System analysis Concentrating on a particular sub-band of width B, an additive thermal noise w(t) (whose two-sided spectral density is N/2) is present at the input of the receiver. n(t) corresponds to the noise w(t) filtered in the appropriate sub-band. For the adopted OOK modulation and in each sub-band, a pulse of general waveform p(t) is located, the transmitted signal can be written as follows: s(t) = + n= η n p(t nt r ), (1.9) where η n {0, 1} is the emitted bit in the OOK scheme. Focusing on a particular sub-band, the demodulation stage exacts to face the two equidistributed hypotheses: H 0 : x = H 1 : x = T 0 T 0 [n(t)] 2 dt (bit 0), [s(t) + n(t)] 2 dt (bit 1), where the hypothesis H 0 corresponds to a transmission of a bit 0 with the OOK modulation. Thus, the received signal is the filtered noise. The hypothesis H 1 de-

52 20 State-of-the-Art UWB and Adopted Modulation Scheme notes the presence of the deterministic signal s(t) in addition to the noise n(t), which corresponds to a transmitted bit 1. With respect to the integrator output x, the demodulation stage consists of deciding at best between H 0 and H 1, i.e intending to minimize the error probability. As a major improvement on usual non-coherent approaches, besides the noise spectral density N/2, B and T i, the estimation of the signal energy E = T i s 2 (t)dt will 0 enrich the a priori channel knowledge. This estimation could be naturally performed during the preamble step thanks to appropriate unbiased estimators (see [15] for statistics of x under (H i ) i 0,1 ). Based on the likelihood ratio test, appropriate statistical methods show that the optimal decision rule consists in comparing the statistic x to a predefined threshold ρ opt and deciding according to: H 1 x ρ opt, H 0 where ρ opt is the solution of p 0 (x) = p 1 (x) assuming equal likely bits 0 and 1 (see Fig. 1.13(a)), the p i (x) being the probability density function (PDF) under the hypothesis (H i ) i 0,1. These are shown to be central (respectively non-central) Chisquare distribution (χ 2 ) for H 0 (respectively H 1 ): ( 1 p 0 (x) = x ) M 1 Γ(M) N e ( x N ), p 1 (x) = ( ) M 1 x+e x 2 ( e E N ) IM 1 ( 2 xe where 2M = 2BT i + 1, Γ denotes the Euler function and I n denotes the n th modified Bessel function of the first kind. These PDF can be expressed as a function of the normalized variable (x/n) and two parameters. These parameters are the signal to noise ratio (L = E/N) and the M where 2M = 2BT i +1 is the dimension of the space of functions whose energies are concentrated in a bandwidth B and a time T i, which is the number of degrees of freedom of the χ 2 distributions as well. The optimum threshold is found to satisfy [1]: ρ opt N = E/N 4 N ), + M + M 1 φ(e/n), (1.10) where φ is a tabulated function depending on the variable L = E/N [16] (see Fig. 1.13(b)) System performance As a consequence of transmitting equal likely bits 0 and 1, the mean error probability can be expressed as: P e = 1 (P (0 1) + P (1 0)), (1.11) 2

53 1.6 Conclusion 21 p 0 (x) p 1 () (x) Polynomial approximation Optimum function ρ opt x (a) (b) Figure 1.13: (a) Probability density functions under H 0 and H 1 and (b) the function φ used for the threshold estimation [16]. where P (1 0) is the probability of deciding H 1 whereas a bit 0 has been sent and P (0 1) is the probability of deciding H 0 whereas a bit 1 has been sent. The expressions of these probabilities were evaluated in [16]. The error probability P e expressed as a function of the mean received energy E m is given by: P e = Q M ( 4Em N, 2ρ N ) + e 2 ρ N M where Q is the generalized Marcum function defined as: Q m (a, b) = 1 a m 1 b k=1 (ρ/n) M k Γ(M k + 1), (1.12) x m e x2 +a 2 2 I M 1 (ax)dx. (1.13) The performance P e as a function of E m /N, where E m = E/2 is the energy averaged over equiprobable bits 0 and 1, recovered by various receivers (see Fig. 1.14). The performances of OOK modulations are calculated with a threshold which is assumed to be optimally set (i.e. N and E are perfectly estimated). To reach the comparable performance with a coherent BPSK receiver, the proposed non-coherent receiver has to improve its link budget by 4 to 5 db for typical values of M = BT i (between 5 and 25). However, these performances are functions of the mean energy recovered by the receiver. Whereas the proposed OOK non-coherent receiver is able of integrating almost the whole available energy, a coherent BPSK RAKE receiver should recover at least 33% to 40% of the whole energy (4 to 5 db of difference mentioned before). Taking up such a challenge with realistic number of fingers is quite unlikely due to the propagation characteristics. This obviously confers an inherent advantage to the non-coherent scheme. 1.6 Conclusion The FCC s approval of the unlicensed use of UWB systems within the 3.1 to 10.6 GHz band and the recent advances in semiconductor technology have moved the UWB de-

54 22 State-of-the-Art UWB and Adopted Modulation Scheme P e ( E N) m db Figure 1.14: Error probability as a function of E m /N for different values of M [16]. velopment from research labs and classified military projects to the commercial sector. Many opportunities and challenges are offered by this new technology to the world of wireless communications. In this chapter, we gave an overview about the UWB regulations in the world and the different modulation techniques for IR-UWB systems. Also, we briefly reviewed the definition of UWB signals and different envisioned applications within this new technology. As we are interested with the high data rate applications, the main two UWB techniques proposed for the IEEE a WPAN standard were introduced. Then, the adopted asynchronous non-coherent approach with IRscheme was described. An OOK modulation technique with a demodulation based on a non-trivial energetic threshold comparison is chosen. This is because it possesses a good optimality regarding the channel capacity and allows low-cost and low-power consumption architectures offered by the relaxed constraints on synchronization procedure. It was proven that using a prior information made of the approximate channel delay spread and the available energy level allows the non-coherent system to reach high performances. To achieve channel capacity, the basic scheme is duplicated on several separate frequency sub-bands.

55 Chapter 2 MB-OOK Transceiver Architecture and Link Budget Realization Contents 2.1 Introduction FCC power limitation and theoretical link budget study Model of the transmitted pulse Spectral density of the modulated signal Power constraint at the emission Maximum Gaussian pulse amplitude at the emission Maximum pulse amplitude at the reception MB-OOK transceiver architecture Pulse generator Filter banks for (de)multiplexing Passive balun Amplification stages UWB antennas Link budget realization for IR-UWB MB-OOK transceiver Configurations description Measurement results Conclusion and prospects

56 24 MB-OOK Transceiver Architecture and Link Budget Realization 2.1 Introduction The feasibility study of the proposed IR-UWB non-coherent system passes through the realization of prototypes and functional tests in a real environment. In this chapter, a theoretical and an experimental link budget are described. In the first part, the maximum amplitude of the transmitted pulse authorized at the emission is estimated with respect to the FCC regulation. Also, a theoretical link budget is elaborated and the maximum amplitude of the signal at the reception is identified as a function of the central frequency and the range between the antennas. In the second part, the different stages of the adopted MB-OOK transceiver architecture are described. The realized prototypes (at Mitsubishi Electric R&D Centre Europe) and their performances are presented. The on-chip implementation possibilities and the corresponding integrated circuits technology of the different parts of the transceiver are reported. Finally, measurement results of a realistic link budget in real environment is given and a comparison between the use of omnidirectional and directional antennas in both LOS and NLOS configurations is presented and the effects of the antenna s directivity on the characteristics of the received pulses are reported. Theses studies will permit us to evaluate the signal level at the input of the pulse detector that will be presented in the last chapter. Also, the characteristics of the different stages of the receiver will permit us to evaluate the noise level at the input of the pulse detector. We note that the prototypes were realized to operate with four adjacent subbands. The main objective is to realize a demonstration of the adopted system in a limited UWB band. We also note that during the French RNRT/BILBAO project, prototypes were realized in order to cover the 3.1 to 5.1 GHz band separated into eight sub-bands with each one having a 10-dB bandwidth of 300 M Hz corresponding to the intersection point between the adjacent sub-bands. 2.2 FCC power limitation and theoretical link budget study In the context of UWB radio development, it is imperative that the power level of the transmitted signal is compliant with the regulators rules. It is important to have a signal model that can be tuned according to the system parameters Model of the transmitted pulse For impulse radio systems, the model of the transmitted signal is the gaussian function transposed in frequency (see Fig. 2.1). The gaussian pulse constitutes a simple mathematical model that is easy to manipulate and compatible with real filtering possibilities. The pulse p(t) with a power spectral density centered on frequency f c

57 2.2 FCC power limitation and theoretical link budget study 25 itude (V) alized ampli Norma D (db) d ESD malized Norm Time (ns) (a) Frequency (GHz) (b) Figure 2.1: (a) Temporal and (b) spectral representation of a Gaussian pulse transposed in frequency. and with an emitted energy E T X can be expressed as: 2E T X p(t) = τ π sin(2πf ct) e t 2 2τ 2, (2.1) where τ is the parameter determining the bandwidth. The temporal width of the generated pulse is approximately equal to 2τ. The energy of the impulse signal integrated over the time interval [ 2τ, 2τ[ represents more than 99.5% of the total energy of the pulse. The Fourier transform of p(t) can be expressed by, P (f) = E T X τ ( π e [ 2πτ(f f c)] 2 + e [ 2πτ(f+f 2) c)], (2.2) Since the pulse has a finite temporal spread time, i.e., a finite energy, we can evaluate the Energy Spectral Density (ESD) as: ESD p (f) = P (f) 2 = E T X τ ( π e [2πτ(f fc)]2 + e [2πτ(f+fc)]2 +2e [ 2πτ(f f c)] 2 e [ 2πτ(f+f c)] 2). (2.3) The last term is negligible. Thus, the energy spectral density can be written as follows: ESD p (f) = E T X τ ( π e [2πτ(f fc)]2 + e [2πτ(f+fc)]2). (2.4) The energy spectral density reaches his maximum value at central frequencies ±f c. We define B xdb the bandwidth at x db. Thus, we can write: ( ESD p f c B ) x db 2 = ESD p(f c ) 10 x db/10. (2.5)

58 26 MB-OOK Transceiver Architecture and Link Budget Realization Then, we can obtain: τ = 1 ln(10) x db πb xdb 10. (2.6) We note that the FCC regulation defines the bandwidth at 10 db, thus: ln(10) τ =. (2.7) πb 10dB Spectral density of the modulated signal Considering a basic scheme where pulses are generated repeatedly at a pulse repetition frequency P RF = 1/P RP, the transmitted signal can be simply expressed as: s(t) = + k= a k p(t k P RP ), (2.8) where a k is the amplitude coefficient with a mean µ a and a variance σ 2 a. The impulse p(t) is defined in Eq. (2.1). Under the conditions of equiprobability and independence of the symbols, the power spectral density of the transmitted signal is given by the Brennett formula: DSP s (f) = σ2 a P RP P (f) 2 + µ2 a P RP 2 + k= ( k ) ( P 2 δ f k ). (2.9) P RP P RP To avoid the spectral rays in the bandwidth and to efficiently occupy the FCC mask, it seems necessary to eliminate the second term of the power spectral density of the transmitted signal. This can be done by adopting a modulation scheme with µ a = 0. In the case of OOK modulation, the transmitted signal can be generated by inverting the polarity of the pulses in a pseudo-random and equiprobable way (P (a k = 1) = P (a k = 1) = 1/4 and P (a k = 0) = 1/2). This will provide the cancelation of the second term with spectral rays in the power spectral density. As the modulation scheme is based on energy detection, this polarity alternation will have no effect on the receiver performances. The mean energy per pulse E T X,m is equal to the product of the variance σ 2 a by the emitted energy per pulse: E T X,m = σ 2 a E T X. Thus, the PSD of the transmitted pulse can be expressed as: πτ ( DSP p (f) = P RP E T X,m e [2πτ(f fc)]2 + e [2πτ(f+fc)]2). (2.10) In reality, a fixed number of samples must be considered. Also, the generation of the pseudo-random sequences must be studied in order to respect the peak power limit fixed by the FCC regulation. These constraints were not taken into account here and must be properly considered to allow a best UWB spectrum occupation in accordance with the imposed regulation.

59 2.2 FCC power limitation and theoretical link budget study Power constraint at the emission To verify that the emitted signal strength of an UWB transmitter is in compliance with rules imposed by the FCC, the average and peak power constraints must be verified Average power constraint The average effective isotropic radiated power (EIRP) is measured with a spectrum analyzer with the resolution bandwidth set to 1 M Hz. The average power must not exceed the level of dbm in the GHz UWB band. Thus, the measured PSD must be below the limit of dbm per MHz. The resulting power that passes through the resolution filter is averaged over a 1 ms time window. To estimate the emitted average power P a, the power spectral density is integrated over the occupied bandwidth B a : fc+ Ba 2 P a (B a ) = 2 DSP p (f)df, f c Ba 2 where the maximum of the PSD is attained at the central frequency f c. Also, the PSD can be considered constant within the bandwidth B mean, thus: P a (B a ) = 2 πτ P RP B a E T X,a. Then, the maximum average energy emitted per pulse E T X,max can obtained as: E T X,max = P RP 2 πτ P a,max (B a ) B a. The FCC regulation defines the bandwidth at 10 db, thus: E T X,max = B P RP 2 π ln10 P a (B a ) B a. (2.11) Peak power constraint The mask defined by the regulation organizations concerns in priority the average emitted power. However, an instantaneous peak power limit is imposed in order not to perturb other systems. The instantaneous peak power has less opportunities to cause problems and perturbations for other systems than the average emitted power. However, a high amplitude pulse can saturate a receiver operating in the considered bandwidth. The peak power defined by the FCC corresponds to the emitted impulse power filtered in the resolution bandwidth RBW which is centered at the frequency f c (at f c, the maximum ESD is attained). The peak power is measured with a RBW set to a value between 1 and 50 MHz. The recommended RBW is 3 MHz. The measured peak power level must be below (RBW/50 MHz) 2 mw for all frequencies of the resolution filter within the GHz UWB communication band.

60 28 MB-OOK Transceiver Architecture and Link Budget Realization Maximum Gaussian pulse amplitude at the emission The power spectral density is obtained by dividing the energy spectral density by the average repetition time PRP. Also, when taking into account the antenna characteristic impedance R, the power spectral density can be written as follows: P SD p,p RP (f) = E T Xτ π ( e [2πτ(f fc)]2 + e [2πτ(f+fc)]2). (2.12) R P RP We define V max as the maximum temporal amplitude of the impulse signal in Eq. (2.1) which can be given by: 2E T X V max = τ π. (2.13) Thus, the power spectral density of the generated pulse can be expressed as: P SD p,p RP (f) = (V maxτ) 2 π ( e [2πτ(f fc)]2 + e [2πτ(f+fc)]2). (2.14) 2R P RP It is worth noting that the FCC regulation mask is defined only for positive frequency components. Hence, the right side of Γ(f) of the power spectral density, as a result of power conservation, can be expressed as: with, P tot = + P SD p,p RP df = + 0 Γ(f)df, (2.15) ] Γ(f) = 2 [P SD p,p RP = (V maxτ) 2 π f>0 R P RP e [2πτ(f fc)]2. (2.16) The maximum of the power spectral density is obtained at the central frequency f c with respect to the FCC mask limit (Γ(f c ) = 41.3 dbm/mhz). Therefore, the maximum temporal impulse amplitude can be calculated as a function of B, P RP and F CC limit values: V max = 10 (Γ(fc)+30)/10 R P RP τ. (2.17) π Fig. 2.2 shows the power spectral density of several pulses on a load with a value of 50 Ω with different bandwidths and their maximum amplitude as a function of the PRP Maximum pulse amplitude at the reception A theoretical link budget will be described in order to determine the signal level at the input of the receiver. We will consider that there is no obstacles nearby to cause reflection or diffraction.

61 2.2 FCC power limitation and theoretical link budget study 29 (a) (b) Figure 2.2: (a) Maximum amplitude as a function of the PRP and the corresponding (b) pulses PSD with R = 50 Ω Signal at the emission The transmitted signal model will be constructed from the mean power spectral density imposed by the FCC regulation. Let us consider a bandwidth B with a central frequency f c. The generated signal can be expressed in frequency domain as follows: S(f) = { Da P RP if f c B 2 < f < f c + B 2 0 otherwise. (2.18) Then, the temporal signal is obtained after applying the inverse Fourier transformation: s(t) = IF T [S(f)] = S(f)e i2πfct df R = D a P RP B e i2πfct sinc(πtb), (2.19) where D a is the emitted power spectral density and P RP is the pulse repetition pulse. We will consider that the instantaneous power P T delivered to the transmitting antenna terminals is equal to the square of the generated signal s(t) Signal at the reception Consider two antennas oriented towards the maximal gain of each other and separated by a distance r with no obstacles nearby to cause reflection or diffraction. An incident wave coming from a far distance may be thought of as a uniform plane wave. The receiving antenna extracts a certain amount of power from an incident electromagnetic wave which sets up currents on the antenna. Thus, in free space conditions, the received power can be expressed as: P R = P T G T G R λ 2 (4πr) 2 = P T G T G R c 2 (4πrf c ) 2, (2.20)

62 30 MB-OOK Transceiver Architecture and Link Budget Realization (a) (b) Figure 2.3: Maximum received pulse amplitude as a function of the (a) central frequency and (b) distance between the receiver and transmitter antennas. where c m/s is the speed of light. A receiver connected to a receiving antenna s output terminals will appear to the antenna as a load impedance. The receiving antenna can be represented by a Thevenin-equivalent generator and an internal impedance Z A. As consequence of the reciprocity principle, Z A is the same whether the antenna is transmitting or receiving. The current into the load is I L = V/(Z A + Z L ), where the load impedance is Z L = R L + jx L. The maximum power delivered to the load is reached under the usual conjugate matching condition Z L = ZA. The power delivered to the receiving load: P R = 1 2 I L 2 R L = 1 2 V 2 R L Z L + Z A 2, (2.21) where, V 2 P R,max =. (2.22) 8R A The emitted signal in Eq. (2.19) corresponds to the instantaneous P EIRP. From Eq. (2.20) and Eq. (2.21), we obtain the maximum value of the instantaneous equivalent input voltage of the receiver that can be expressed as follows: U L,max = c 4R A P EIRP G R = 2 R A D a P RP G R B c. (2.23) 4πrf c 4πrf c Fig. 2.3 shows the maximum amplitude of the received pulse as a function of the central frequency and the range between the transmitting and receiving antennas. 2.3 MB-OOK transceiver architecture The main objective of this section is to give an overview about the different parts of the adopted UWB transceiver s architecture. Realized prototypes and their performances

63 2.3 MB-OOK transceiver architecture 31 will be presented. The on-chip implementation possibilities and the corresponding integrated circuits technology of the different parts of the transceiver will also be reported. The principle of the transmitter consists of generating a pulse covering the whole GHz band with a repetition time T r that is greater than the channel delay spread T d to prevent interference between pulses. The transmitter s architecture, depicted in Fig. 2.4, is composed of a filter bank, high-speed switches for OOK modulation, a combiner and an antenna. In the filter bank, the pulse is simultaneously split into an appropriate number of sub-bands thanks to a passive demultiplexer (about 20 sub-bands, each one having a predefined 10-dB bandwidth of 200 to 500 MHz). The sub-bands bandwidths are characterized with intersection point between the adjacent ones. Then, an OOK modulation is applied on each sub-band at the rate of 1/T r. Finally, the split pulses are combined with the same architecture used for demultiplexing but operating here as a multiplexer. Finally, at the output of the multiplexer, the pulse is amplified and transmitted via an UWB antenna. Transmitted Data B 1 Pulse Generation Energy Splitter B 2 B n Filter bank Figure 2.4: Transmitter implementation sketch. Fig. 2.5 presents the architecture of the receiver. First, a broadband bandpass filter is featured in order to compensate possible intermodulation effects (filtering the out-of-band principal harmonics will permit to reduce the levels of superior harmonics in the useful band). The following blocks consist of a Low Noise Amplifier (LNA) and a Variable Gain Amplifier (VGA) with a global gain of 65 db (this amplification level permits to compensate the attenuation caused by the pathloss at 3 m and the filter bank preceding the pulse detector). This will relax the constraint on the noise of the pulse detector. A specific filter bank with no power division effect splits the signal into the same number of sub-bands as for the transmitter [3]. Then, on each

64 32 MB-OOK Transceiver Architecture and Link Budget Realization parallelized stage, a pulse energy detector follows, whose output is sampled at a rate of 1/T r before performing an energetic threshold comparison. According to link budget studies [1], this technique is able to achieve a high data rate of 600 Mbps at 3 meters with 24 sub-bands of 250 MHz, P RP = 40 ns. An interesting feature to notice is that an easy power control in each sub-band is possible. This kind of flexibility can be useful to fulfill a regional Power Spectral Density (PSD) mask. Synchronization Received Data B 1 + _ () (.) 2 G T i 0 ADC BP filter LNA Energy Splitter B2 + _ (.) 2 G T i 0 ADC sing l process Digital B n + _ 2 (.) G T i 0 ADC Filter bank Figure 2.5: Receiver implementation sketch Pulse generator For tests issue, a commercial monocycle pulse generator is employed to generate a pulse that can cover a part of the UWB band [17]. The monocycle s peak-to-peak pulse amplitude into 50 Ω load is 3.29 V. Its duration and center frequency are 184 ps and 5 GHz, respectively (see Fig. 2.6). We note that the increase of the attenuation observed above 6 GHz in the pulse spectrum is due to the limited bandwidth of the oscilloscope used for the experiments (Agilent 54855A Infiniium oscilloscope). To apply the multi-band OOK modulation, the generated pulse is passed through a filter bank of which architecture will be described in the next section. On-chip implementation of pulse generators The most common approach to generate a wideband signal is Gaussian monocycle pulse. The on-chip implementation of pulse generator in CMOS technology was discussed in the literature [18]-[19]. In [18], the authors present a CMOS reprogrammable pulse generator that generates the desired pulse through a combination of specific input transitions on the control taps as shown in Fig. 2.7(a). In Fig. 2.7(a), we suppose that the control taps A, B, C and D are set to V dd, GND, GND, and V dd, respectively, at the initial state. The power amplifier is in an idle state with no current flows through the load. However, the current flows through the RF choke

65 2.3 MB-OOK transceiver architecture 33 1 ns/div 1 V/div 1 GHz/div 10 dbm/div Figure 2.6: Measured time-domain waveform and FFT of the pulse generator output. A RF choke C Block B LOAD C A B C D D Generated pulse (a) (b) Figure 2.7: (a) The structure of a basic pulse generator (b) Monocycle pulse generation example. and the two conducting transistors. Fig. 2.7(b) shows a waveform illustrating the switching sequence of the four control taps and a resulting Gaussian monocycle pulse Filter banks for (de)multiplexing Based on the theoretical work in [1], the objective is to build a low-loss demultiplexer to simultaneously split pulses into an appropriate number of separated frequency sub-bands (each sub-band having a 10-dB bandwidth from 200 to 500 MHz). Power dividers associated with filters for division into adjacent sub-bands can be used for such an application. However, they induce a high insertion loss. Demultiplexers composed of diplexers based on 90 hybrids and filters had been identified in [20]. However, they are quite complex, and they require a wide number of analog components. An original filter bank architecture was designed and realized in microstrip technology [3]. These studies permit to evaluate the feasibility and to validate the adopted approach for future implementation and integration of a transceiver chipset. The proposed architecture offers an original concept to split energy simultaneously into adjacent channels and recombine them. It lies on the requirement of a low-loss (de)multiplexer.

66 34 MB-OOK Transceiver Architecture and Link Budget Realization We note that the miniaturization of the filters forming the filter bank turn to be possible due to, e.g., the emerging Bulk Acoustic Wave (BAW) technology [21] Descriptions of the fabricated quadriplexer prototype A GHz passive quadriplexer was manufactured in microstrip technology for the IR-UWB MB-OOK transceiver at Mitsubishi Electric [3]. It is composed of four bandpass filters with quasi-elliptic response. Each filter consists of the association of folded transmission lines and open-ended capacitively-loaded transmission lines that operate as two open-loop resonators (2 nd -order filters). The interconnection between filters is realized by transmission lines whose dimensions are chosen to reproduce a shunt. Such a shunt susceptance-annulling network provides a nearly constant total admittance at the quadriplexer s input port over its operating frequency band. Finally, a lowpass filter with a 3-dB cut-off frequency at 4.65 GHz (7 th -order filter with Chebyshev response) is added to optimize the stopband response of the circuit up to 10.6 GHz. The size of the quadriplexer (shown in Fig. 2.8) is mm mm (excluding SMA connectors). It is fabricated by mechanical etching process using a highly accurate circuit-board plotter, considering low-cost organic substrates (RO3010 in [22]) with a copper metallization-thickness of 17 µm. A ceramic-filled PTFE composite is used as a substrate (dielectric constant of 10.02, dielectric loss tangent of 0.002, thickness of 0.64 mm) [22]. Moreover, all the devices are designed with 50 Ω single inputs and outputs terminations GHz lowpass filter GHz filter F GHz filter F GHz filter GHz filter F2 Size: 52 mm 41 mm (a) F3 (b) Figure 2.8: Layout (a) and photography (b) of the GHz quadriplexer. Layout s indications: cut-off frequency at -3 db for the filters [23] Measurement results The frequency dependence for the quadriplexer s measured transmission response is presented in Fig. 2.9(a). The 3-dB bandwidth of each sub-band is around 190 MHz and the in-band insertion loss is less than 3 db, including almost db for the insertion loss of the bandpass filters. The magnitude of the intercept point between

67 2.3 MB-OOK transceiver architecture 35 adjacent sub-bands is 14.5 db. This provides a proper non-overlapping between subbands. Also, the stopband rejection exceeds 30 db from 2 to 11 GHz. Thus compliance with narrowband systems will be achieved. The quadriplexer s characteristics are given in Tab As shown in Fig. 2.9(b), the measured passband return loss is above 10 db in the pass band of the passive filter bank. Fig shows the timedomain measurement results at the four outputs of the GHz quadriplexer connected to a monocycle pulse generator. To conclude, this architecture does not induce a significant power division effect. A quadriplexer based on conventional power dividers (Wilkinson) associated with filters each having an insertion loss of about 2 db would have provided an insertion loss of about 8 db for each sub-band. Thus, used three times in the MB transceiver, such type of filter bank will introduce a total insertion loss of about 24 db for each sub-band. Compared to the proposed architecture in [3], the approach based on power dividers suffers from about 15 db of additional insertion loss on each sub-band. Sub-band (cut-off frequency at -3 db, GHz) Center frequency (F c, GHz) Insertion loss at F c (db) 3-dB bandwidth (MHz) 10-dB bandwidth (MHz) Table 2.1: Characteristics of the quadriplexer s sub-bands. (a) (b) Figure 2.9: Measured (a) transmission [3] and (b) S 11 responses versus frequency for the GHz quadriplexer.

68 36 MB-OOK Transceiver Architecture and Link Budget Realization 200 mv/div 2 ns/div 1 st sub-band : GHz filter 200 mv/div 2 ns/div 3 rd sub-band : GHz filter 200 mv/div 2ns/div 3 rd sub-band band : GHz filter 200 mv/div 2 ns/div 4 th sub-band : GHz filter Figure 2.10: Measured time-domain waveforms at the outputs of the GHz quadriplexer [3] Passive balun In the proposed receiver architecture of the MB-OOK transceiver, a single-ended bandpass filter and a double-balanced pulse detector are used on each stage. One solution consists in using a balun to convert single-ended signal from the output of the bandpass filter to differential signal (±V in voltage inputs) to feed the detector. Thus, a phase difference of 180 is required between the two inputs of the detector. For first prototype, a basic passive balun was designed and realized in microstrip technology (the same technology as for the quadriplexer) to operate at the output of the second sub-band of the quadriplexer (F c = GHz). It consists of connected transmission lines of specific lengths based on some multiple of a quarter wavelength of the intended frequency. The size of the balun shown in Fig is 28.7 mm 26.4 mm (excluding SMA connectors). The frequency dependence of the passive balun s measured transmission and phase responses are presented in Fig The phase and gain difference between the outputs of the passive balun are 1.005π and 0.5 db, respectively, at 3.5 GHz. To verify the functionality of the realized balun, it was connected to the output of the second sub-band of the realized quadriplexer. The input of the quadriplexer was connected to the commercial pulse generator with generated pulse characteristics described in a previous section. Fig shows the measured time-domain waveforms and its FFT at the outputs of the realized passive balun. Baluns on-chip implementation Compact CMOS baluns for applications in the concerned UWB band was reported in literature [24]. Many structures of on-chip baluns were discussed and compared as a function of their self-resonant frequency and silicon area occupation. Since higher

69 2.3 MB-OOK transceiver architecture 37 2 (λ g /4) RF in RF out1 1 (λ g /4) 3 RF out2 2 (λ g /4) (a) (b) Figure 2.11: (a) Layout and (b) photography of the realized passive balun m2 200 db(s(1,3)) db(s(1,2)) m2: freq = 3.5 GHz db( S(1,2) ) = m3: freq = 3.5 GHz db( S(1,3) ) = Δ S ij = 0.58 db Frequency 3.5 GHz (a) m3 Phase (S(1,3)) Phase (S(1,2)) m2: freq = 3.5 GHz Phase( S(1,2) ) = 69.2 m3: freq = 3.5 GHz Phase ( S(1,3) ) = m2 m Frequency (GHz) (b) Figure 2.12: Measured (a) transmission and (b) phase responses versus frequency for the passive balun. loss is caused by poor substrate isolation in CMOS technology, one solution consists of realizing the passive balun and the passive filter bank on the same substrate Amplification stages The Low Noise Amplifier (LNA) is a special type of amplifier used in communication systems to amplify very weak signals captured by an antenna. UWB transmitted pulses are limited in power by the FCC mask to dbm/mhz, which made them near to the noise level at the reception after passing through the channel. Placed directly after the antenna, the LNA has an essential role that consists of boosting sufficiently the received signal power. As we know from Friis formula, the overall noise figure of the receiver front-end is dominated by the first few stages. Then, the noise of all the subsequent stages is reduced by the gain of the LNA while its noise

70 38 MB-OOK Transceiver Architecture and Link Budget Realization 20 mv/div 1 ns/div 1 GHz/div Figure 2.13: Measured time-domain waveforms and their FFT at the outputs of the realized passive balun for the second sub-band of the quadriplexer. is injected directly into the received signal. Thus, it is necessary for a LNA to boost the desired signal power while adding as little noise and distortion as possible so that the retrieval of this signal is possible in the later stages in the system. Variable Gain Amplifiers can be used in order to control the incoming power level of the received signal. In many cases the received signal varies greatly in the amplitude. This requires a VGA with wide gain control and bandwidth capability in order to cover the whole 3.1 to 10.6 GHz UWB band. The noise factor of the receiver can be given by: F receiver = 1 G LNA (F rest 1) + F LNA, (2.24) where F rest is the overall noise factor of the subsequent stages, G LNA and F LNA are the gain and the noise factor of the LNA, respectively. As we are working with wideband system, we could need to amplify signal at high frequency in order to compensate the 1/f 2 roll-off resulting from the path loss. Another solution consists of enlarging the bandwidth of the sub-bands centered on the higher frequencies. The manufactured amplification part of the multiband IR receiver prototype is shown in Fig The first amplification module (see Fig. 2.14(a)) is composed of a bandpass filter, a low noise amplifier and four amplifiers [23]. The second amplification module (see Fig. 2.14(b)) includes two low noise amplifiers. The amplification stages are driven through a +5 V regulated DC voltage (external DC voltage: +7 V ). They provide a practical amplification of about 45 db. Placed at the input of the receiver, the 5 th order bandpass filter presents a frequency response of the Chebyshev-type. It is aimed at rejecting interference between the pulses to be amplified and out-of-band possibly through the amplifiers. Its 3-dB bandwidth ranges from 2.8 to 5.25 GHz with a center frequency of F c = GHz and for a stopband rejection greater than 20 db (< 2.33 GHz and > 5.71 GHz). The measured transmission and reflection responses versus frequency of the bandpass filer are shown in Fig Two types of commercial MMIC amplifiers based on HBT (InGaP) transistors are employed to

71 2.3 MB-OOK transceiver architecture 39 GND + 7 V HMC311ST V GND ERA-2SM HMC311ST89 RF out RF in GHz BPF ERA-2SM RF in RF out (a) (b) Figure 2.14: Photography of (a) the realized receiver: 1 bandpass filter, 1 LNA and 4 amplifiers, (b) the amplification stage with 2 LNA [23]. S-param meters (d db) Frequency (GHz) (a) S-parameters (db) Frequency (GHz) (b) Figure 2.15: Measured (a) transmission and (b) reflection responses versus frequency for the GHz bandpass filer. realize the two parts of the receiver. The low noise amplifier ERA 2SM is from Mini-Circuits society [25]. The second amplifier HMC311ST 89 is from Hittite society [26]. The employed amplifiers characteristics are given in Tab The measured transmission responses versus frequency of these amplifiers are depicted in Fig Their placements in the receiver are depicted in Fig Implementation of LNAs on ICs Uniform performance specifications must be satisfied across the entire 3.1 to 10.6 GHz UWB band. The LNA must feature wide-band input matching to a 50 Ω antenna, flat gain over the entire bandwidth, good linearity, minimum possible noise figure, re-

72 40 MB-OOK Transceiver Architecture and Link Budget Realization Mini-Circuits ERA-2SM Hittite HMC311ST89 Frequency DC 6 GHz Technology InGaP Gain db db NF < 3 db db P1dB dbm dbm Table 2.2: Characteristics of the employed surface-mounted amplifiers. db( S(2,1) ) db( S(1,2) ) m1 m2 db( S(2,1) ) db( S(1,2) ) m1 m2 m1: freq = 3.1 GHz db( S(2,1) ) = 12.7 m2: freq = 4.1 GHz db( S(2,1) ) = m1: freq = GHz m2: freq = 5.1 GHz -30 db( S(2,1) ) = 13.5 db( S(2,1) ) = Frequency (GHz) Frequency (GHz) (a) (b) Figure 2.16: Measured transmission responses versus frequency for the (a) Mini- Circuits ERA 2SM LNA and (b) Hittite HMC311ST 89 amplifier. duced size and low power consumption. Many BiCMOS LNA architectures for UWB applications were reported in the literature [27]-[31]. A LNA in 0.13 µm CMOS technology for UWB front-ends is presented in [32]. It has a peak gain of 11.3 db with a 3-dB bandwidth over the entire 3.1 to 10.6 GHz UWB band and a 3 db noise figure (NF). It consumes only 4.8 mw. Many amplification stages can be used in order to reach the required gain level for the adopted MB-OOK architecture UWB antennas An antenna is a transducer that converts guided electromagnetic energy in a transmission line to radiated electromagnetic energy in free space and vice versa. It acts as a transitional structure between the guiding device and the free space. It may also be viewed as an impedance transformer, coupling between an input or line impedance, and the impedance of the free space [33]-[34]. The power spectral density authorized by the FCC is limited to dbm/mhz which means that it is important to take advantage of each db in an UWB system. Thus, an effective UWB antenna is a critical part of an overall UWB system design. Traditional UWB antennas are typically multi-narrowband antennas. Nevertheless, A UWB system requires an antenna capable of receiving a signal across the entire operating bandwidth. Thus, antenna

73 2.3 MB-OOK transceiver architecture 41 Figure 2.17: The pattern of a constant gain antenna remains fixed with increasing frequency (top), while the pattern of a constant aperture antenna narrows and gain increases with increasing frequency (bottom) [33]. behavior and performance must be consistent and predictable across the entire band. A UWB antenna is preferentially non-dispersive, having a fixed phase center, but for the MB-OOK architecture, this constraint can be relaxed. Antennas may be classified as directional or non-directional. Compared to an omni-directional antenna, directional antennas have a narrower field of view, and a higher gain where the emitted energy is concentrated to a narrower solid angle (see Fig. 2.17). Also, they are relatively larger in size. In this case, transmitted power must be reduced to meet the same regulatory limit for peak power. This can potentially reduce clutter and enhance overall system performance or capacity. A UWB antenna must be specifically tailored in both impedance and spectral response to contribute to the overall system performance [33]-[34]. It requires a more elaborated approach compared to the case of traditional narrowband systems. The communication between a transmitting and a receiving antenna can be described by the Friis formula: P RX = P T X G T X G RX λ 2 (4πr) 2 = P T X G T X G RX c 2 (4πr) 2 f 2, (2.25) where P RX is the received power, P T X is the transmitted power, G T X is the transmit antenna gain, G RX is the receive antenna gain, λ is the wavelength, f is the frequency, c is the speed of light, and r is the range between the antennas. In Friis formula, power and gain will be functions of frequency [35]. Thus, in the ultra-wideband case, Friis formula must be interpreted in terms of spectral power density: dp RX = c2 (4πr) P 2 T X(f) G T X(f)G RX (f), (2.26) f 2 where the product P T X (f)g T X (f) is the effective isotropic radiated power (EIRP), and (4πrf/c) 2 is known as path loss. The 1/f 2 dependence enters in this expression because of the definition of antenna gain and antenna aperture which are relied by the following expression: G(f) = 4πA(f) λ 2 = 4πA(f)f 2 c 2, (2.27)

74 42 MB-OOK Transceiver Architecture and Link Budget Realization Tx antenna: Omni-directional Rx antenna: Omni-directional TX Power Antenna Gain EIRP FCC mask Antenna Gain Received Power f f f Includes 1/f 2 «path loss» Tx antenna: Omni-directional Rx antenna: Directional f Rolls off as 1/f 2 f TX Power Antenna Gain EIRP FCC mask Antenna Gain Received Power f f f Includes 1/f 2 «path loss» f Increases as f 2 f Higher than Omni Rx Tx antenna: Directional Rx antenna: Directional TX Power Antenna Gain EIRP FCC mask Antenna Gain Received Power f Rolls off as 1/f 2 f Increases as f 2 f Includes 1/f 2 «path loss» f Increases as f 2 f Higher than Omni Rx Figure 2.18: The relationship between antenna directivity and link performance for an omni TX to omni RX (top), an omni TX to directional RX (middle) and a directional TX to directional RX (bottom). where A(f) is the antenna aperture which is the effective area of the antenna. The maximum possible antenna aperture approximately equals the physical aperture plus an additional λ/(2π) strip around the periphery of the antenna. An omni-directional antenna is typically designed to have a constant gain. Its aperture remains constant in units of wavelength. As the frequency increases, this aperture rolls off as 1/f 2. Conversely, most directive antennas have a constant aperture which remains fixed with frequency. As frequency increases, the size of this aperture in units of wavelength increases as f 2. This narrows the pattern and increases the antenna gain as f 2 (see Fig. 2.18). During a communication and at the reception, this directional antenna characteristic cancels out the 1/f 2 roll-off caused by the path loss and yields a flat received power in band [33]. Another potential advantage of directive antennas relative to omni-directional antennas is their ability to isolate signals arriving in a particular direction. Thus, this can be useful in determining the angle of arrival signals. To realize a demonstration for the proposed UWB transceiver, conical monopole and horn antennas shown in Fig were used [36]-[37]. These antennas were offered by the Institute of Electronics and Telecommunications at Rennes (IETR) Laboratory. They are broadband covering the frequency range from 1 to 18 GHz. They are designed for both indoor and outdoor applications. The conical monopole antenna has a gain of about 2 dbi at 3 GHz. The gain, the Voltage Standing Wave

75 2.3 MB-OOK transceiver architecture 43 (a) (b) Figure 2.19: Wideband antennas: (a) omnidirectional: conical monopole [36] and (b) directional: double-ridged waveguide horn [37]. Frequency (GHz) Gain* (dbi) VSWR *for 25 elevation Table 2.3: Typical VSWR and Gain of the conical monopole antenna [36]. Ratio (VSWR) and the half power beamwidth parameters of the horn antenna are depicted in Fig Also, the typical gain and VSWR of the conical monopole antenna are presented in Tab Compact UWB antennas As attractive compact, integrable UWB antenna candidates, printed wide slot antennas have drawn more attention. Compact UWB antennas was investigated and reported in literature [38]-[40]. The realized antenna must be conform to the requirements of UWB high data rate communication systems in term of reduced size. A frequency notched UWB fractal printed slot antenna was realized in [40]. Its size is reduced drastically by employing a fractal shaped slot, and the total volume of the antenna is mm 3. Also, frequency notched function is achieved in order to avoid interfering with other nearby communication systems such as 5-GHz-band WLAN systems. For the MB IR-UWB communication system, a sub-band can be turned off in order to avoid interference with other systems at the emission. However, frequency notched antennas can be useful at the reception. The realized antenna has an operation bandwidth from 2.85 to 12 GHz, in which a frequency notched band from 4.65 to 6.40 GHz may be achieved. Relatively stable, omnidirectional radiation performance over the entire frequency range has also been obtained. The antenna was fabricated on a thin dielectric substrate with low relative permittivity ɛ r = 2.65, loss tan δ of 0.001, and thickness h = 1 mm. The photograph of some fabricated antenna s prototype proposed in [40] and their simulated and measured gain are shown in Fig

76 44 MB-OOK Transceiver Architecture and Link Budget Realization B) n (db Gain SWR VS Frequency (GHz) Frequency (GHz) (a) E plane H plane (b) egree mwidth (de ower beam alf po Ha s) Frequency (GHz) (c) Figure 2.20: (a) Gain, (b) VSWR and (c) half power beamwidth of the directional antenna shown in Fig. 2.19(b) [37]. 2.4 Link budget realization for IR-UWB MB-OOK transceiver The main objective of these measurements is to realize a realistic link budget that will permit us to estimate the signal level at the input of the detector presented in the last chapter. Also, the characteristic of the different stages of the receiver will permit us to calculate the noise figure of the receiver and the global amplification level before the pulse detection stage. The measurements were carried out at Mitsubishi Electric R&D Centre Europe laboratory, which is a typical environment (radio frequency equipment, computers, tables, chairs, metallic cupboard, glass windows,...) rich in reflective and diffractive objects. The photography of the transceiver s components except antennas are depicted in Fig Fig shows the architecture of the transceiver set up in order to realize the functional tests. First, a UWB pulse is generated via a commercial monocycle pulse generator. Then, the generated pulse is passed through the filter bank, and it is simultaneously split into four sub-bands to permit an OOK modulation on each one. Finally, the modulated pulses are recombined, amplified and sent

77 2.4 Link budget realization for IR-UWB MB-OOK transceiver 45 (a) (b) Figure 2.21: (a) Photograph of some fabricated omnidirectional UWB antenna s prototypes and its (b) simulated and measured gain [40]. via the UWB antenna. The power level of the transmitted pulse is with respect to the FCC mask (see Sec. 2.2). On the receiver side, a broadband bandpass filter is featured after the antenna in order to compensate possible intermodulation effects. The following blocks consist on LNA stages as explained in a previous section and shown in Fig Then, a specific filter bank with no power division effect, splits the signal into four sub-bands (the same as for the transmitter) (see Fig. 2.8 and Fig. 2.9). From the pulse generator Demultiplexer and Multiplexer l To the scope Demultiplexer Amplification stages Attenuator Figure 2.22: Photography of the transceiver s components used for measurements.

78 46 MB-OOK Transceiver Architecture and Link Budget Realization Digital Data Outputs B 1 B 1 antenna UWB Tx UWB Rx antenna B 1 1 neration Pulse Gen B 2 B 3 B 2 B 3 PA Power amplifier BP filter LNA B 2 2 B 3 3 B 4 B 4 B 4 4 Filter bank Filter bank Filter bank (a) (b) Figure 2.23: (a) Transmitter and (b) receiver architecture conceived for the functional tests realized in real indoor environment Configurations description Two types of wideband antennas were employed in this study (omnidirectional and directional in different configurations). The directional antennas have a relatively flat frequency response over the band of interest (3.1 to 4.2 GHz). However, the gain of the directional antenna increases as f 2 as frequency increases (see Fig. 2.20(a)). Measurements are performed for both Line-Of-Sight (LOS) and Non Line-Of-Sight (NLOS) short-range indoor communications. Also, the antennas were vertically polarized. Three antenna s configurations were examined (omnidirectional to omnidirectional, omnidirectional to directional and directional to directional) as shown in Fig with different ranges between the transmitting and the receiving antennas (1m, 2m and 3m). The antennas were fixed on a mast at 1 m above the ground on a horizontal linear grid Measurement results As we described in the first section of this chapter, the signal amplitude of the generated pulse and the repetition time were regulated in order to fit with the FCC mask at the emission. The time domain waveform of the signal at the output of the pulse generator is shown in Fig After passing twice through the filter bank and when switching ON the four sub-bands during the modulation stage, the generated pulse will have the form depicted in Fig Fig shows the measured time-domain waveform at the output of the first sub-band of the GHz quadriplexer when using a cable to connect the transmitter and the receiver. For first measurements, we did not consider the channel and the antennas in order to allow later the evaluation of their effects on the delay spread of the transmitted pulse. During communication, the transmitted signal will pass three times through the filter of the concerned subband. Fig. 2.26(a) and Fig. 2.26(b) show the measured transmission responses

79 2.4 Link budget realization for IR-UWB MB-OOK transceiver 47 5 ns/div 50 mv/div 1 GHz/div Figure 2.24: Measured time-domain waveform and FFT at the output of the second transmitter s filter bank. PG-demux-mux-cable1dBAtt-demux-Attcable2dB-F1 20 mv/div 20 ns/div GHz filter Figure 2.25: Measured time-domain waveform at the first sub-band output of the GHz quadriplexer for a wire link. Transmi ssion (db B) m m2 m m1: freq = GHz -80 db( S(2,1) ) = 5.49 m2: freq = GHz db( S(2,1) ) = m3: freq = GHz db( S(2,1) ) = Frequency (GHz) (a) B) ssion (db Transmi F1 F2 F3 F Frequency (GHz) (b) Figure 2.26: Measured transmission responses versus frequency for the (a) demultiplexer and multiplexer and (b) with the de-multiplexer of the receiver s filter bank. versus frequency for the transmitter (see de-multiplexer and multiplexer depicted in Fig. 2.23(a)) and the transceiver (see de-multiplexer, multiplexer and de-multiplexer depicted in Fig. 2.23(a) and Fig. 2.23(b)), respectively. It can be deduced that at the reception the stop-band rejection between sub-bands is higher than 25 db. The measured total amplification level at the input of the receiver conceived for measurements issue has a value of about 38 db (see Tab. 2.4). However, the amplification level that will be achieved in the final version of the proposed UWB communi-

80 48 MB-OOK Transceiver Architecture and Link Budget Realization cation system will be higher than 60 db. The noise factor of the receiver is calculated from the Friis formula and has a value of about 4.07 db. Power gain (db) Noise figure (db) Bandpass filter Amplification stage De-multiplexer Passive balun Table 2.4: Measured characteristics of different stages of the receiver. Measurements in LOS configurations The results of measurements at the outputs of the quadriplexer are presented in Fig. 2.27(a) for a link at 3 m with omnidirectional antennas at both emission and reception. As we can observe from Fig. 2.27(a) and Tab. 2.5, the delay spread is about 30 ns for the first sub-band with a range of 3 m (if we consider that the received energy within the time spread corresponds to 85 % of the total energy). However, when adopting the directional antennas at both emission and reception, the delay spread decreases significantly as it can be seen in Fig. 2.27(b). It is about 11 ns for the first sub-band (see Tab. 2.5). In accordance with Fig. 2.18, we compared between the use of directional and omnidirectional antennas. Results of measurements for the first and the third sub-bands of the quadriplexer at the reception are presented in Fig The directional antennas have the advantage of concentrating the transmitted energy to a narrower solid angle, and thus they will have the effect of reducing the delay spread of the received signal. Another advantage is that the gain of the directional antennas increases as f 2. This will cancel the 1/f 2 roll-off caused by the path loss. Configuration Omni. to Omni. Omni. to Direct. Direct. to Direct. Range (m) st sub-band nd sub-band rd sub-band th sub-band Table 2.5: Delay spread (ns) for 85% of received energy as a function of the distance and for different transmission configurations. To evaluate the stop-band rejection of the filter bank, we realized a simultaneous transmission of codes and on respectively the first and the second sub-bands. The architecture of the MB-OOK modulator used for these tests is described in [23]. Fig shows the measured time-domain waveforms at the first

81 2.4 Link budget realization for IR-UWB MB-OOK transceiver 49 PG-demux-mux-15dBAtt-PA36dB-omni-3m-omni-53dBLNA-demux-Fi PG-demux-mux-21dBAtt-PA36dB-direct-3m-direct-53dBLNA-demux-Fi 20 mv/div 100 mv/div 20 ns/div GHz filter 20 ns/div GHz filter 50 mv/div 100 mv/div 20 ns/div GHz filter 20 ns/div GHz filter 20 mv/div 100 mv/div 20 ns/div GHz filter 20 ns/div GHz filter 20 mv/div 100 mv/div 20 ns/div GHz filter 20 ns/div GHz filter (a) (b) Figure 2.27: Measured time-domain waveforms at the outputs of the GHz quadriplexer: (a) for a link with omni-directional antennas and (b) for a link with directional 1: PG-demux-mux-21dBAtt-PA36dB-direct-3m-direct-53dBLNA-demux-F1 antennas, at both emission1: PG-mux-PA36dB-Att5dB-direct-LOS-3m-direct-2gain-proto-mux-ch3 and reception with a range of 3 meters. 2: PG-demux-mux-PA36dB-cable4dBAtt-omni-3m-direct-33dBGain-demux-Attcable2dB-F1 2: PG-mux-PA36dB-omni-LOS-3m-direct-2gain-proto-mux-ch3 3: PG-demux-mux-15dBAtt-PA36dB-omni-3m-omni-53dBLNA-demux-F1 3: PG-mux-PA36dB-omni-LOS-3m-omni-2gain-proto-mux-ch3 Tx antenna: Directional Rx antenna: Directional 100 mv/div Tx antenna: Directional Rx antenna: Directional 50 mv/div ns/div Tx antenna: Omni-directional Rx antenna: Directional 40 mv/div 2 20 ns/div Tx antenna: Omni-directional Rx antenna: Omni-directional 20 mv/div 3 10 ns/div Tx antenna: Omni-directional Rx antenna: Directional 50 mv/div In reality: 10 mv/div 10 ns/div Tx antenna: Omni-directional Rx antenna: Omni-directional 50 mv/div 20 ns/div (a) 10 ns/div First sub-band : GHz filter (b) Third sub-band : GHz filter Figure 2.28: Measured time-domain waveforms at the (a) first and (b) third sub-band output of the (a) GHz quadriplexer for 3 transmission configurations with a range of 3 meters. two sub-bands outputs of the quadriplexer for a link with directional antennas at both emission and reception with a range of 1 meter. Measurements in NLOS configurations In this part, we study the characteristics of a transmitted pulse via directional and omnidirectional antennas in a real environment with both LOS and NLOS config-

82 50 Tx-F1-F2-cableAtt2dB-Att5dB-direct-1m-direct-cableAtt5dB-Rx-F2-Att5dB-Ampli10dB-DSO MB-OOK Transceiver Architecture and Link Budget Realization Transmitted code via 1 st sub-band: mv/div 100 ns/div GHz filter Transmitted code via 2 nd sub-band: mv/div 100 ns/div GHz filter Figure 2.29: Simultaneous acquisition: measured time-domain waveforms at the first two sub-bands outputs of the GHz quadriplexer for a link with directional antennas at both emission and reception with a range of 1 meter and a specific transmitted code for each sub-band. urations. The four LOS and NLOS configurations for respectively, directional and omnidirectional antennas, are described in Fig As we know, a directional antenna has a potential advantage of radiating in a particular direction within a solid angle. In the previous section, it was proved that this will have the effect of reducing the delay spread of the transmitted signal. Our objective here is to investigate this potential advantage of directional antennas with NLOS configurations. Fig presents the measured time domain waveforms at the third sub-band output of the quadriplexer for the configurations described in Fig We can observe that the delay spread in the case of directional antennas (T d 10 ns) is reduced by more than three to four times compared to the case where omnidirectional antennas (T d 35 ns) are employed. The calculated delay spread corresponds to 85 % of the received energy. This shows the benefit from using directional antennas which can increase the data rate of the system. In addition, directional antennas have the ability to isolate signals arriving in particular direction. Thus, this can be useful in determining the angle of arrival signals. Therefore, it can be possible to replace an omnidirectional antenna by a number of directional antennas each one covering a particular direction. This means that depending on the direction, it is possible to communicate with two or more terminals at the same time with the same system capacity communicating with only one terminal. The results presented in Tab. 2.6 are issued from the realized link budget presented before. They show that the directional antennas have the advantage of increasing the data rate of the communicating system by reducing the pulse repetition time T r. 2.5 Conclusion and prospects A theoretical link budget was studied. The signal level at both emission and reception was estimated referring to the FCC regulation and as a function of the central fre-

83 2.5 Conclusion and prospects 51 LOS NLOS config1 LOS NLOS config1 Tx Antenna RxAntenna Tx Antenna Tx Antenna RxAntenna 16m m m 0.5 m 1 m 0.5 m Rx Antenna 3 m Tx Antenna Rx Antenna NLOS config2 Metallic cupboard NLOS config3 1.6 m 1.7 m NLOS config2 1 m 2 m Rx Antenna NLOS config3 1 m 2 m 1 m Rx Antenna 1.5 m Tx Antenna Rx Antenna 0.5 m Tx Antenna Tx Antenna Tx Antenna Rx Antenna (a) (b) Figure 2.30: LOS and NLOS configurations for measurements with (a) directional antennas and (b) omnidirectional antennas. 1: PG-mux-PA36dB-direct-1m-direct-mux-ch3 2: PG-mux-PA36dB-direct-NLOSpos1-1m-direct-mux-ch3 1: PG-mux-PA36dB-Attcable-omni-LOS-3m-omni-2gain-proto-mux-ch3-.jpg 2: PG-mux-PA36dB-Attcable-omni-NLOS-2p6m-omni-2gain-proto-mux-ch3-.jpg 3: PG-mux-PA36dB-direct-NLOSpos2-1m-direct-mux-ch3 4: PG-mux-PA36dB-direct-NLOSpos3-1m-direct-mux-ch3 3: PG-mux-PA36dB-Attcable-omni-NLOS-3m-omni-2gain-proto-mux-ch3-.jpg 4: PG-mux-PA36dB-Attcable-omni-NLOS-4m-omni-2gain-proto-mux-ch3.jpg 1 Tx antenna: Directional Rx antenna: Directional LOS 200 mv/div 1 10 ns/div Tx antenna: Omnidirectional Rx antenna: Omnidirectional In Reality 20 mv/div LOS 20 mv/div 20 ns/div 2 NLOS - config 1 10 ns/div 50 mv/div 2 NLOS - config 1 5 mv/div 20 ns/div 20 mv/div In reality: 100 mv/div 3 NLOS - config 2 50 mv/div NLOS - config 2 5mV/div 3 20 mv/div 10 ns/div 20 ns/div NLOS - config 3 50 mv/div NLOS 5 mv/div - config 3 20 mv/div ns/div 20 ns/div Third sub-band Third sub-band (a) (b) Figure 2.31: Measured time-domain waveforms at the third sub-band output of the GHz quadriplexer for 4 transmission LOS and NLOS configurations described in Fig for (a) directional antennas and (b) omnidirectional antennas at both emission and reception. quency and the range between antennas. Realistic functional tests of the transceiver were realized in a real environment. Prototypes realized at Mitsubishi Electric and antennas offered by IETR laboratory were employed. The results of these measurements gave us an important information about the signal level at the input of the

84 52 MB-OOK Transceiver Architecture and Link Budget Realization Configuration Omni. to Omni. to Direct. to Omni. Direct. Direct. Bandwidth (MHz) Number of sub-bands T r Data rate (Gbps) Table 2.6: Data rate for different transmission configurations and a range of 3 m. pulse detector. Also, the information on the global amplification level and the noise figure of the receiver permit to evaluate the noise performance of the pulse detector. A comparison between omnidirectional and directional antennas was investigated. The directional antennas have the advantage of canceling out the 1/f 2 roll-off caused by the path loss and yielding a flat received power in band. Also, due to their narrower field of view, the delay spread of the received signal is reduced three to four times when using directional antennas at both emission and reception. Therefore, it is advantageous to employ directional antennas instead of omnidirectional ones. This was proven in both LOS and NLOS configurations and when the directional antennas are properly oriented to each other (see Fig and Fig. 2.31). To attain this suitable orientation in NLOS configurations, the transceiver must be able to adjust the antennas radiations in order to achieve a best signal transmission. For the receiver, this step passes through the search of a proper arrival angle with a maximum transmitted energy. This technique requires applying an angular diversity. Smart antennas could be used to improve the efficiency of wireless transmission. A smart antenna is a system involving multiple antenna elements and a signal processor (usually digital) to adjust the radiation. The three main types of smart antenna are: switched lobe, dynamically phased array and adaptive array. Also, we note that the half power beamwidth of the used directional antennas is higher than 50 in the GHz band (see Fig 2.20(c)). This means that the directional antennas do not need to have high directional characteristics to be advantageous compared to omnidirectional antennas.

85 Chapter 3 Performance of the Adopted Energy-Based UWB System Contents 3.1 Introduction Statistical model for UWB channel Path loss model IEEE a multipath model for HDR applications Channel effects evaluation Statistical characterization of the received signal Statistical characterization of the energy of the received signal Performance of the proposed IR-UWB system Channel capacity evaluation Numerical applications Conclusion

86 54 Performance of the Adopted Energy-Based UWB System 3.1 Introduction During the standardization procedure for high-speed UWB communication systems, different solutions were proposed. Among all of the various transmission techniques, the IR-UWB modulation showed a remarkable efficiency. Two categories of receiver strategy were then envisaged. The first one is based on a perfect channel knowledge of resolved paths with optimal coherent receivers [41], [42]. Considering the UWB channel characteristics, these synchronous-based approaches encounter many difficulties to be implemented with low-cost and low-power consumption hardware architectures. Thus, asynchronous methods are favored since they require relaxed synchronization constraints. The method that we adopted is based on IR technique with non-coherent processing. In that case, the OOK modulation appeared to be a suitable candidate since it possesses a good optimality regarding channel capacity [14]. The demodulation is based on a non-trivial energetic threshold comparison [1]. This demodulation principle is duplicated on multiple sub-bands (typically 20) in order to achieve the channel capacity [1], [2]. The main objective of this chapter is to evaluate the performance of the adopted energy-based system when considering the effects of the propagation channel on the received signal. Several studies were realized in order to characterize the statistical behavior of the UWB channel. For this purpose, measurements in indoor environment with both LOS and NLOS configurations using channel sounding techniques were realized in [43]. They focus on the case of non-coherent detection to evaluate the average mutual information of the general binary flashing signaling rates as a function of the channel statistics [44], [45]. Their studies are based on evaluating the number of degrees of freedom as a function of the bandwidth [43], [46]. The considered large bandwidth (> 1 GHz) provides a high temporal resolution and enables the receiver to resolve a large number of paths. Thus, the variations in the received signal power will typically be caused by the shadowing rather than the fast fading. In our study, we are mainly focusing on evaluating the effects of the propagation channel on the statistical distribution of the energy of a received UWB signal. For that, we will take into account the statistical model proposed by the IEEE group for high data rates applications. To understand the effect of the propagation channel on the performance of the system, the essential characteristics and parameters defining this statistical model are rigorously described. This model offers a convenient characterization in order to describe the statistic of either UWB or narrow-band signals at the reception. The main objective is to evaluate the effects of combinations between paths on the statistical distribution of the received signal energy when the signal passes through the channel. Thus, the fading effect will be characterized for energy-based receivers. For this purpose, a new statistical model of the UWB received signal is proposed. The principal parameters included in this model are the bandwidth and the temporal distribution of the received paths within one integration period.

87 3.2 Statistical model for UWB channel 55 The original part of the work presented in this chapter provides an evaluation of the channel capacity related to the proposed model for an energy-based system. This permits including the benefit of an error correction code. Finally, the performance of the proposed system will be evaluated, and a link budget study with a data rate estimation of the communicating system will be provided as a function of the received SNR and the distance. 3.2 Statistical model for UWB channel Path loss model The path loss (PL) is the reduction in power density of an electromagnetic wave as it propagates through space between the emitter and the receiver. It is a major component in the analysis and design of a telecommunication system. It can be generally represented by: P L = P t P r, (3.1) where P t and P r are, respectively, the transmitted and the received signal power. The main purpose of this path loss model is to represent the electromagnetic wave attenuation due to the propagation in the free space. This can be done by simply adopting the free space path loss model based on the Friis transmission formula that can be expressed by: ( ) P L = 1 2 4πdf c, (3.2) G T G R c where G t and G r are, respectively, the gain of the transmitter and receiver antennas, d is the distance between the transmitter and the receiver, f c is the central frequency and c m/s is the light celerity. This path loss model proposes perfectly isotropic antennas; the antennas effects are not taken into account. It permits to establish a link budget analysis in a non-shadowing free space with an AWGN channel. Link budget of the proposed energy-based system on a multipath channel The performance of the system studied in this chapter will be expressed as a function of the mean SNR of the transmitted pulse at the reception. However, the received signal energy depends on the energy of the emitted pulse and the attenuation of the power density related to the propagation in the channel. In this section, we will provide a theoretical link budget as a function of the distance between the emitter and the receiver and the parameters of the statistical IEEE models a [12] and a [52]. The results of this section will be useful at the end of this chapter in order to evaluate the performance of the studied energy-based system as a function of the distance between the transmitting and receiving antennas in both LOS and NLOS configurations.

88 56 Performance of the Adopted Energy-Based UWB System - Energy of the signal at the emission According to the FCC regulation, the expression of the maximum average energy emitted per pulse E T X,m for the adopted OOK modulation was given in the previous chapter. Its expression is: E T X,m = B P RP 2 π ln10 P mean (B mean ) B mean, where B is the bandwidth (defined at 10 db) of the emitted pulse and P RP is the pulse repetition period. The occupied bandwidth B mean is equal to 1 MHz and the maximum average power Pmean(B max mean ) is limited to 75 nw. Thus, the maximum average energy emitted per pulse can be expressed as: - Mean SNR at the reception E T X,m = B P RP. (3.3) The energy of the received signal is obtained as a function of the distance and the energy of the emitted pulse according to the path loss model. In realistic configurations of multipath channels, a general path loss model that includes the frequency and distance dependence is given by: P L(d) = P L 0 ( d d 0 ) n, (3.4) where the reference distance d 0 is set at 1 m, P L 0 is the path loss at the reference distance and n is the path loss exponent. Based on measurements that cover a range from 3 to 28 m and the bandwidth of 2 to 8 GHz in an indoor office environment [52], it was found that the path loss exponent has a value of 1.63 for LOS configurations and 3.07 for NLOS configurations. Considering that the antennas are perfectly isotropic: ( ) 2 4πfc P L 0 =, (3.5) c where f c is the central frequency and c m/s is the light celerity. The average energy of the received pulse can be related to the average energy of the emitted one by the following expression: E RX,m = E T X,m P L. (3.6) Finally, the mean SNR obtained at the reception E RX,m can be expressed as: N ( ) ( ) ERX,m ET X,m = P L 0 10 n log 10 (d). (3.7) N N The bilateral power spectral density of the noise can be expressed as a function of the noise figure of the receiver and the thermal noise: N = N 0 NF, (3.8)

89 3.2 Statistical model for UWB channel 57 where NF is the noise figure of the receiver, N 0 = k T, k = J/K is the Boltzmann s constant and T is the temperature in Kelvin. At ambient temperature (T = 300 K), N 0 = W/Hz. - Link budget results The system can use from 12 to 24 parallelized sub-bands with each having a 10-dB bandwidth from 250 MHz to 500 MHz. The PRP value of each sub-band depends on the environment type. In a LOS configuration with a CM1 channel model, the PRP can have the value range from 20 to 30 ns. However, in a NLOS configuration with CM2 and CM3 channel models, it can attain the values of 40 to 80 ns. Fig. 3.1 presents the path loss at the reference distance (d 0 = 1 m) as a function of the central frequency. For a central frequency f c = 6.85 GHz, the path loss will have a value of db. Figure 3.1: Pathloss at the reference distance (d=1m) as a function of the central frequency. The signal to noise ratio at the reception is depicted as a function of the distance between the transmitting and the receiving antennas in Fig. 3.2 for two cases. The first one is when considering a bandwidth B = 250 MHz with a P RP = 30 ns and the second one is for B = 500 MHz and P RP = 20 ns. The transmitted signal is spread differently when passing through the filter bank according to the bandwidth of the considered sub-band filter. Thus, the PRP value for a signal with a bandwidth of 500 MHz is lower than the one with a bandwidth of 250 MHz IEEE a multipath model for HDR applications The IEEE a task group proposed a UWB channel model that could be used to evaluate the performance of physical (PHY) layer proposals [12]. Since many companies plan on submitting PHY proposals using newly legal UWB frequency spectrum (FCC mask in USA), a new channel model needs to be created so that it would help in

90 58 Performance of the Adopted Energy-Based UWB System (a) (b) Figure 3.2: Signal to noise ratio at the reception as a function of the distance between the transmitting and the receiving antennas in LOS (n = 1.63 and n = 2) and NLOS (n = 3.07) configurations with (a) B = 250 MHz, P RP = 30 ns, and (b) B = 500 MHz, P RP = 20 ns. evaluating the performance of these indoor systems in realistic channels. Based on the clustering phenomenon observed in several channel measurements, the proposed multipath model is derived from the Saleh-Valenzuela model with some modifications. Therefore, a log-normal distribution is adopted for the multipath gain amplitude rather than a Rayleigh distribution and independent fading is assumed for each cluster as well as each ray within the cluster. The discrete time impulse response of the multipath model is given by: h(t) = X α k,l δ(t T l τ k,l ), (3.9) l k where, X represents the log-normal shadowing, α k,l are the multipath gain coefficients of the k th path within the l th cluster, T l is the delay of the l th cluster, i.e. the arrival time of the first path of the l th cluster, and τ k,l is the delay of the k th path within the l th cluster relative to the first path arrival time T l (we note that τ 0,l = 0). The cluster arrival times T l, i.e., the arrival times of the first rays of the clusters, are modeled as a Poisson arrival process. The arrival time of each cluster is an exponentially distributed random variable conditioned on the time of arrival of the previous cluster. The term cluster arrival rate denotes the parameter for the intercluster arrival times, Λ. The distribution of the cluster arrival times, T l, is given by: p(t l T l 1 ) = Λe Λ(T l T l 1 ), l > 0. (3.10) Within each cluster, subsequent rays also arrive according to a Poisson process. The term ray arrival rate refers to the parameter for the intra-cluster arrival times,

91 3.2 Statistical model for UWB channel 59 λ. Typically, each cluster consists of many rays, i.e., λ >> Λ. The ray arrival times, τ k,l, are described by the inter-arrival exponential probability density function: p(τ k,l τ k 1,l ) = λe λ(τ k,l τ k 1,l ), k > 0. (3.11) The multipath gain coefficient of the arrival paths is given by the random variable α k,l = p k,l β k,l, where β k,l is the amplitude of the k th path within the l th cluster (β k,l represents the log-normal fading term), and p k,l is equally likely to take on the values of ±1. The term p k,l is used to account for the random pulse inversion that can occur due to reflections. The mean energy of the amplitude of the arrival path follows an exponential decaying pattern with time. The mean squared value is modeled by: β 2 k,l = β2 (T l, τ k,l ) = β 2 0,0e T l/γ e τ k,l/γ, (3.12) where β 2 0,0 is the average power gain of the first ray of the first cluster. This average power is a function of the distance separating the transmitter and receiver, Γ and γ are power-delay time constants for the clusters and the rays, respectively. These two parameters (Γ and γ) controls the exponential decaying profile of the amplitude of the arrival clusters and rays. Typically, the expected power of the rays in a cluster decay faster than the expected power of the first ray of the next cluster, Γ > γ. A sketch that clarifies the multipath model is given in Fig In narrowband systems, the time ladder is portioned into bins corresponding to the resolution time of the receiver. The number of arrival paths within a bin is high. Thus, the amplitude of each arrival path is assumed to be a Rayleigh distributed random variable. In UWB systems, only few multipath components overlap within each resolvable delay bin, so that the central limit theorem is no longer applicable, and the amplitude fading statistics are no longer Rayleigh. For that, the Rayleigh distribution is replaced by the lognormal distribution. They offer a better approximation when observing the measurement results and comparing them to the constructed model. Finally, the following expressions can be deduced: or, 20log 10 (β k,l ) N (µ k,l, σ σ 2 2), (3.13) β k,l = 10 (µ k,l+n 1 +n 2 )/20, (3.14) where n 1 N (0, σ1) 2 and n 2 N (0, σ2) 2 are independent, and they correspond to the fading on each cluster and ray, respectively. The parameters σ 1 and σ 2 represents the variances in decibel observed on the clusters and rays, respectively. The mathematical expectation of the normal law of Eq. (3.13) is given by: µ k,l = 10 ( ln(β 2 ln(10) 0,0) T l Γ τ ) k,l γ (σ2 1 + σ2)ln(10) 2. (3.15) 20 The total energy contained in the terms {α k,l } is normalized to unity for each real-

92 60 Performance of the Adopted Energy-Based UWB System Average power gain β 0,0 β β 1,0 0,1 β 0,l β kl, T 0 T 1 T l Time τ kl, (a) Average power gain t e Γ t e γ T 0 T 1 T l Time (b) Figure 3.3: A schematic representation of the multipath model. (a) A realization of the impulse response. (b) Exponentially decaying ray and cluster average powers. ization. Thus, the power profile is normalized: L l=1 K α k,l 2 = 1. (3.16) k=1 Finally, the lognormal shadowing of the total multipath energy is captured by the term, X. This shadowing term is characterized as follows: 20log 10 (X) N (0, σ 2 x). (3.17) The IEEE a channel model is characterized by the following 7 key parameters: ˆ Λ, the cluster arrival rate denotes the Poisson process parameter for the intercluster arrival times. ˆ λ, the ray arrival rate, i.e., the arrival rate of path within each cluster, refers to the Poisson process parameter for the intra-cluster arrival times.

93 3.2 Statistical model for UWB channel 61 CM1 CM2 (ns) (ns) CM3 CM4 (ns) (ns) Figure 3.4: Impulse response realizations of the IEEE a UWB channel model for PHY proposal evaluation. ˆ Γ, the cluster decay factor, i.e., the exponential decaying parameter of the average power of the arrival clusters. ˆ γ, the ray decay factor, i.e., the exponential decaying parameter of the average power of the arrival rays. ˆ σ 1, standard deviation of cluster lognormal fading term. ˆ σ 2, standard deviation of ray lognormal fading term. ˆ σ x, standard deviation of lognormal shadowing term for total multipath realization. Four different measurement environments were defined (CM1, CM2, CM3 and CM4). The parameters values and an impulse response realization of each channel model are, respectively, given in Tab. 3.1 and Fig Each one has a group of values of the previous parameters. ˆ CM1: describes a LOS scenario with a separation between TX and RX of less than 4 m.

94 62 Performance of the Adopted Energy-Based UWB System ˆ CM2: describes a NLOS scenario for distances between TX and RX of less than 4 m. ˆ CM3: describes a NLOS scenario for distances between TX and RX 4 10 m. ˆ CM4: describes an environment with strong delay dispersion, resulting in a RMS delay spread of 25 ns. CM1 CM2 CM3 CM4 Λ(1/ns) λ(1/ns) Γ(ns) γ(ns) σ 1 (db) σ 2 (db) Table 3.1: Parameters values for the 4 channel models. 3.3 Channel effects evaluation The main objective of this study is to evaluate the fading effect in the case of UWB signals. Based on the IEEE multipath channel model, a received signal is the result of the convolution of the transmitted signal by the impulse response of a channel realization. A UWB signal will not have the same behavior of a narrow-band signal after passing through the channel. This statistical behavior difference is related to the ratio of the channel delay spread to the temporal support of the transmitted signal. Also, it can be related to the product of the bandwidth of the transmitted signal by the delay spread of the channel. This can mainly be explained by the effects of combinations between paths in the propagation channel. The essential characteristic that will make the difference between the case of UWB and narrow-band signals is that a UWB signal possesses a weak temporal support (duration) compared to the delay spread of the channel. We expect the fast fading effect, peculiar in narrowband systems, to disappear in UWB systems. Thus, the UWB is of great interest in theoretical performances. We provide more supporting evidence by studying the statistical distribution of the energy at the proximity of zero, and unlike narrowband systems, we prove that it does not load this value. This description shows the advantage of a UWB system compared to a narrow-band one. For the same emitted energy in the case of UWB and narrow-band systems, the statistical distribution of the energy at the reception will be fundamentally different. The impact of these energetic profiles (statistical distribution of the energy at the proximity of zero) on the performance of the system can be evaluated (or understood) when we calculate the bit error rate. The mean energy at the reception is the same for a narrow-band system or a UWB

95 3.3 Channel effects evaluation 63 system. The bandwidth of the transmitted signal will not affect the received mean energy. However, it is an important parameter in determining the statistical distribution of the energy at the reception. This will make all the difference between a UWB system and a narrow-band system and will show how the fading effect is determinant on the performance of the system. This kind of study was realized in [16]. As the aim of this study is to initially evaluate the effects of combinations between paths when the signal passes through the channel, we will assume the following effects to be negligible: the effect of the global shadowing and the fading effect on each path which is only modulating the relating amplitude of them, without changing the total contribution which is normalized. Thus, they will not be taken into account in this study. We estimate that their effects will not contribute considerably to the study of the performance of the system. We will propose a simple model which permits to mainly study this problem. The effect of the variations of the bandwidth B and the paths arrival time will be particularly studied. Therefore, this study will provide a solid base to evaluate the performance of the proposed energy-based system and to compare it later with other proposed UWB systems Statistical characterization of the received signal We will consider the category of stationary processes with long observation time compared with the time necessary for the system transients to decay. This hypothesis is extremely convenient because it permit to characterize the processes through the evaluation of the power density spectra [50]. We will study the statistic of the energy of a received pulse based on the variation of several parameters such as the pulse bandwidth and the delay path which is related to the channel nature. For that, the model of interest is: r(t) = s(t) + w(t), (3.18) where s(t) is a sample function from a zero-mean, stationary Gaussian random process, and the additive noise w(t) is a sample function from an independent, zero-mean, white Gaussian process with power spectral density N/2. In the next sections, the hypothesis of the gaussian stationary process will be verified based on the statistical UWB channel model proposed by the IEEE a task group. When considering the statistical multipath model of the UWB channel presented previously, the received signal can be derived from the result of convolution of a gaussian pulse p(t) by the impulse response of the UWB channel. It can be expressed by: L K s(t) = a k,l p(t T l τ k,l ), (3.19) l=1 k=1 where a k,l is the multipath gain including only the essential parameters of the channel. The log-normal shadowing and the fading on each cluster and ray are not taken into

96 64 Performance of the Adopted Energy-Based UWB System account in this study. Therefore, the multipath gain can be given as: a k,l = α k,l + + l=1 k=1 α2 k,l, (3.20) where, α k,l = ɛ k,l β k,l, β k,l = 10 µ k,l 20, µ k,l = 10ln(Ω 0) 10T l /Γ 10τ k,l /γ ln10. Thus, the final expression of the multipath gain can be written as: α k,l = ɛ k,l Ω0 e T l 2Γ e τ k,l 2γ, (3.21) where ɛ k,l is equally likely to take on the values of ±1, Ω 0 is the average power gain of the first ray of the first cluster, Γ is the cluster decay factor and γ is the path decay factor Gaussian assumption verification The received signal is formed by the convolution of a Gaussian pulse with the impulse response of the channel. Several realizations of the received signal were generated in order to evaluate its statistical distribution. To verify that the statistical distribution of the received signal follows a Gaussian distribution, we must verify that α i, t i [0, T ], the function i α is(t i ) follows a gaussian distribution where t i and α i must be fixed once for all the channel realizations. The worst case is attained by selecting only one sample for each channel realization. The results depicted in Fig. 3.5 corresponds to 1000 channel realizations in 4 different scenarios as given by the UWB channel model and for only one sample per channel realization. The results proves that the received signal has a gaussian distribution with a mean of zero Stationarity assumption verification The IEEE channel model does not include the stationary hypothesis. This notion is not verified in the channel propagation model. In our study, we are interested in characterizing the energy of the received signal within a period that is in the order or less of the delay spread. For that, we will include the stationary hypothesis because it is practical to characterize the statistic of the received signal through the covariance matrices. This will not affect the statistical distribution of the energy of the received signal which is our main concern. As the modulation principle is based on energy, for a channel realization, the temporal distribution of the amplitude of the paths in the integration interval is not important and will slightly affect the statistical distribution of the energy of the received signal. This means that the energy of the signal within an interval [0, T [ is not affected by the departure instant of the integration on [0, T [ with the condition of including the periodicity on this time interval. To verify the stationary hypothesis within the integration period and to include the periodicity, it

97 3.3 Channel effects evaluation 65 (a) (b) (c) (d) Figure 3.5: Gaussian distribution verification for (a) CM1, (b) CM2, (c) CM3 and (d) CM4 channel models. will be sufficient to define a random variable θ that will make the signal s(t) periodic within the integration period T. The random variable θ follows a uniform law on the integration interval [0, T [. The corresponding model of the received signal can be written as s(t θ[t ]). Thus, we can assume that for all fixed θ: T 0 s2 (t θ[t ])dt will have approximately the same probabilistic distribution as T 0 s2 (t)dt Study of the channel effects on the signal s statistic The objective of this section is to study the statistical distribution of the received signal energy after passing through the channel. This study points up the practical interest of considering a stochastic modeling of signals when we aim to characterize a set of vast circumstances. In spite of some fundamental simplifications, the general approach that we will consider will lead to relatively complicated mathematical formulations. However, these will be useful to reformulate the problem without corrupting the essence by reducing all descriptive parameters. A deeper study would prove a posteriori that this behavior is not considerably changed when we come back to the

98 66 Performance of the Adopted Energy-Based UWB System general model. To study the performance of the energy-based system, one solution consists on evaluating the Chernoff bound of a filter-squarer-integrator receiver in order to characterize the statistic of the energy of the received signal at the proximity of zero [50], [51]. However, the analytical results obtained in the following sections will permit us to proceed differently. Considering the signal model in Eq. (3.22) and after verifying the Gaussian stationarity assumption of the process, we will proceed as follows. Study of a received signal composed of one cluster and an infinity of paths In order to isolate the effects of different parameters of the channel and to point-out the most essential ones, we will consider that the received signal is composed of only one cluster with an infinity of paths within this cluster. We estimate that the effect of the amplitude variations on the distribution of the received signal energy will be weak compared to the path delay ones. Thus, we will suppose that the amplitude is constant and is the same for all the paths. This is the worst case to identify the effect of combinations between paths which is mainly controlled by the temporal distribution of the paths. However, the problem here is that we must normalize the energy of each arrival path with the energy of all the paths existing in the channel and not only those contained in the integration time interval [0, T [. Therefore, the exponential decaying pattern with time of the arrival path s amplitudes must be included in the model of the received signal. This study passes through the evaluation of the covariance function of the received signal in order to evaluate the power spectral density. This will permit us to evaluate how the essential parameters of the channel will act on the spectral density of the signal after passing through the channel. The model of the received signal is: s(t θ[t ]) = + k=1 a k p(t τ k θ[t ]), (3.22) where a k is the multipath gain including only the essential parameters of the channel and τ k is the delay of the k th received path. The random variable θ follows a uniform law on the integration interval [0, T [. This random variable has the role of keeping the process stationary within the period T. The log-normal shadowing and the fading on each ray are not taken into account. We consider that this will not change the generality of the results obtained at the end of this study. Therefore, the multipath gain can be given as: α k a k = +, (3.23) k=1 α2 k where α k = ɛ k Ω0 e τ k 2γ and the parameters ɛk = ±1 are equiprobable and define the polarity of the paths due to reflections. The total energy contained in the terms α k is normalized to unity for each realization. Then, the covariance of the received signal

99 3.3 Channel effects evaluation 67 s(t) can be expressed as: K s ( t) = E{s(t θ[t ]).s(t + t θ[t ])}. (3.24) The details of the theoretical study are described in App. A.1, the covariance function is finally expressed as: { } + e (λt ) K s ( t) = (n 1)! (λt e τ 1 t2 γ µ e 2 π )n E /n + τ k i=1 k=1 e γ T 2µ. (3.25) The power spectral density is defined as the Fourier transform of the covariance function in the case of stationarity. Thus, { } + e (λt ) P SD s (f) = F T (K s ( t)) = (n 1)! (λt e τ 1 γ πe 2 µ (πf)2 )n E /n +. (3.26) τ k i=1 k=1 e γ µt Study of a received signal composed of L clusters and K paths within each cluster The next case consists on enriching the signal model by considering many clusters and many paths within each cluster. Thus, the received signal model can be expressed as: L K s(t) = a k,l h(t T l τ k,l ), (3.27) with, l=1 a k,l = k=1 α k,l + + l=1 k=1 α2 k,l, (3.28) where α k,l = ɛ k,l Ω0 e T l 2Γ e τ k,l 2γ, L and K are, respectively, the number of clusters and paths within each cluster with an integration period T (we consider that L and K are two independent random variables). To estimate the covariance function and the PSD of the received signal, we proceed with the same theoretical procedure as for the case of a signal composed of one cluster. Thus, the covariance function is: K s ( t) = + e (ΛT ) l=1 l l! (ΛT ) l { k E /{l,k} + e (λt ) k=1 k! (λt ) k e T i Γ e τ j,i γ + + T i=1 j=1 i=1 j=1 e i Γ e τ j,i γ Then, the power density spectrum of the received signal is: P SD s (f) = + e (ΛT ) l=1 l i=1 l! (ΛT ) l { k E /{l,k} j=1 + e (λt ) k=1 + i=1 k! (λt ) k e T i Γ e τ j,i γ + T j=1 e i Γ e τ j,i γ t2 β }e 2 π 2T 2µ. (3.29) }πe 2 β (πf)2 2µT. (3.30)

100 68 Performance of the Adopted Energy-Based UWB System Analysis and problem reformulation From the established relations of the power density spectrum as a function of the channel parameters, we can deduce that the behavior of the power spectral density of the received signal can be approximated by a white gaussian noise process within the considered bandwidth. The most important characteristics to take into account are the temporal distribution of the paths in the integration time interval [0, T [ and the bandwidth of the generated pulse. From this statement, we will reconstruct a simple model of the received signal that will include the essential characteristics of the channel. The fact of considering a model with only one cluster will not alter the problem. Also, we will take the advantage of an important property of the Poisson process which controls the arrival time of clusters and paths within each cluster. This model can be enriched later by considering many clusters and including the exponential decaying of the paths. However, this will not change considerably the results of this study Proposed statistical model for the received signal In this section, we propose a new simple model of the received signal composed of only one cluster within an integration time interval [0, T [. The main objective of this model is to evaluate the effect of combinations between paths in the propagation channel. Essentially, it takes into account the temporal distribution of the paths and the bandwidth of the generated pulse B. According to the statistical model of the channel presented at the beginning of this chapter, the path arrival times are modeled as a Poisson arrival process. An important property of the Poisson process is that if we fix in advance the number of paths within a time interval [0, T [, the temporal distribution of these paths follows a uniform distribution within this time interval. Therefore, a simplified model of the received signal within a time interval [0, T [ can be derived. In this time interval, we will assume that the signal verify a Gaussian stationary process. This new model does not include the log-normal shadowing and the fading on each path. Also, the energy of each path will be normalized according to the number of the considered paths within the integration time interval [0, T [. Thus, this new model can be expressed as: s L (t θ[t ]) = L i=1 ɛ i L p(t θ[t ] τ i ), (3.31) where p(t) = Ae t2 /2ρ 2, A = 2/(ρ π), ρ is the parameter defining the bandwidth and ɛ i is equally likely to take on the values of ±1. It is used to account for the random pulse inversion that can occur because of reflections. L is a random variable that follows a Poisson law. It denotes the number of arrived paths on the time interval [0, T [. θ is a random variable used to include the periodicity within a period T. It follows a uniform law on [0, T [. τ i denotes the path arrival times. It follows a uniform law on [0, T [ when conditioning by the number of arrived paths on [0, T [. The energy of the generated model is normalized to unity for each realization. Thus, the term

101 3.3 Channel effects evaluation 69 L = 1 L = 5 L = 10 Figure 3.6: An illustration of a generated received signal based on the proposed model for different values of the number of paths L. 1/ L appears in Eq An illustration of the received signal for different values of the number of paths within the integration period [0, T [ is depicted in Fig Statistical characterization of the energy of the received signal In this section, we are interested in the statistic of a function of the received signal which is the energy. Thus, we reduce its characterization to a representative scalar value, because through this quantity we can evaluate the performance of the system. The general form of the probability law of the energy of the received signal is the Chisquare. This hypothesis is justified by the fact of evaluating the energy (integration within a period T after applying a square law) of a Gaussian signal. The principle of the adopted asynchronous approach based on energy detection was described in Chapter 1. Thus, it is sufficient to determine a little number of characteristic parameters. In this study, we will reproduce the reasoning applied in the case of a signal with a fixed energy to evaluate the characteristics of the energy of a received signal after passing through the channel Evaluation of the central Chi-square distribution s parameters In this section, we aim at estimating the parameters of the central Chi-square distribution as a function of the channel parameters (essentially, the bandwidth B and the number of the received paths N paths within the integration time T ). The Chi-square distribution parameters are the number of degrees of freedom n and the variance σ 2. The study will be based on the proposed received model presented previously.

102 70 Performance of the Adopted Energy-Based UWB System Let us consider the problem of evaluating the performance of communication systems composed of a low-pass filter, a squarer and an integrator (see Fig. 3.7). x(t)=β 2 s 2 (t) s in (t) T L1 h 1 T L2 s(t) x(t) y(t) T g h 2 Low-pass filter Squarer Integrator Figure 3.7: The studied energy-based system with a zero-memory quadratic rectifier and filter. The input signal has the characteristics of a stationary gaussian process. The signal is first passed through a stable linear (invariant) filter, whose output is also a stationary normal process. The output is next passed to a zero-memory squarelaw device and finally through another filter (usually low-pass). At the input of the square-law device, the signal can be expressed by the proposed model of the received signal defined in a previous section, thus, with, s(t θ[t ]) = = L i=1 L i=1 ɛ i L p(t θ[t ] τ i ) 2 A = ρ π, and, ρ = ɛ i L Ae (t θ[t ] τ i) 2 /2ρ 2, ln10 πb, where B is the bandwidth. At the output of the integrator, the received energy is a random variable following a chi-square distribution with a mean C T = nσ 2 and a variance D T = 2nσ 4. The mean C T can be expressed as: and the variance D T is given by: D T = 2β 4 T 0 T C T = ψβ 2 h 2 (t)dt, (3.32) T 0 0 h 2 (t 1 )K 2 s ( t 1 t 2 )h 2 (t 2 )dt 1 dt 2, (3.33) where K s is the covariance function of s(t), and ψ is the intensity of the same process (ψ = K s (t, t) t). These expressions were introduced in the case of a Gaussian

103 3.3 Channel effects evaluation 71 approximation for a Chi-square probability density [47]. Considering the proposed model of the received signal in Eq. (3.31), the covariance function of s(t) is: { } { } K s (t 1, t 2 ) = E s(t 1 ), s(t 2 ) = E s(t), s(t + t) { L ɛ i = E Ae (t θ[t ] τ i ) 2ρ 2 L i=1 2 L j=1 ɛ j 2 2ρ }. 2 L Ae (t+ t θ[t ] τ j ) The details of the theoretical study of the covariance function are described in App. A.2. Thus, the final expression of the covariance function is: K s ( t) = 2 T t 2 e 4ρ 2. (3.34) Thus, ψ = K s (t, t) = K s (0) = 2/T. Then, the mean and the variance of the random variable representing the energy of the received signal can be deduced (see App. A.3): C T = 2β 2, and, D T = 16 πρ 2 β 4 T 2 0 T ρ 2 erf(x)dx, (3.35) where erf(x) is the error function encountered in integrating the normal distribution. It is an entire function defined by: erf(x) = 2 x e t2 dt. π Finally, the parameters of the central Chi-square distribution of the received signal energy can be obtained: and, n = T πρ, (3.36) T 2 ρ 2 0 erf(x)dx σ 2 = 4 πρ 2 β 2 T 2 0 T ρ 2 erf(x)dx. (3.37) From these results we can observe that the main effect on the Chi-square distribution comes from the bandwidth of the generated pulse. Thus, theoretically, it appears that the temporal distribution of the paths within the integration period [0, T [ does not affect the distribution of the received signal energy.

104 72 Performance of the Adopted Energy-Based UWB System Comparison between the theoretical and simulation results To evaluate the validity of the proposed model, a comparison between the theoretical results obtained in the previous section and simulation results was done. Based on the theoretical studies presented in the previous section, Tab. 3.2 and Tab. 3.3 present the calculated parameters of the central Chi-square distribution, respectively, as a function of the considered bandwidth and the number of paths within the integration period. Bandwidth (GHz) σ n C T D T Table 3.2: Chi-square parameters and mean C T and variance D T of the random variable representing the received signal energy as a function of the considered bandwidth for 20 paths within an integration period T = 20 ns. Number of paths σ n Table 3.3: Chi-square parameters as a function of the number of paths within the integration period and for a bandwidth B = 500 MHz. For each channel model, realizations of the received signal (see Eq. (3.31) were generated in an integration period [0,T[. This great number of realizations allows us to built the histogram representing the statistical distribution of the energy of the received signal within the integration period. Fig. 3.8 and Fig. 3.9 show the histograms obtained by simulation of the proposed model of the received signal for, respectively, different values of the considered bandwidth and the number of paths within the integration period (T = 20 ns). The superposed plots correspond to the central Chi-square distributions with parameters estimated theoretically from relations established in the previous section (see Eq. (3.36) and Eq. (3.37)) and

105 3.3 Channel effects evaluation 73 (a) (b) (c) (d) (e) (f) Figure 3.8: Chi-square distribution verification of the energy of the received signal as a function of the considered bandwidth for T = 20 ns, (a) B = 500 MHz, (b) B = 1 GHz, (c) B = 2 GHz, (d) B = 3 GHz, (e) B = 5 GHz, (f) B = 7.5 GHz.

106 74 Performance of the Adopted Energy-Based UWB System (a) (b) (c) (d) (e) (f) Figure 3.9: Chi-square distribution verification of the energy of the received signal for different values of the considered number of paths within the integration period T = 20 ns, (a) N paths = 10, (b) N paths = 15, (c) N paths = 20, (d) N paths = 25, (e) N paths = 30, (f) N paths = 35.

107 3.4 Performance of the proposed IR-UWB system 75 presented in Tab We can notice that the statistical distribution of the received signal energy is mainly affected by the bandwidth of the signal rather than by the temporal distribution of the paths within the integration period T. The model of the received signal take into account the normalization of the energy for each realization. We notice that an increase of the bandwidth of the transmitted signal B (i.e. an augmentation on the number of degrees of freedom n) induces a decrease in the variance D T of the random variable representing the received signal energy. Also, the statistical distribution of the energy at the proximity of zero on Fig. 3.8 is less occupied as the bandwidth is becoming larger. Also, we note that the distribution becomes symmetric around its mean C T = 1. The augmentation on the bandwidth of the transmitted pulses induces a decrease in their widths (we note the relation between ρ, the parameter that defines the width of the pulse, and B the bandwidth, is ρ = ( ln10)/(πb)). Thus, the combination between pulses becomes less important after passing through the channel and therefore, the fading effect is reduced. 3.4 Performance of the proposed IR-UWB system Based on the studies of the statistical distribution of the received signal energy as a function of the channel parameters, we will evaluate the performance of the adopted energy-based system. It was proven in the previous sections that the behavior of the probability density of the received signal energy follows a Chi-square distribution. Also, the parameters of this distribution were calculated as a function of the channel parameters (the bandwidth and the temporal distribution of the paths) Channel capacity evaluation Let us consider a binary-input AWGN memoryless channel based on energy detection with OOK modulation. We will consider that the input X will take on the possible values of 0 or E according to the parameter µ: x = { E with probability µ. 0 with probability (1 µ). (3.38) Thus, the probability density of the input x is given by: p(x) = (1 µ)δ 0 (x) + µδ 0 (x E). (3.39) For any given input sequence, X i, i = 1, 2,..., n, there is a corresponding output sequence, Y i. The condition that the channel is memoryless may be expressed as: p(y 1, y 2,..., y n x 1, x 2,..., x n ) = n p(y i x i ). (3.40) i=1

108 76 Performance of the Adopted Energy-Based UWB System The mutual information provided about the event X = x by the occurrence of the event Y = y is log (p(y x)/p(y)), where, ( ) p(y x = 0) I(X; Y ) = p(x = 0) p(y x = 0)log 2 dy R p(y) ( ) p(y x = E) + p(x = E) p(y x = E)log 2 dy. p(y) R According to Eq. (3.39), for a fixed E, the maximum on p(x) is equivalent to the maximum on µ. Thus, the channel capacity in bit per channel use is expressed as follows: C = max I(X; Y ) µ { = max (1 µ) µ +µ R R ( ) p(y x = 0) p(y x = 0)log 2 dy p(y) ) } dy. (3.41) p(y x = E)log 2 ( p(y x = E) p(y) Also, the probability density of the energy of the received signal is: p(y) = p(y x)p(x)dx = (1 µ) p(y x = 0) + µ p(y x = E), (3.42) R + where p(y x = 0) is the probability density with central Chi-square distribution, p(y x = 0) = 1 ( ) M 1 y e y Nβ 2 Nβ 2 Nβ 2 Γ(M), y > 0, and p(y x = E) is the probability density with non-central Chi-square distribution which depends on the energy of the signal x, denoted discentering parameter E, ) M 1 ) 2, y > 0, p(y x = E) = 1 Nβ 2 ( y E ( e y+e Nβ 2 ye I 2 M 1 Nβ 2 where I n denotes the n th modified Bessel function of the first kind and 2M is the number of degrees of freedom. The details of the theoretical study are described in App. A.4. The channel capacity is expressed as a function of the discentering parameter E, the power spectral density of the noise N and the number of degrees of freedom 2M. We will define, E m = E/2, and u = y/n, where E m is the mean received energy per transmitted bit. Thus, the average mutual information can be written as: ( I(X; Y ) = (1 µ) p 0 (u) log ) 2 ϕ(µ, ϑ{q=snrm}(u)) du R + + µ R + p {E,Q=SNRm}(u) log 2 ( ( )) 1 ϕ (1 µ), du, ϑ {Q=SNRm}(u)

109 3.4 Performance of the proposed IR-UWB system 77 where, p {E,Q} (u) = 1 ( ) M 1 u 2 β 2 2Q e u+2q ( ) β 2 2 I M 1 2uQ, (3.43) β 2 u β 2 p 0 (u) = um 1 e β 2M Γ(M), ϕ(x, y) = 1 (1 x) + xy, (3.44) and, ϑ {Q} (u) = β 2(M 1) Γ(M)I M 1 ( (2Q) M 1 2 u M 1 2 e ) 2 β 2uQ 2 2Q β 2. (3.45) In the channel model described above, the choice of equally probable input symbols maximizes the average mutual information (see Fig. 3.10). Thus, the capacity of the channel is obtained when the input symbols are equally probable (P (x = 0) = P (x = E) = 1/2). Thus, the capacity per channel use as a function of the mean signal to noise ratio SNR m is: C = 1 ( ( )) 1 p 0 (u) log 2 2 ϕ R 2, ϑ {Q=SNR m}(u) du ( ( )) 1 p {E,Q=SNRm}(u) log 2 2 ϕ R 2, 1 du. (3.46) ϑ {Q=SNRm}(u) + Fig and Fig illustrate the channel capacity in bit per channel use as a function of the mean signal to noise ratio at the reception. In Fig. 3.11, the channel capacity is plotted for different values of the signal bandwidth for an integration time value of 20 ns. However, Fig shows the channel capacity as a function of the number of degrees of freedom 2M = 2BT. Fig and Fig illustrate the channel capacity in bit per channel use, respectively, as a function of the bandwidth and the number of degrees of freedom for different values of the mean signal to noise ratio. We notice that the channel capacity evolves differently depending on the signal to noise ratio. For a mean SNR of 12 db and a bandwidth of 4 GHz (point C1 on Fig. 3.13), the channel capacity has a value of about 0.98 bit per channel use. However, if we divide this bandwidth into two separated band of 2 GHz with a mean SNR of 9 db for each one, the channel capacity will have a value of 0.9 bit per channel use for each band. If we repeat this procedure once again, we will obtain four sub-bands with each one having a bandwidth of about 1 GHz, a mean SNR of 6 db and a channel capacity of 0.7 bit per channel use. Therefore, the channel capacity of eight adjacent sub-bands with each having a bandwidth of 500 MHz is as about four times as that with only one bandwidth of 4 GHz. Thus, at a high SNR, it is beneficial to increase the number of sub-bands in order to increase the performance of the system. To conclude, this analysis permit to obtain a proper frequency cut-out of the UWB band in order to reach the highest channel capacity.

110 78 Performance of the Adopted Energy-Based UWB System Figure 3.10: Average mutual information as a function of the parameter µ for B = 500 MHz, T = 20 ns and for different values of the mean SNR at the reception. To evaluate the system performance, we will evaluate the average channel capacity by considering the study of the statistical distribution of the energy of the received signal presented in Sec Thus, the average channel capacity is expressed as: E(C) = C(z)p(z)dz, (3.47) R + where z defines the SNR at the reception, C(z) is the capacity per channel use calculated previously as a function of the SNR at the reception and p(z) is the probability density of the energy of the received signal. The study of the channel effects on the statistical distribution of the energy of the received signal were done when considering a signal at the reception with a normalized energy which is defined as: η = E E m = SNR SNR m, (3.48) where E is the energy integrated during a period T and E m is the total available mean energy. η determines the statistical distribution of the energy at the reception. Thus, p(z)d(z) = p(η)d(η). (3.49) Finally, the average channel capacity is given by: E(C) = C(SNR m η)p(η)dη, (3.50) R + where, η β 2 p(η) = um 1 e β 2M Γ(M), (3.51)

111 3.4 Performance of the proposed IR-UWB system 79 Figure 3.11: Channel capacity as a function of the mean signal to noise ratio (SNR m ) for different values of the bandwidth B for a repetition time of T = 20 ns. and, C(SNR m η) = 1 p 0 (u) log 2 2 R p {E,Q=SNRm η}(u) log 2 2 R + ( ( )) 1 ϕ 2, ϑ {Q=SNR m η}(u) du ( ( 1 ϕ 2, 1 ϑ {Q=SNRm η}(u) )) du. (3.52) Numerical applications Considering the link budget results (Sec ) and the theoretical expression of the average channel capacity (Eq. (3.50)) at a distance of 1 m, we can attain a data rate of 50 Mbps for a sub-band with B = 500 MHz and 33 Mbps for a sub-band with B = 250 MHz, (see Fig. 3.15). The performances of the adopted energy-based system are presented in Tab. 3.4 and Tab The results presented in Tab. 3.4 prove that at a high SNR, it is beneficial to increase the number of sub-bands in order to increase the data rate of the system. The performances of the system were obtained based on the proposed UWB channel models. The parameters of the path loss were obtained from the model a corresponding to an indoor office environment [52]. The utilized parameters of the path loss model were defined to an environment with a range that is higher than that considered in this study. Thus, the loss in energy caused by the propagation in the channel are less important and the environment is more favorable than that defined in the model.

112 80 Performance of the Adopted Energy-Based UWB System Figure 3.12: Channel capacity as a function of the mean signal to noise ratio (SNR m ) for different values of the number of degrees of freedom 2M = 2BT. Figure 3.13: Channel capacity as a function of the bandwidth B for a repetition time of T = 20 ns for different values of the mean signal to noise ratio (SNR m ).

113 3.4 Performance of the proposed IR-UWB system 81 Figure 3.14: Channel capacity as a function of the number of degrees of freedom 2M = 2BT for different values of the mean signal to noise ratio (SNR m ). (a) (b) Figure 3.15: Average channel capacity in Mbps as a function of the distance between the transmitting and the receiving antennas in LOS (n=1.63 and n=2) and NLOS (n=3.07) configurations with (a) B = 250 MHz, PRP = 30 ns, and (b) B = 500 MHz, PRP = 20 ns. During a communication, the signal will pass three times through the filter of the concerned sub-band (de-multiplexer, multiplexer and de-multiplexer). This will have the effect of reducing the interference between sub-band. According to the FCC regulation, the bandwidth is considered at 10 db. The characteristics of a realized quadriplexer, presented in the previous chapter, confirm the feasibility of

114 82 Performance of the Adopted Energy-Based UWB System M Number SNR m (db) Capacity Data rate Total data of bands per band (bit/channel) per band (Mbps) rate (Mbps) Table 3.4: Performance of the energy-based system as a function of M. Channel Model CM1 CM2 CM3 Configuration LOS NLOS NLOS Distance (m) Bandwidth (MHz) PRP (ns) Number of sub-bands Data rate (Mbps) Table 3.5: Performance of the energy-based system for LOS and NLOS configurations. such devices with the targeted bandwidth characteristics. The out-of-sub-band will have an attenuation level of more than 25 db and thus the interference effect between sub-bands will be neglected. The performances of the system were obtained for a receiver with a noise figure having a value of NF = 4.5 db (see Tab. 2.4). The noise level was considered flat in the bandwidth. Thus, the energy of the noise is overestimated regarding the energy of the useful signal. The overestimation on the energy level were evaluated to be of around 2 db when considering a filter with a gaussian response [16]. Considering the studies and the measurement results presented in the previous chapter, the antenna can play an important role in increasing the performances of the system. When using directional antennas instead of omnidirectional ones, we can reduce the effects of two disadvantageous contributions caused by the channel: the 1/f 2 path loss roll-off and the delay spread. The directional antenna characteristic cancels out the 1/f 2 roll-off caused by the path loss and yields a flat received SNR in the band. Also, they have the advantage of concentrating the transmitted energy to a narrower solid angle. Thus, the delay spread of the received signal will be reduced. This will permit to reduce the PRP and thus to increase the system data rate. However, the directional antennas must be properly oriented to each other. To attain this suitable orientation in NLOS configurations, the transceiver must be able to adjust the antennas radiations in order to achieve a best signal transmission. In this case, smart antennas could be used to improve the efficiency of wireless transmission. To conclude, and after considering the measurement results where their realizations are presented in the previous chapter, the PRP can attain a value of around 15 ns

115 3.5 Conclusion 83 enabling a communication with a high data rate of about 1 Gbps at 3 m with 16 sub-bands each one having a bandwidth of 500 MHz. 3.5 Conclusion Based on the transmission of very short transient pulses, the Impulse Radio (IR) technique best complies with the definition of UWB where the spectrum is spread over several gigahertz. Therefore, an asynchronous method of using the UWB spectrum for HDR applications is adopted with the OOK modulation and a non-coherent processing approach. The demodulation is based on a non-trivial energetic threshold comparison. This basic scheme is duplicated on several separated frequency sub-bands (about 16). The study of the performance of a system passes through the evaluation of the effects of the channel on the transmitted signal. In this direction, the studies presented in this chapter are based on the statistical multipath model of the UWB channel proposed by the IEEE a task group. Then, a new model of the received signal was proposed. It takes into account the principal parameters that can affect the received signal (the bandwidth and the temporal distribution of the paths). The statistical characterization of the received signal and that of its energy were given for a system based on energy detection within an integration period. It was proven that the energy of the received signal follows a Chi-square distribution. The parameters of this statistical distribution were evaluated as a function of the bandwidth and the temporal distribution of the paths in the integration period. Also, the theoretical study were compared to the simulation results. The channel capacity was evaluated as a function of the mean SNR for a transmitted bit per channel use. These results permitted us to evaluate the advantage of the frequency demultiplexing approach adopted for the MB-OOK UWB transceiver as a function of the mean SNR at the reception. Based on the performance results, a link budget was established as a function of the mean SNR at the reception and the distance. Thus, the estimated data rate of the system was given for LOS and NLOS configurations. Referring to the measurement results presented in the previous chapter, it was proven that the system performance could be increased when working with directional antennas by reducing the effects of the channel. Due to directional antennas, the delay spread of the transmitted signal can be drastically reduced and the 1/f 2 roll-off can also be canceled. Therefore, the data rate of the communicating system can be considerably increased. This is available when the directional antennas are properly oriented to each other. In addition, the transceiver must be able to adjust the antennas radiations in order to achieve a best signal transmission especially in NLOS configurations. In the next two chapters, we will present the implementation study of an analog pulse energy detector in CMOS technology aimed at operating in the MB-OOK energy-based system. Also, a general overview about the available MMIC technologies will be given and the characteristics of the adopted technology used to test and to evaluate the performance of the studied circuit will be presented.

116

117 Chapter 4 Integrated Circuits Technologies Contents 4.1 Introduction GaAs-based technology Silicon-based technologies Bipolar technology CMOS technology Silicon on Insulator (SOI) substrate technology SiGe HBT BiCMOS technology Comparison between MMIC technologies AMS 0.35 µm SiGe BiCMOS technology Conclusion

118 86 Integrated Circuits Technologies 4.1 Introduction A monolithic microwave integrated circuit (MMIC) is a miniaturized electronic circuit that consists mainly of semiconductor devices and also passive components. It is manufactured in the surface of a thin substrate of semiconductor material. The problem appearing when realizing an IC is related to the adopted technology. Therefore, the choice of the suitable technology is the subject of this chapter. Integrated circuits can be classified into analog, digital and mixed signal where both analog and digital functions can be implemented on the same chip. In this study, we are interested in analog integrated circuits in order to provide an on-chip implementation study of an analog pulse detector involved in the MB-OOK IR receiver for UWB HDR applications. A general overview about the available MMIC technologies will be given. The advantages and the drawbacks of the principal semiconductor materials will be pointed out. A comparison based on the performances (cost, power consumption, reduced size chip, RF performances,...) of these technologies will be presented in order to validate the choice of a suitable technology. The characteristics of the adopted AMS 0.35 µm SiGe BiCMOS technology for implementation study of the pulse detector will be presented. 4.2 GaAs-based technology Gallium arsenide (GaAs) has some electronic properties which are superior to silicon s. It has a higher saturated electron velocity and higher electron mobility, allowing it to function at higher frequencies. GaAs devices generate less noise than silicon devices when operated at high frequencies and can also operate at higher power levels than the equivalent silicon device because they have higher breakdown voltages. However, it is difficult to form large diameter boules of this material, limiting the wafer diameter to sizes significantly smaller than silicon wafer thus making mass production of GaAs devices significantly more expensive than silicon. The major reason why MOSFETs are not realized in GaAs is the fact that the required GaAs oxides have a poor quality and yield. Much better oxides can be processed in silicon. Compared to a MOSFET, a MESFET uses a Schottky (metalsemiconductor) junction as a gate [53]. They are usually constructed in GaAs and hence are faster but more expensive than silicon-based MOSFETs (see Fig. 4.1(a)). MESFETs are commonly used for microwave frequency communications and radar. The High Electron Mobility Transistor (HEMT) also called Heterostructure FET (HFET) is an advanced device based on the MESFET principle. It uses a junction between two materials with different band gaps as the channel instead of a doped region. A commonly used combination is GaAs and AlGaAs [54]. The effect of this junction is to create a very thin layer where the Fermi energy is above the conduction band, giving the channel very low resistance and then a high electron mobility. Heterojunction Bipolar Transistors (HBT) can be fabricated on the basis of GaAs/AlGaAs which

119 r r r 4.3 Silicon-based technologies 87 provides excellent properties (see Fig. 4.1(b)). GaAs HBT are favourable candidates for low-volume applications requiring highest performances [53]. Emitter contact Diode Schottky MESFET Base contact n+ - GaAs n - AlGaAs Anode Cathode Source Gate Drain solation region Is n n+ solation region Is n- AlGaAs n+ n n+ Depletion region solation region Is Undoped AlGaAs spacer Collector contact p+ - GaAs n - GA GaAs Sub - collector Undoped GaAs InGaAs Semi-insulating GaAs substrate Semi-insulating GaAs substrate (a) (b) Figure 4.1: Schematic cross section of (a) a Schottky diode and a n-channel MESFET transistor and (b) a npn HBT structure in GaAs-based technology. 4.3 Silicon-based technologies Silicon is the most used material in semiconductor devices. It has several advantages over GaAs. Silicon has a greater physical strength that enables larger wafers (maximum of 300 mm compared to 150 mm diameter for GaAs). It is cheap to process and highly abundant in the Earth s crust, in the form of silicate minerals. It can be refined using simple purification and crystal growth techniques. It also exhibits suitable physical properties for fabricating active devices with good electrical characteristics. In addition, silicon can be easily oxidized to form an excellent insulator, the silicon dioxide (S i O 2 ), which is useful for constructing capacitors and MOSFETs. The silicon dioxide also serves as a diffusion barrier that masks against unwanted impurities from diffusing into the high purity silicon material [55]. This masking property allows selective alteration of the electrical properties in the silicon, thus active and passive elements can be built on the same substrate. We can distinguish two major silicon-based technologies: the bipolar technology and the CMOS technology Bipolar technology The Bipolar Junction Transistor (BJT) was invented in 1948 at the Bell Telephone Laboratories by John Bardeen and Walter Brattain [53]. After three decades of domination as a device of choice in the design of discrete and integrated circuits, the bipolar junction transistor has declined in favor of CMOS technology in the design of integrated circuits. Nevertheless, the BJT remains a device that excels in some applications, such as discrete circuit design, due to the very wide selection of BJT

120 88 Integrated Circuits Technologies types available and because of knowledge about the bipolar transistor characteristics. The bipolar transistors can be combined with MOSFET s in an integrated circuit by using a BiCMOS process to create innovative circuits that take advantage of the best characteristics of both types of transistor. The BJT is widely used in discrete circuits as well as in IC design, both analog and digital. The device characteristics are so well understood that one is able to design transistor circuits whose performance is remarkably predictable and quite insensitive to variations in device parameters. The basic principle involved is the use of the voltage between two terminals to control the current flowing in the third terminal. A three-terminal device can be used to realize a controlled source which is the basis for amplifier design [56]. Also, in the extreme, the control signal can be used to cause the current in the third terminal to change from zero to a large value, thus allowing the device to act as a switch, which is the basis for the realization of the logic inverter, the basic element of digital circuits. npn vertical transistor pnp lateral transistor Normal S i O 2 Collector Base Emitter Base Collector Emitter n + n + n + p p p p+ p+ p n epitaxial n+ buried n- epitaxial n+ buried layer layer layer layer p substrate Figure 4.2: A cross-section diagram of a bipolar technology structure Bipolar Junction Transistor characteristics The BJT consists of three differently doped semiconductor regions: the emitter region, the base region and the collector region, where each region is connected to a terminal, respectively labeled emitter (E), base (B) and collector (C). These regions are, respectively, p type, n type, p type in a pnp transistor, and n type, p type, n type in a npn transistor. The base is physically located between the emitter and the collector and is made from lightly doped, high resistivity material. The collector surrounds the emitter region, making it almost impossible for the electrons injected into the base region to escape being collected [56]. A cross section view of a BJT, shown in Fig. 4.2, indicates that the collector-base junction has a much larger area than the emitter-base junction. The device is called bipolar since its operation involves both types of mobile carriers, electrons and holes. Unlike other transistors, the BJT is not a symmetrical device. This means that the interchange of the collector and the emitter makes the transistor leave the forward active mode, starting to operate in the

121 4.3 Silicon-based technologies 89 reverse mode. BJTs can be considered as voltage-controlled current sources, but are usually characterized as current amplifiers due to the low impedance at the base Heterojunction Bipolar Transistor A heterojunction bipolar transistor (HBT) is a transistor in which one or both p-n junctions are formed between dissimilar semiconductors. The primary advantage of an HBT is its high emitter efficiency. The circuit applications of the HBT are essentially the same as those of bipolar transistors. However, the HBT has higher-frequency capability in circuit operation. In microwave applications, HBT is used in solid-state microwave and millimeter-wave power amplifiers, oscillators, and mixers [54]. The HBT is an improvement of the BJT that can handle signals of very high frequencies up to several hundred GHz. It is common in modern ultra fast circuits, mostly RF systems. The principle difference between the BJT and HBT is the use of differing semiconductor materials for the emitter and base regions, creating a heterojunction. The effect is to limit the injection of holes into the base region, since the potential barrier in the valence band is so large. Unlike BJT technology, this allows high doping to be used in the base, creating higher electron mobility while maintaining gain [53], [54] CMOS technology Complementary Metal-Oxide Semiconductor (CMOS) is a major class of integrated circuits. Advanced CMOS technology has the advantages of low power dissipation and high device density, which make it suitable for fabricating complex circuits. It permits to integrate both analog and digital functions in the same chip realized by both N-type and P-type transistors. The small signal performance of CMOS circuits depends strongly on the device geometry and the DC variables. The needs for robust and low cost technologies for digital applications have increased the activity in silicon MOS transistor research. A complementary CMOS structure is presented in Fig Integrated MOSFETs are characterized by their threshold voltage and device sizes. Usually, the n-channel and p-channel devices are designed to have threshold voltages of equal magnitude and remain fixed for a particular process. The transconductance can be adjusted by changing the device dimensions (width: W and length: L) [56] The MOS transistor The metal oxide semiconductor field-effect transistor (MOSFET) is a four terminals active device. It is by far the most common field-effect transistor which has many applications in both analog and digital electronics. The four terminals are the source (S), the drain (D), the gate (G) and the bulk (B). A thin dielectric barrier is used to isolate the gate and the channel. The control voltage applied to the gate terminal induces an electric field across the dielectric barrier and modulates the free-carrier concentration in the channel region. MOS transistors are classified as p-channel or

122 90 Integrated Circuits Technologies n channel, MOSFET p channel, MOSFET Normal S O, i 2 Source Gate Drain Source Gate Drain p + n + n + p + Thin, gate, oxide pwell, p + Guard, ring p + p + Thin, gate, oxide n, substrate Figure 4.3: Complementary CMOS structure. n-channel devices, depending on the conductivity type of the channel region. In addition, these devices can also be classified according to their mode of operation as enhancement or depletion type devices. In a depletion-mode MOSFET, a conducting channel exists under the gate with no applied gate voltage. The applied gate voltage controls the current flow between the source and the drain by depleting a part of this channel. In the case of the enhancement-mode MOS transistor, no conductive channel exists between the source and the drain at zero applied gate voltage. As a gate bias of proper polarity is applied and increased beyond a threshold voltage value V T, a localized inversion layer is formed directly below the gate. This serves as a conducting channel between the source and the drain electrodes. If the gate bias is increased further, the resistivity of the induced channel is reduced, and the current conduction from the source to the drain is enhanced. Fig. 4.4(a) shows a cross-section diagram and the circuit symbol of an n-channel enhancement-mode MOSFET. The particular polarities of the gate and drain bias for the proper operation of the device are also identified. Normally, an S i O 2 layer is used as the gate dielectric. Our studies are based on the enhancement-mode MOSFET. This mode is preferred over the depletion one because the enhancement-mode MOSFET is a self-isolating device, does not require tight control of diffusion cycles, and can be fabricated by a single diffusion step forming the source and the drain pockets. Since all the active regions of the MOSFET are reverse biased with respect to the substrate, adjacent devices fabricated on the same substrate are electrically isolated without requiring a separate isolation diffusion. Because of this self-isolation advantage, MOSFET devices offer a much higher packing density per unit area of silicon surface than the bipolar transistors. The MOSFET can be modeled as a voltage controlled switch. It exhibits a squarelaw characteristic, where the drain current i D is proportional to the square of the drain to source voltage V DS in the triode region and to the square of the net control voltage V GS V T in the saturation region of operation (see Fig. 4.4(b)). The MOS transistor current-voltage characteristics are linearly dependent on the channel width-to-length

123 4.3 Silicon-based technologies 91 V DS = V GS V T V GS I D Source n n type enhanced, channel Gate L Gate, metal p, substrate,( body) Gate, oxide n I D V DS Drain Triode region Saturation region Cut off region V GS < V T V GS 3 V GS 2 V GS1 V DS Substrate,( body) (a) (b) Figure 4.4: (a) A cross-section diagram and (b) Current-voltage characteristics of a n-channel enhancement-mode MOSFET. ratio W/L. Thus, for a given channel length L, the current levels within the device can be scaled by making the channel width W larger or smaller. Also, the drain current is linearly affected by the thickness of the gate oxide layer, the dielectric constant of the gate insulator and the carrier (electron or hole) mobility. The threshold voltage, V T, is an important parameter in MOS transistors that affects the magnitude of i D. It defines the voltage at which a MOS transistor begins to conduct. V T is largely determined at the time of fabrication rather than by circuit conditions. It typically lies in the range of 0.5 to 3 V. The material parameters that affect V T include the gate conductor and insulation materials, the thickness of the gate material, the channel doping concentration. The MOSFET input impedance is very high and as a result the gate current can be considered zero at low frequency. We can note that the n-channel MOSFET is preferred to the p-channel MOSFET. This is because the electron surface mobility is two to three times higher that for holes, and thus with the same device size (W and L), the n-mosfet offers higher current drive (or lower on resistance) and higher transconductance [56]. Body effect: The bulk of the semiconductor region is normally inactive since the current flow is confined to a thin surface channel directly below the gate. When designing analog circuits with MOS transistor, the body may not be connected to the source terminal. This may have a significant effect on the device characteristic. The dependence of the MOSFET characteristics on the source-to-body bias V SB is called the body effect. This effect may be significant for a number of analog amplifier applications of monolithic MOSFET devices [57]. The bias voltage V BS changes the width of the depletion layer and therefore also the voltage across the oxide due to the change of the charge in the depletion region. The primary effect results in an increase of the gate threshold V T above its nominal value. Another undesired result

124 92 Integrated Circuits Technologies of the body effect is the reduction of the device transconductance and the output impedance when operated in a cascode configuration Passive components Capacitors and resistors are passive components that are compatible with fabrication steps used to build the MOS device. Capacitors: A good capacitor is often required when designing analog integrated circuits. They are used as charge storage devices in integrators circuits, switchedcapacitor filters and digital-to-analog converters, and other places as well. The essential desired characteristics for capacitors used in these applications include good matching accuracy, high ratio of desired capacitance to parasitic capacitance, high capacitance per unit area, low temperature dependence and low voltage coefficient [55]. Analog CMOS processes provides capacitors that meet these criteria. One type of MOS capacitor is formed using one of the available interconnect layers (metal or polysilicon) on top of crystalline silicon separated by a dielectric (silicon dioxide layer). Another MOS capacitor type (which is similar to the first one) is constructed by putting a n-well underneath a n-channel transistor. However, the bottom plate (the n-well) of this capacitor type has much higher resistivity. It is often used when one terminal of the capacitor is connected to ground (or V SS ). It offers a very high capacitance per unit area, it can be matched well and it is available in all CMOS processes because no unique steps or masks are required [55]. Resistors: Some applications, such as digital-to-analog conversion, use the resistor. Resistors compatible with the MOS technology include diffused, polysilicon, and n- well (or p-well) resistors. A diffused resistor is formed using source/drain diffusion. The sheet resistance of such resistors in a nonsalicided process is usually in the range of Ω/. For a salicide process, these resistors are in the range of 5 15 Ω/. A polysilicon resistor is surrounded by thick oxide and has sheet resistance in the range of Ω/, depending on doping levels. For a polysilicide process, the effective resistance of the polysilicon is about 10 Ω/. A n-well resistor is made up of a strip of n-wells contacted at both ends with n + source/drain diffusion. This type of resistor has a resistance of 1 10 kω/. The resistance values are given for a 0.8 µm CMOS process [55]. The three categories above represent those most commonly applied with standard MOS technology. Other types of resistors are possible if the process is altered Basic MOS semiconductor fabrication processes Semiconductor technology is based on a number of well-established process steps [54], [55], [57], [58]. Some of these steps may be carried out several times, in different combinations and operating conditions during a complete fabrication run.

125 4.3 Silicon-based technologies 93 Oxidation: It refers to the chemical process of silicon reacting with oxygen to form a layer of silicon dioxide (S i O 2 ) on the surface of the silicon wafer. The oxide grows both into as well as on the silicon surface. The oxide thickness (t ox ) can be grown using either dry or wet techniques with the former achieving lower defect densities. To speed up the reaction, the wafer is heated to the 700 C to 1200 C range in special high-temperature ultra-clean furnaces. Diffusion and ion implantation: Diffusion in semiconductor material is the movement of impurity atoms at the surface of the material into the bulk of the material in order to change its resistivity. It takes place at temperatures in the range of C [55]. An ion implanter produces ions of the desired impurity, accelerates them by an electric field, and allows them to strike the silicon surface. Compared to diffusion process, the advantages of the ion implantation is that it can be performed at room temperature and results in much more accurate and reproducible impurity profiles. Deposition: Deposition is the means by which films of various materials may be deposited on the silicon wafer. These films may be deposited using several techniques that include deposition by evaporation, sputtering, and chemical-vapor deposition (CVD). Metallization: The purpose of this process is to interconnect the various components of the integrated circuit. The aluminum is deposited over the entire surface of the silicon by heating it in vacuum until it vaporizes. The vapors then contact the silicon surface and condense to form a solid aluminum layer. The required interconnection pattern is then selectively etched. Photolithography: Each of the basic semiconductor fabrication processes discussed thus far is only applied to selected parts of the silicon wafer with the exception of oxidation and deposition. The selection of these parts is accomplished by a process called photolithography [55]. This process is used to define transistor regions and to isolate one transistor from another. It consists of coating the silicon surface with a photosensitive layer called photoresist. When exposed to light through a master pattern on a photographic plate, the photoresist will become softened. The exposed layer can then be removed using a chemical developer, causing the mask pattern to appear on the wafer. Very fine surface geometries can be reproduced accurately by this technique Silicon on Insulator (SOI) substrate technology The substrate material upon which chips are built can profoundly affect design structures, interconnects, and other critical design considerations, particularly when advanced circuit materials, such as copper and low-k (a Low-k dielectric is a material with a small dielectric constant relative to silicon dioxide; replacing the silicon dioxide

126 94 Integrated Circuits Technologies with a low-k dielectric of the same thickness reduces parasitic capacitance, enabling faster switching speeds and lower heat dissipation), are used in device manufacturing. An all-silicon device structure has inherent problems that are associated with parasitic circuit elements arising from junction capacitance. These effects become a more severe problem as devices are made smaller. A way to circumvent the problem is to fabricate devices in small islands of silicon on an insulating substrate [54], [58]. Silicon on insulator is a semiconductor wafer technology that produces higher performing devices than traditional bulk silicon technologies [59], [60]. It works by placing a thin insulating layer, such as silicon dioxide or glass, between a thin layer of silicon and the silicon substrate (see Fig. 4.5). This insulating layer isolates the active transistor elements from the underlying wafer. The higher frequency performance and lower power offered by SOI chips is made possible by their lower parasitic junction capacitance. The presence of the buried oxide layer not only reduces the junction capacitance but also offers the flexibility of using a high resistivity substrate. This reduces the microstrip loss at high frequency since microstrip is widely used for impedance matching. It also allows SOI CMOS to implement digital, analog and RF portions of the design on the same die with reduced power. Improved passive device performance (resistor, capacitor and inductor) over frequency has been demonstrated on SOI substrates [60]. Another key concern with highly integrated RF/mixed mode circuit design is how to eliminate the cross-talk between high frequency RF and digital, mixed signal devices on the same die. This can be drastically reduced by using fully oxide-isolated SOI CMOS technology. Complete oxide isolation of the active devices from the substrate eliminates the substrate current injection path. This process helps reduce the amount of electrical charge that the transistor has to move during a switching operation, thus making it faster up to 15 % and reducing switching energy up to 30 % over CMOS-based chips. An analysis of SOI and bulk CMOS technology concluded that SOI has the potential to be a lower cost solution because the simpler well/isolation process requires fewer processing steps, thus lowering manufacturing cost [60]. In addition, the study revealed, a higher die leverage, due to improved isolation, yields more good die per wafer and higher performance results from the elimination of substrate capacitances. n-channel MOSFET p-channel MOSFET Metal S i O 2 n+ n+ p p+ n p+ Bulk silicon substrate Figure 4.5: Cross section of the silicon-on-insulator (SOI).

127 4.4 SiGe HBT BiCMOS technology 95 The silicon on sapphire SOS is a part of the silicon on insulator SOI family of the CMOS technologies where an excellent electrical insulator, sapphire (Al 2 O 3 ), is used. The processes and equipment used for SOS epitaxy are essentially identical to those employed for homoepitaxial growth [58]. However, two fundamental problems appears in SOS epitaxy. The formation of aluminum silicate from the outdiffusion of aluminum from the substrate and thermal mismatch between the layer and the substrate. The SOI with silicon oxide insulator has significant advantage over other insulated materials such as SOS due to its large volume production which is the only way to ensure continuous price reduction and quality improvement. SOI chips usually cost more than its standard silicon counterparts, so the SOI has been used primarily for high-end applications that can justify the incremental costs for the performance gain. However, SOI has the potential to provide significant opportunities in low power applications. 4.4 SiGe HBT BiCMOS technology When silicon is allowed with germanium Ge, it forms the silicon germanium SiGe. This new semiconductor material is used to produce the BiCMOS process. It is rapidly becoming an important semiconductor material for use in analog integrated circuits. Circuits utilizing the properties of Si-SiGe junctions offers higher frequency performances than those using silicon alone. Thus, RF performance can be enhanced by including SiGe HBTs into the CMOS technology. Such a BiCMOS technology requires a few processing steps and is therefore more expensive. However, an aggressively scaled CMOS technology can have higher costs than a BiCMOS process employing moderate lithography. In typical mass fabrication, a 0.13 µm BiCMOS technology may have similar costs than a 90 nm CMOS technology. It was proven that when using silicon with a 15% 20% Ge portion for the substrate layer, the electron mobility in the silicon channel has been enhanced by 70% [53]. The BiC- MOS process permits to implement both CMOS and bipolar device structures on the same chip. The two transistor types are equally important, and each offers distinct advantages and has unique areas of application. S NMOS NPN polye PMOS G E C B B G D S D n+ n+ p+ p+ n+ SiGe n-well p-well sinker bn-well p- n+ buried layer p-substrate Figure 4.6: A cross-section diagram of a BiCMOS technology structure.

128 96 Integrated Circuits Technologies 4.5 Comparison between MMIC technologies Most integrated circuits are implemented in silicon (Si), silicon germanium (SiGe), gallium arsenide (GaAs) or indium phosphide (InP). Silicon carbide (SiC) and gallium nitride (GaN) technologies are considered as promising candidates for the future. The essential key characteristics of the basis materials are listed in Tab. 4.1 [53]. Silicon CMOS technology plays an important role for today s IC market. The major reasons are the low costs in mass-fabrication and the excellent ability for the highest level of integration. Usually, III/V based technologies have lower fixed costs than silicon based technologies since less processing steps are required. Hence, low-volume prototyping costs are less significant for III/V based technologies. The fixed costs are mainly determined by the costs of the lithographic masks. In mass fabrication, costs can be scaled down more significant for silicon-based technologies due to lower variable fabrication costs per IC. Reasons are the high yield making large wafer sizes possible, and the lower material costs. Silicon material, which is based on quartz sand, is quite cheap. The thermal conductivity of silicon is approximately twice as high as that of GaAs. Also, GaAs suffers from limited fabrication yield. Silicon oxide junctions can be manufactured with very high reproducibility. As a result of commercial interests very high efforts have been spent on the fabrication of silicon ICs. This is one reason why the yield of silicon based circuits is higher than that of III/V based semiconductors. The frequency performances of CMOS technology are achieved by aggressively downscaling of the dimensions. At lowered dimensions, the voltages have to be scaled down as well to keep the electrical field below a critical value. Hence, as a significant drawback, the maximum possible RF output power decreases. However, III/V based technologies do not have to be scaled as aggressive as the silicon counterparts to achieve the needed frequency performances. Thus, generally, the possible supply voltage and the associated RF output power of III/V technologies are larger. This is the major reason why III/V based power amplifier ICs are still used in mobile phones. Novel technologies such as silicon carbide and gallium nitride may serve as promising alternatives in the future. They have a high breakdown voltages and good thermal conductivities which made them superior for high power applications. Scaling alone is not sufficient any more to improve the frequency performances of sub 0.1 µm technologies. Short channel effects, boundaries in terms of gate oxide fabrication, threshold voltage scaling limits and gate leakage demand for innovative transistor principles, materials and fabrication procedures. The most promising are SOI, strained silicon and double gate MOSFET [53]. To minimize the leakage effects, high-k dielectrics with enhanced properties have to be developed for the gate oxides. Technologies such as low-k dielectrics, copper metals and MEMS have to be applied for the passive devices and interconnects. As a conclusion, silicon based technologies are the first choice for low-cost low-power applications.

129 4.6 AMS 0.35 µm SiGe BiCMOS technology 97 Electron Mobility at 300 K [cm 2 /V s] Bandgap [ev ] Thermal conductivity [W/cm.K] Relative dielectric constant Substrate resistivity [Ω.cm] Number of transistor in IC Transistors Costs: prototypes/mass fabrication Wafer: size[cm]/area normalized to silicon Silicon SiC InP GaAs GaN > >1000 >1000 >1000 >1 billion <200 <500 <1000 <50 MOSFET, Bipolar, HBT High/low MESFET, HEMT Very high/n.a. MESFET, HEMT, HBT High/very high MESFET, HEMT, HBT Low/high MESFET, HEMT Very high/n.a /1 n.a. 8-10/(1/9) 10-20/(1/4) n.a. Table 4.1: Key characteristics and comparison of MMIC technologies. 4.6 AMS 0.35 µm SiGe BiCMOS technology The implementation studies and simulations were realized at the Institute of Electronics and Telecommunications at Rennes (IETR). The IC design tools and design kits were provided by EUROPRACTICE [61] and Multi-Project Circuits (CMP) [62]. Thus, our choice was limited to the available silicon-based technologies. The adopted austriamicrosystems 0.35 µm SiGe-BiCMOS process technology is based on the proven 0.35 µm mixed-signal CMOS process and includes an additional high performance analog oriented SiGe HBT transistor module [63]. This advanced RF-process offers high-speed HBT-transistors with excellent analog performance such as high frequency and low noise linear precision as well as complementary MOS transistors with the op-

130 98 Integrated Circuits Technologies Adopted technology SiGe-BiCMOS Polysilicon / Metal layers 4 / 4 Feature sizes 0.35 µm gates / 0.40 µm emitters Supply voltage CMOS 3.3 V, periphery up to 5.5 V Transit frequency 65 GHz Maximum oscillation frequency 65 GHz Substrate type p > 2 V B V CEO Table 4.2: Specification of the AMS 0.35 µm SiGe BiCMOS Technology. tion of 5 V I/O CMOS transistors. Accurately modeled high linear precision capacitors are available as Poly1/Poly2 or Metal2/Metal3 versions. Linear resistors, high quality varactors and thick Metal4 spiral inductors are also available. The essential specifications of this technology are given in Tab This technology is aimed at operating in the following applications: ˆ GSM, DCS1800, PCS1900, IS95, UMTS Front-end. ˆ DECT, PHS, Bluetooth, Home-RF Front-end. ˆ ISM Receivers, Transmitters and Transceivers for: 868 M Hz, 915 M Hz, 2.4 GHz, 5.6 GHz. ˆ GPS, Glonass. ˆ Wireless LAN, Hyper LAN up to 5.6 GHz. ˆ Satellite Direct Receivers. 4.7 Conclusion IC transistor technologies determine important circuit properties such as operation frequency, gain, noise, large signal performance, DC power consumption, circuit complexity and costs. The essential key characteristics of the different transistor types are compared in Tab. 4.3 [64]-[68]. Generally, we can distinguish between bipolar and FET transistors realized on silicon and III/V based substrates. Due to the high substrates resistivity, low parasitics and high electron mobilities, III/V based technologies offers higher frequency performances than silicon counterparts. However, due to the limited transistor yield, III/V based circuits have high costs in mass-fabrication and enable only low circuit complexities. In the last years, the frequency performances and noise gap between III/V and silicon based technologies has been significantly decreased. SiGe HBTs with f t of 350 GHz and a NF min below 1 db up to 20 GHz are available. Moreover, SOI CMOS technologies with f t of 243 GHz and a NF min below 0.8 db up to 20 GHz have been demonstrated [53]. CMOS technologies exhibit

131 4.7 Conclusion 99 Type Field Effect Transistor Bipolar Transistor Si bulk MOS- FET Si SOI MOS- FET GaAs MES- FET InP PHEMT Si BJT SiGe HBT Current source I d Vgs 2 I c e V be Complementary Yes Yes No No Yes Yes transistor Costs: prototype/mass fabrication High/ low High/ low Low/ high High/ very high High/ moderate High/ moderate Lithography l g = 85 nm l g = 65 nm l g = 0.1 µm l g = 0.1 µm w e = 0.3 µm w e = 0.12 µm Max. f t 110 GHz 243 GHz 168 GHz 562 GHz 50 GHz 375 GHz Max. 120 GHz 208 GHz n.a. 300 GHz 70 GHz 210 GHz f max V supply,max 1.5 V 1.2 V > 2 V 1 V 3 V 1.5 V NF min up to 20 GHz < 1.5 db < 1 db < 1.2 db < 0.4 db < 3 db < 0.8 db Table 4.3: Key characteristics and comparison of transistor technologies. a very low static power consumption allowing a very high transistor density without suffering from thermal problems. Hence, CMOS plays a dominant role within the whole IC market. After presenting different integrated circuit technologies, the SiGe BiCMOS process technology appears to be the best candidate to realize the on-chip implementation of the pulse energy detector. However, this technology will enable the integration of the LNA stage as well as the digital functions on the same chip. The design-kit from AMS 0.35 µm SiGe BiCMOS process technology were then chosen in order to study the implementation of the proposed detector circuit. This technology provides low cost, low power consumption and reduced size chips.

132

133 Chapter 5 Implementation Study of an Analog CMOS Pulse Energy Detector Contents 5.1 Introduction Squaring stage State-of-the-art on detectors Adopted squarer circuit Integrator Circuit description Pulse detector architecture and simulation results Sample and hold circuit MOS switch Charge injection effect and evaluation Charge injection effect cancelation in S/H circuits Adopted S/H circuit CMOS pulse detector architecture and simulation results Detection with one S/H and integration stages Extension into two S/H and integration parallel stages Circuit performance Detector noise Imperfection effect study Mismatch effect study Conclusion

134 102 Implementation Study of an Analog CMOS Pulse Energy Detector 5.1 Introduction The aim of this chapter is to elaborate a suitable on-chip implementation of a pulse energy detector for the multi-band OOK UWB receiver described in Chapter 2. The pulse energy detector must conform with the requirements of UWB high data rates applications in term of low cost, low power consumption and reduced size chips. For that, we adopt the CMOS technology to study possible structures of the detector circuit. The adopted pulse energy detector includes the four stages: a squarer, a current amplifier, an integrator and a sample and hold. The squarer must be able to operate with a pulse signal. It must have a wide in-bandwidth functionality (of about 500 MHz) with a frequency of functioning in the GHz UWB band. An amplification stage with wide low-pass bandwidth (of about 500 MHz) follows the squarer in order to maintain the best isolation with the integrator and not to perturb the squared signal. Finally, an integration stage followed by a sample and hold stage permits to estimate the energy of the received pulse signal. Possible imperfections and mismatches effects are identified and studied in order to evaluate the architecture performance. The effects of the offset voltage generated by mismatches of transistors constituting the current amplifier and the equivalent input impedance of the amplifier are then considered. The mismatch effects of transistors constituting the pulse detector on the gain of the squarer and the current amplifier are also taken into account. Theoretical studies and CADENCE simulation results in 0.35 µm CMOS technology are presented to validate this very low complexity approach. The two principle parts of the pulse detector are the squarer and the integrator. The main objective is to realize the pulse detection function with less complexity design, low power consumption and low mass fabrication cost. Different techniques to realize the squaring function and the integration will be presented and studied. Advantages and drawbacks of each of them will be pointed out. Also, Sample and Hold circuits aimed at transmitting the detected level to the analog to digital converter will be studied. The MOS switch characteristics will be presented. The charge injection effect that could affect the accuracy of the sampler will be studied. Several techniques will be proposed in order to compensate them. 5.2 Squaring stage An analog squarer, which provides an output voltage proportional to the square of the input voltage, is widely used in signal processing for applications such as enveloppe and energy detection. Analog multipliers can in principle be used for implementing the squaring function, by connecting both inputs to the signal to be squared, but this approach needs elaborate circuitry. An analog squarer is not easy to design with wide bandwidth constraint. Diode detectors and circuits based on MOS transistors are well-known components that offer square-law non-linear behaviors over wide bands. Usually, circuits with simple architecture have a better capability to operate over large bandwidths. For that, our main objective consists of having a squarer circuit with

135 5.2 Squaring stage 103 low complexity design in order to conserve the large in-bandwidth functionality. The squarer must guarantee a wide in-bandwidth (of about 500 MHz) with a frequency of functioning in the GHz UWB band and a relatively moderate operational or cut-off frequency at the output as the signal will be integrated after that. In this part, possible architectures able to realize the square-law function in CMOS technology will be studied. Their advantages and drawbacks will be pointed out in order to adopt a suitable squarer circuit State-of-the-art on detectors Diode detectors Due to their favorable characteristics in high frequency large bandwidth applications, Schottky diodes have been widely used in various RF power detection circuits [69], [70]. The Schottky Diode detector is used in applications where no primary (DC) power is available in the standby mode. It offers the advantages of very low cost fabrication and low power consumption. The single diode detector is shown in Fig Figure 5.1: Diode detector. R L is the video load resistance. L is the shunt inductance, it provides a DC current return path for the diode, and is chosen to be large (compared to the diode s impedance) at the input or R F frequency. C is the bypass capacitance; it is chosen to be sufficiently large so that its capacitive reactance is small compared to the diode s impedance but small enough to avoid having its reactance load the video circuit. The characteristic transfer curve of such a detector is shown in Fig It displays the output voltage versus the input power. Diode detectors are used to detect small signals close to the noise level. From the noise level up to 21 dbm the slope of the response curves is constant. This is the square law region. The diode detection law, over a wide range of input power level P in, follows the relation: V out = k( P in ) α, (5.1) where P in is the RF input power applied to the detector circuit, V out is the detector output voltage appearing across R L and α is the detection law. At low input power level, i.e., in square law region, α 2. So the aim of the diode detector is to convert

136 104 Implementation Study of an Analog CMOS Pulse Energy Detector (a) (b) Figure 5.2: (a) Detector transfer curve and (b) Voltage sensitivity versus input power and temperature at zero frequency [71]. input RF power to output voltage. As can be seen from Fig. 5.2(a), the transfer curve follows a square law at low levels of input power (output voltage proportional to the square of input voltage) and displays quasi-linear behavior at higher levels (output voltage proportional to input voltage). The dynamic range of the square law response is adjusted by the current bias in conventional biased detectors. The performance of the diode detector is affected by its junction resistance, which largely depends on temperature variations. The Schottky diode s junction resistance is affected by three different currents: the diode s own saturation current I S, the externally applied bias current I 0, and the circulating current I C, produced by rectification in the diode. In the small signal region, where I C < I S the equation for junction resistance is: nkt R j = q(i S + I 0 ), (5.2) where n is the diode ideality factor, k = J.K 1 is Boltzmann s constant, T is the temperature in Kelvin and q C is the electronic charge. The saturation current I S at a given temperature T is related to the value at the reference temperature T 0 by: ( ) 2 T n qψ I S = I S0 e k ( 1 T 1 T ) 0, (5.3) T 0 where T 0 is 293 K, I S0 is the saturation current at T 0 and ψ is the metal-semiconductor Schottky barrier s height. These equations show that the performance of the diode detectors is heavily dependent on its saturation current, which is strong function of temperature. At both

137 5.2 Squaring stage 105 low and high temperature extremes, this dependence can lead to degradation in performance [71]. An exact analysis provided by Harrison and Le Polozec has permitted to calculate the curves of voltage sensitivity versus input power and temperature as shown in Fig. 5.2(b) [71], [72]. As it can be seen from this figure, the diode shows reasonable sensitivity at 25 C (despite the lack of an RF impedance matching network) and good square law response almost to 30 dbm. At 85 C, the voltage sensitivity suffers slightly and at 55 C, behavior does not follow traditional model. The performances of Schottky diodes were studied as a function of the temperature, and results have been reported in [74]-[76]. They show that the performances of the Schottky diodes are largely affected by the temperature. Compensation methods for high and low temperature exists but it relatively complicate the circuit design. Most CMOS processes are not specified for Schottky contacts, and modifications of a process is required to fabricate Schottky diodes. For that, it is difficult to integrate Schottky diode in CMOS technology where there is a big influence of parasitic elements. Problems of lifetime and reliability of these diodes need, e. g., silicide to be included in CMOS process, which is not always possible [74]. A Schottky diode is formed when a metal layer is deposited directly onto a low doped n-type or p-type semiconductor region. The metal on the low doped semiconductor is the anode and the semiconductor material, contacted through an ohmic contact, is the cathode. The processes that can integrate Schottky diodes are often not commercially available and do not have the capability of integrating CMOS circuits monolithically with them [77]. Also unfortunately, there is no dedicated industry standard compact model to be used for predictive circuit simulation. Another drawback is that, for Schottky diode detectors, the input power is limited up to 21 dbm in the square law region [70], [71]. For all these reasons, it seems reasonable and preferable to realize a squarer based on MOS transistors Squarer circuits in MOS technology A MOS transistor detector is less dependent on temperature variations than diode detectors. It presents a better detection sensitivity and the output voltage of the detector is directly available without subtracting the bias voltage. Also, the effective noise voltage of the diode detector is higher than that of a MOS transistor [78]. Analog multipliers based on MOSFET Analog multipliers are widely used in analog signal processing. They are required for rectification, multiplication, modulation, demodulation, frequency translation, signal level compression and expansion, neural networks, and RF communication systems, etc. Analog multipliers can in principle be used for implementing the squaring function by connecting both inputs to the signal to be squared. The basic idea used in most multipliers is to apply inputs to nonlinear devices followed by cancellation/minimisation of linearity errors caused [79]. Most CMOS multipliers are modification of the well known Gilbert cell.

138 106 Implementation Study of an Analog CMOS Pulse Energy Detector V S M 3 M 4 M 5 M 6 V X V Y M 1 M 2 I SS Figure 5.3: Schematic of the Gilbert multiplier core. The Gilbert cell is a popular structure to implement the multiplier in IC technologies due to its wide dynamic range and high spectral quality [80]. Its baseband and multi-decade bandwidth performance make it attractive for wideband instrumentation, fiber optics and RF communications. As with most ICs, its performance is strongly dependent on the used device technology [81]. Gilbert multiplier circuits were demonstrated with various semiconductor technologies [81]. A Gilbert cell is a cross-coupled differential amplifier. Its topology is shown in Fig The output voltage V S is proportional to the product of the two input voltages V X and V Y. The characteristics of MOS devices and bipolar devices are different. Thus, the MOS version of Gilbert cell requires extra linearization circuits which degrade the circuit performance. Its architecture is not well suited for lowering the supply voltage. Also, these have either poor linearity or low output (current) signal levels. Other types of CMOS analog multiplier architecture were reported in [82], [83]. The square-law function is obtained by properly taking advantage of the input-output characteristic of two MOS transistors operating in the triode region. Squarers based on MOSFET operating in the saturation region There are many analog circuits in the literature which synthesize analog functions exploiting the square law transconductance characteristic of the MOS transistor in the saturation region [84]-[86], which can be expressed by the following relation: I DS = K(V GS V T ) 2, (5.4) with, K = 1 2 k n W L, (5.5)

139 5.2 Squaring stage 107 Input, gate Drain V 1 C1 C2 Multiple, input V2 Vn Cn Floating gate Source Drain V 1 V2 k1 k2 kn V n Source n + n + p substrate Substrate (a) (b) Figure 5.4: (a) Structure basic of a NMOS Floating-Gate MOS transistor with n-input gates, (b) Symbolic representation. where k n is the process transconductance parameter, W is the induced channel width, L is the induced channel length, V GS is the gate to source voltage and V T is the threshold voltage. However, the procedure gets complicated because of the threshold term which introduces linear and offset terms into the basic arithmetic, and also by the limited range of the saturation region. Various techniques have been found which directly manipulate the square law to eliminate the unwanted terms [86]. A particular squarer architecture operating in the saturation region, based on Floating Gate MOS (FGMOS) transistors, has been proposed in [87] and [88]. The FGMOS can be distinguished as a special kind of MOS transistors. The basic structure of a n-channel FGMOS transistor with n-input voltages V 1, V 2,...V n, is shown in Fig. 5.4(a). The floating gate is formed by the first polysilicon layer over the n-channel while the multiple input gates are formed by the second polysilicon layer and they are located over the floating gate [87]. This floating gate is capacitively coupled to the multiple input gates. The symbolic representation of such devices is shown in Fig. 5.4(b). The drain current of a FGMOS transistor with n-input gates in the saturation region, neglecting the second order effects, is given by the following equation: I DS = β[k 1 (V 1 V S ) + k 2 (V 2 V S ) k n (V n V S ) V T ] 2, (5.6) where β = (µ n C OX /2)(W/L) is the transconductance parameter, µ n is the electron mobility, C OX is the floating gate to oxide capacitance, W/L is the aspect ratio of the transistor, k i (i = 1, 2,..., n) are the input capacitance-coupling ratios, V i is the input voltage, V S is the source voltage and V T is the threshold voltage of the transistor. The input capacitive-coupling ratios k i, neglecting the overlap capacitances, are defined as: C i k i = n i=1 C, (5.7) i + C GS where C i are the input capacitances between floating gate and each of the i th input and C GS is the floating gate to source capacitance which is equal to (2/3)C OX for operation

140 108 Implementation Study of an Analog CMOS Pulse Energy Detector V DD R 0 R0 V 0 + I1 I C C 3 I2 V 3 1 C 1 2 V2 C M 3 1 M 3 M 2 C C C B1 B3 B 2 S V B I SS V SS Figure 5.5: Squarer based on FGMOS transistors. in saturation region (see Fig. 5.4). From Eq. (5.7), it is clear that the summation of all capacitive-coupling ratios is always less than 1, n i=1 k i = n i=1 C i/( n i=1 C i + C GS ), due to the capacitance C GS, which is located in the denominator. A proposed squarer, shown in Fig. 5.5 is realized with FGMOS transistors, two of them have two input gates, and one has three input gates [88]. One input gate of each transistor is biased with a voltage V B, in order to maintain the transistor in the saturation region. V 1 and V 2 are the single-ended input voltages and V S is the voltage at the common source of the three FGMOS transistors. V 0 = R 0 [(I 1 + I 2 ) I 3 ] = R 0 {β 1 [k 1 (V 1 V S ) + k B1 (V B V S ) V T ] 2 +β 2 [k 2 (V 2 V S ) + k B2 (V B V S ) V T ] 2 β 3 [k 3 (V 1 V S ) + k 3 (V 2 V S ) + k B3 (V B V S ) V T ] 2 }. (5.8) By setting the aspect ratio of M 3 to be twice that of M 1 (and M 2 ), β 1 = β 2 = (1/2)β 3, the gate-to-source capacitance of M 3 must be twice that of M 1 and M 2, so C GS1 = C GS2 = (1/2)C GS3. The capacitances C B1, C B2, C B3 and C 1, C 2, C 3 must fulfil the relations C B1 = C B2 = (1/2)C B3 and C 1 = C 2 = C 3, respectively. Therefore, the capacitive-coupling ratios are k 1 = k 2 = 2k 3, and k B1 = k B2 = 2k B3. According to the above considerations the output voltage can be expressed by: V 0 = 2R 0 β 1 k 2 3(V 1 V 2 ) 2. (5.9) The major interest in the squarer circuits based on FGMOS transistors is that the output signal V 0 can be attenuated under the capacitive effect for fixed input signals, V 1 and V 2, but this kind of circuits has several drawbacks. When included in

141 5.2 Squaring stage 109 a squarer circuit operating in the saturation region [88], the FGMOS transistor needs an appropriate adjustment of the bias voltage V B, so that the V GS window can be shifted within the supply rails to achieve the maximum input range and the minimum non linearity. The main drawback is that the capacitive effect is not easy to control in FGMOS transistors and it largely affects the output squared signal (see Eq. (5.6) and Eq. (5.7)). Also, the multiple floating and fixed gates need to be properly isolated Adopted squarer circuit Squarer circuits based on MOS transitors operating in the triode region easily implement input and output signals with the same bias levels without additional circuits. These kinds of squarer circuits were studied, and several architectures were proposed in the literature [82], [83], [89], [90]. A squarer circuit intended to operate in a multiplier circuit is proposed in [83]. The square-law function is obtained by properly taking advantage of input-output characteristics of two n-channel MOS transistors operating in the triode region. The same principle is also adopted to realize a squarer circuit in [90] (see Fig. 5.6). Both MOS transistors M 1 and M 2 must properly be matched. They will provide an output current proportional to the square of the voltage input V in. Here, the output signal is converted to the voltage mode via an operational amplifier and a resistor. But this approach has several drawbacks. First, the resistor is an undesirable component because it usually introduces unwanted additional nonlinearities. Second, state-of-the-art low power operational amplifiers do not have a sufficient input bandwidth to guarantee a good functionality. In addition, their design may be quite complex. V G M 1 +V in -V in V B I D1 I 0 R M 2 I D1 V out V G Figure 5.6: Squarer based on MOS transistors. The adopted squarer circuit is realized using two n-channel MOS transistors operating in triode region. The drain current I D of a MOS transistor, biased with a drain to source voltage V DS around zero in the triode region, can be expressed by the following Taylor series [90]: I D = K[a 1 (V D V S ) + a 2 (V 2 D V 2 S ) + a 3 (V 3 D V 3 S ) +...], (5.10)

142 110 Implementation Study of an Analog CMOS Pulse Energy Detector where V D and V S are the voltages on the drain and source respectively, K is given in Eq. (5.5), the a i coefficients are functions of the transistor parameters, gate bias, and substrate bias. For typical processes and signal levels, the second-order term is larger than any of the higher order terms. The first three a i are: a 1 = 2(V G V T ), (5.11) a 2 = (1 + y 2 V B + φ B ), (5.12) a 3 = y 12 (V B + φ B ) 3/2, (5.13) where V G is the gate voltage, V T is the threshold voltage, V B is the substrate voltage, φ B is a constant (typically equal to 0.7 V ) and y is a constant that depends on the transistor construction. Based on the transistor equation given in Eq. (5.10), a V G M 1 +V in -V in V B M 2 V G I 1 I 2 I squarer Figure 5.7: Squarer architecture. square law function can be implemented using the two MOS transistors, M 1 and M 2 (see Fig. 5.7) [90]. The role of these two transistors is to provide an output current proportional to the square of the input voltage. If the circuit is driven by balanced signals V in and V in, and when the drain voltage is maintained at zero Volt, the output drain currents I 1 and I 2 of both MOS transistors M 1 and M 2 can be expressed by: and, I 1 = K I 2 = K + j=1 + j=1 a j V j in, (5.14) a j ( V in ) j. (5.15) The sum of these output drain currents can be expressed by, (see App. B.1): I squarer = 2K[a 2 V 2 in + a 4 V 4 in +...] 2Ka 2 V 2 in. (5.16)

143 5.3 Integrator 111 Use of balanced signals and matched transistors causes the linear term to be suppressed as well as all the high-order odd terms. The approximation shown in Eq. (5.16) can be made because the second-order term is typically much larger than the remaining even-order terms [90]. Due to the simple squarer design, the broadband functionality of MOS transistors is preserved. Also, this architecture can be directly integrated in standard CMOS technology. For that reason, this approach has been adopted to realize the pulse energy detector of the high data-rate UWB architecture. The squarer stage provides an output signal in current mode. For that, a current to voltage convertor must precede the integration stage. This can be done directly around a capacitor during the integration operation. However, these two stages must be isolated in order to keep the performance of the squarer circuit unaffected by the integrator Simulation results The squarer circuit, depicted in Fig. 5.7, was designed and simulated by using CA- DENCE s spectre simulator with process parameters of a 0.35 µm RF CMOS technology. The performance of the proposed architecture was evaluated in the GHz UWB band. The results were compared to the same pulse signal squared by an ideal multiplier. As it can be seen from Fig. 5.8, the relative error of the squared signal compared with the same operation of an ideal squarer remains lower than 1% in the whole considered UWB band. Fig. 5.9 shows the simulation results in time domain for an 100 mv pp input sine wave signal at respectively 1, 3.5, 7 and 10 GHz. Figure 5.8: Relative error versus frequency of the squared signal compared with the same operation of an ideal squarer. 5.3 Integrator Integrator circuit is one of the fundamental building block function of an analog detector. This stage must provide the integration operation of the squared signal. Normally, the output of the integrator will be connected to the Analog to Digital

144 112 Implementation Study of an Analog CMOS Pulse Energy Detector +100 Vin (mv V) Vin (mv V) Isquarrer (ua) Isquarrer (ua) Ti (ns) Time ( ) (a) Vin (mv V) Isquarrer (ua) Vin (mv V) 1.5 (b) +100 Isquarrer (ua) 1.0 Ti (ns) Time ( ) Ti (ns) Time ( ) 1.0 Ti (ns) Time ( ) (c) (d) Figure 5.9: Simulation of the squarer circuit with an 100 mvpp input sine wave signal at: (a) 1 GHz, (b) 3.5 GHz, (c) 7 GHz, and (d) 10 GHz. Converter block via a sample and hold stage. All filter design aimed at operating as integrator can be reduced to noninverting and inverting one. To perform this mathematical operation of integration, an operational amplifier can be used to realize an inverting continuous time integrator as can be shown in Fig [57]. The resistor RI is used to develop a current I(t) which is proportional to the time-variant input voltage Vin (t). This current is forced to flow through the capacitor CI. Since the voltage across a capacitor is proportional to the integral of the current through it, the output voltage Vout of the inverting continuous time integrator of Fig. 5.10(b) can then be expressed as a function of the input voltage Vin as follows: 1 Vout (T ) = τi Z T Vin (t)dt + Vout (0), (5.17) 0 where Vout (0) is the initial value of the output voltage at t = 0. τi = RI CI is the integrator time constant. In the frequency domain, the ideal transfer function for the

145 5.3 Integrator 113 V () in t R I C I Vout () t Figure 5.10: A simple architecture of continuous time integrator. inverting continuous time integrator of Fig is: V out (jw) V in (jw) = 1 jwτ I = w I jw, (5.18) where w I = 1/τ I is called the integrator frequency. w I is the frequency where the magnitude of the integrator gain is unity. However, the influence of a finite value of the differential voltage gain and a finite unity-gain bandwidth of the operational amplifier will affect the performances of the integrator. Thus the operational bandwidth will be limited Circuit description Amplification stage At this stage, the main purpose is to maintain the best isolation between the squarer and the integrator in order not to perturb the squared signal. It must also provide an input bandwidth of at least 1 GHz to let the useful part of the squared signal pass to the integrator unaffected. Knowing that the squarer output is in the current mode, our method consists of working with current amplifiers. They provide better performance at higher frequencies compared to conventional voltage amplifiers [91]- [93]. Based on simple current mirrors, these circuits have reduced complexity and they are easy to implement. Also, low voltage and low power consumption can be achieved [91]. Our approach consists of adding a current amplification stage to the two MOS transistors considered for the analog squarer (see Fig. 5.7). Thus the amplifier will have an open-loop functionality. This current amplifier is composed of 4 p-channel MOS transistors and 4 n-channel MOS transistors operating in the saturation region [91]. The design of this stage is shown in Fig. 5.11(a) and the equivalent equation is given by: I amp = GI sq, (5.19) where I amp is the output current, I sq is the input current and G is the current gain which is determined by the dimensions of the mirror transistors: G = (W/L) MN i (W/L) MNj = (W/L) MP i (W/L) MPj, (5.20)

146 114 Implementation Study of an Analog CMOS Pulse Energy Detector where N-type transistors MN i correspond to MN 1 and MN 2, MN j correspond to MN 3 and MN 4. P-type transistors MP i correspond to MP 1 and MP 2, MP j correspond to MP 3 and MP 4. Finally, the output voltage is collected by adding an analog passive component. A modified architecture of the amplification stage is described in Fig. 5.11(b). With this new architecture, the effects of mismatch errors of MOS transistors parameters (threshold voltage, aspect ratio, surface mobility of the channel and gate oxide thickness) between n-channel and p-channel MOSFETs of the circuit are compensated, and thus the output offset current is reduced. Compared to the initial architecture of the current amplifier, in the modified one, transistors MN 3 and MP 4 with their new positions (see Fig. 5.11(b)) have the role of compensating the dissymmetry errors of transistors MP 3 and MN 4, respectively. Another type of architecture able at performing the role of a current follower with low input impedance is the current conveyor. A design of a CMOS current conveyor is presented in Fig V DD V DD MP 3 MP 3 MP1 MP1 I bias,p I bias,p I bias,p I bias,p MN 3 MP 2 I sq MP 4 MP 2 I amp I sq I amp MN 3 MP 4 MN 1 MN 1 I bias,n4 I bias,n2 I bias,n4 I bias,n2 MN 4 MN 4 MN 2 MN 2 V SS Current amplification stage (a) V SS Modified Current amplification stage (b) Figure 5.11: (a) Current amplifier stage. (b) a modified architecture of (a). Integration stage After the squaring operation, the information is contained in the baseband signal. So the integrator has identical pass-band for all parallelized stages. Integration is realized by a capacitor as depicted in Fig Its capacitor output voltage V C is given by: V C (T ) = 1 C T 0 I C (t)dt + V C (0), (5.21) where C is the capacitor value, I C is the capacitor input current, V C (0) is the capacitor voltage for t = 0. To realize a proper integration function (by setting V C (0) to zero),

147 5.3 Integrator 115 V DD MP 1 MP 5 MP 2 MP 6 MN 5 MN 4 Input Output I 0 MP 3 MP 4 MN 2 MN 3 MN 7 MN 1 MN 6 V SS Current conveyor Figure 5.12: Current conveyor. the capacitor must be discharged after each integration cycle. For that, a switch made of MOS transistor can be added in parallel to the capacitor Pulse detector architecture and simulation results The proposed pulse detector architecture is depicted in Fig. 5.13(a). In this architecture, a simple design of current follower was adopted. Two versions of the current amplification stage was proposed in the previous section. The advantage of the modified one will be pointed out later in the performance evaluation section of this chapter. In addition, an architecture with current conveyor was also mentioned. The proposed architectures for the current amplifier stage were simulated separately in the frequency domain. The circuit and performance parameters of these circuits are presented in Tab. 5.1, Tab. 5.2 and Tab These simulation results show the advantages of these architectures. The current follower (see Fig. 5.11) has a simple design and it consumes less power compared to the proposed current conveyor (see Fig. 5.12). However, the current conveyor provides a better performance in terms of input impedance and low-pass bandwidth. The architecture of the current follower was chosen because it guarantees a good functionality with a simple design and a sufficient low-pass bandwidth. Also, it will be shown later in this chapter that the input impedance of the current amplification stage affects the gain of the detector. This can be compensated at the amplifying stage at the input of the pulse detector or the receiver. The proposed pulse energy detector (depicted in Fig. 5.13(a)) was simulated in time domain using CADENCE s spectre simulator. Fig. 5.13(b) shows the output current i C and the voltage v C at the capacitor in the integration stage. Also, the input voltage v in corresponds to a filtered monocycle pulse taken at the output of the first sub-band ( GHz) of the GHz quadriplexer whose measured

148 116 Implementation Study of an Analog CMOS Pulse Energy Detector I bias MP 3 V DD MP1 v in (mv V) V G +V in -V in M 1 M 2 V B I 1 I 2 I sq MP 4 MP 2 MN 3 MN 1 I amp I C C H VC i C (μa ) V G MN 4 MN 2 v C (m mv) Squarer stage V SS Current amplification stage Integration stage Time (ns) (a) (b) Figure 5.13: (a) Architecture of the proposed pulse energy detector. (b) Input voltage v in, output current i C and output voltage v C of the pulse energy detector in the GHz sub-band. Squarer stage (W/L) 1,2 40/0.35 V G 1 V Current amplification and integration stages (W/L) N 7.2/0.35 (W/L) P 70/0.35 I bias 84.5 µa 3-dB Bandwidth 563 MHz Input resistance 1.37 kω Input capacitance 158 f F Power dissipation 0.6 mw V DD = V SS 1.8 V C H 0.5 pf Table 5.1: Circuit and performance parameters of the pulse energy detector. Modified Current Amplifier (W/L) N1 = (W/L) N2 = (W/L) N4 10.2/0.35 (W/L) N3 16.1/0.35 (W/L) P 1 = (W/L) P 2 = (W/L) P 3 100/0.35 (W/L) P 4 80/0.35 I bias µa 3-dB Bandwidth 335 MHz Input resistance kω Input capacitance 340 f F Power dissipation 0.5 mw V DD = V SS 1.8 V Table 5.2: Circuit and performance parameters of the modified current amplifier. results are shown in Fig. 2.9 (from RF prototype in microstrip technology). The circuit parameters of the pulse detector depicted in Fig. 5.13(a) are given in Tab. 5.1.

149 5.4 Sample and hold circuit 117 Current Conveyor (W/L) P 1 = (W/L) P /0.35 (W/L) P 3 = (W/L) P /0.35 (W/L) P 5 = (W/L) P /0.35 (W/L) N4 = (W/L) N5 14/0.35 (W/L) N6 = (W/L) N7 13/0.35 (W/L) N1 = (W/L) N2 = (W/L) N3 7/ dB Bandwidth 1.41 GHz Input resistance 482 Ω Input capacitance 373 f F Power dissipation 1.8 mw I µa V DD = V SS 2 V Table 5.3: Circuit and performance parameters of the current conveyor. 5.4 Sample and hold circuit The sample and hold circuit is a key aspect of the ADC. The ADC must have a stable signal in order to accurately perform a conversion. The minimum sample and hold time is limited by two parameters: the acquisition time and the settling time. The acquisition time t a is the time during which the sample and hold circuit must remain in the sample mode to ensure that the subsequent hold mode output will be within a specified error band of the input level that existed at the instant of the sample and hold conversion. The acquisition time assumes that the gain and offset effects have been removed. The settling time t s is the time interval between the sample and hold transition command and the time when the output transient and subsequent ringing have settled to within a specified error band. Fig shows the waveforms of a practical sample and hold circuit [55]. The maximum sample rate for the ADC can be given by: f sample = 1 T sample and, T sample = t s + t a, (5.22) where the minimum conversion time for the ADC would be equal to the minimum sample and hold time T sample. In addition to the above time parameters of a sample and hold circuit, there is an aperture time, which is the time required for the sampling switch to open after the S/H command has switched from sample to hold. Another consideration of the aperture time is aperture jitter, which is a variation in the aperture time due to clock variations and noise. During the hold period of the S/H a kt/c noise exists because of the switch and hold capacitor. The minimum requirement for a S/H circuit is a switch and a storage element. Typically, the capacitor is used as the storage element and the switch is implemented with a MOS transistor. Two basic circuit configurations commonly used to implement monolithic sample-and-hold circuits are the open-loop and closed-loop topologies. In general, the use of a closedloop enhances the accuracy of the S/H at the sacrifice of speed. The open-loop architecture potentially offers the fastest implementation of the sampling function. The precision obtainable with such configurations is typically much lower than what could be achieved with alternative closed-loop architectures.

150 118 Implementation Study of an Analog CMOS Pulse Energy Detector S/H Command Hold Sample Hold litude Ampl V in (t) in () V * in (t) t a t s Output of S/H Valid for ADC conversion Time Figure 5.14: Waveforms for a sample-and-hold circuit MOS switch One advantage of MOS technology is that it provides a good switch. The objective of this section is to study the characteristics of a MOS transistor operating as a switch. Modeling and studying the MOS switch will permit us to easily resolve possible problems such as charge injection effects which can occur during the implementation of the sample-and-hold circuit. Fig shows a model for a MOS switch. The gate voltage V G controls the state of the switch -ON or -OFF. The most important characteristics of a switch are its ON resistance r ON and its OFF resistance r OF F. Ideally, r ON is zero and r OF F is infinite. But in reality, it is never the case. The ON resistance consists of the series combination of r S, r D and the channel resistance. Typically, the main contribution comes from the channel resistance, and both r S and r D are considered as negligible. In the ON state of the switch, the voltage across the switch should be small, and V GS should be large. Therefore, the MOS transistor is assumed to be in the ohmic region. The drain current can be expressed by: I D = k n W L ((v GS V T )v DS 1 2 v2 DS), (5.23) where v DS is less than v GS v T but greater than zero. The small-signal channel resistance is given as: 1 r ON = i D / V DS L = k nw (V GS V T V DS ), (5.24) Q where Q designates the quiescent point of the transistor. It could be deduced that a lower value of r ON is achieved for larger values of W/L. When V GS approaches V T, r ON approaches infinity because the switch is turning off. I OF F represents the leakage current that may flow in the OFF state of the switch. The performance of the OFF state is dominated by I SB and I DB which represent the source-to-bulk and drainto-bulk leakage currents. These leakage currents are mainly due to the pn junction.

151 5.4 Sample and hold circuit 119 I OFF r OFF G S r ON D S D I SB C GS G C GD I DB B C SB V GB C DB B (a) (b) Figure 5.15: (a) An n-channel MOS transistor used as a switch. (b) Model for MOS switch. Typically, they are of the order 1 fa/µm 2 at room temperature, and they double for every 8 C increase [55]. The polarities of the leakage currents are not known. Their directions have been assigned arbitrarily in Fig The parasitic capacitors are an important consideration in the application of analog sampled-data circuits. C SB and C DB are the source-to-bulk and drain-to-bulk parasitic capacitors. C GS and C GD are the gate-to-source and gate-to-drain parasitic capacitors. Capacitors C GS and C GD contribute to the effect called charge injection where a portion of the control voltage appears at the drain and source terminals. An understanding of the charge injection phenomenon in analog MOS switches as well as a precision control is imperative for the sample-and-hold circuits. To study the functionality of the MOS switch, let us consider the use of a switch to charge a capacitor as shown in Fig. 5.16(a). An n-channel MOS transistor is used as a switch and V φ is the control voltage applied to the gate. V φ must be considerably larger than either the drain or the source voltage in order to ensure that the MOS transistor is ON. Typically, the bulk is taken to the most negative potential. During the charge transfer phase (V φ > v in + V T ), the MOS switch connects C to the voltage source v in. At this time, the switch can be replaced by its ON resistance as shown in Fig. 5.16(b). It can be noticed that the capacitor C will charge to v in with the time constant of r ON C. For successful operation r ON C << T, where T is the time for V φ is high. We note that r ON varies greatly with v GS [55]. The highest value of r ON is attained when v DS = 0 and for the highest value of v in and the lowest value of v GS. This worst-case value should be used when sizing the transistor to achieve the desired charging time Charge injection effect and evaluation The error voltage resulted from the charge injection effect which is induced by the turning off of a MOS switch is one of the fundamental factors that limits the accuracy

152 120 Implementation Study of an Analog CMOS Pulse Energy Detector V H V L A V φ B ΔV out A r ON B V in C L v CL V in C L v CL (a) (b) Figure 5.16: (a) An application of a MOS switch. (b) Model of the ON state of the switch in (a). of the S/H circuits. In this part, we aim at identifying the origins of this effect in order to propose a convenient compensation technique. To study the charge injection effect, let us consider the circuit in Fig. 5.16(a). When it is on, a MOS transistor holds mobile charges in its channel. During the turn off, it is convenient to consider two cases regarding the gate transition time: the slow switching off regime and the fast switching-off regime. In the slow switching-off regime, the transistor remains ON so that all channel mobile charges flow in the input voltage source, V in. None of these charges will appear on the load capacitor, C L. For the fast case, the time constant associated with the channel resistance and the channel capacitance limits the amount of charge that can flow to the source voltage so that some of the channel mobile charges in strong inversion region contributes to the total charge on C L and causes an error in the sampled voltage. Also, feedthrough charges via gate-to-drain overlap capacitance contributes to this error. When the gate voltage reaches the threshold voltage, the conduction channel disappears. After that, only the clock feedthrough continues to increase the error voltage. Analysis and modeling of charge injection due to channel charges in strong inversion and feedthrough charges via gate-to-diffusion overlap capacitance have been extensively studied [94]-[97]. The equivalent lumped models for the circuit during the turnoff are shown in Fig The values of the channel capacitance C ox and channel resistance R channel depend on the terminal conditions of the device. As it can be seen in Fig. 5.17(a), it is convenient to approximate the total channel capacitance by splitting it into two capacitors of equal size placed at the gate-source and gate-drain terminals. Charge injection involves a complex process whose resulting effects depend on a number of factors such as the layout of the transistor, its dimensions, impedance levels at the source and drain nodes, and gate waveforms [55]. Analytical model of the channel charges in strong inversion region and charges injected through the gateto-diffusion overlap capacitance are presented in [95]. The error induced by the charge injection effect is the difference between the desired voltage V in and the actual voltage V CL. Analytical expressions were derived to describe the approximate operation of transistor in the slow and fast regimes [94]. Consider the gate voltage traversing from

153 5.4 Sample and hold circuit 121 V H V H V L V L C ox 2 C V ox φ 2 V φ A Col Col B A Col Col B R channel i d (a) (b) Figure 5.17: Equivalent lumped model for the analog switch. (a) Transistor is ON. (b) Transistor is OFF. V H to V L (Fig. 5.17(a)) described in the time domain as v G = V H Ut, where U is the magnitude of the slope of v G (t). When operating in the slow switching-off regime defined by βvht 2 /2C L >> U, the error due to the charge injection can be described as: V error = ( Col + C channel 2 C L ) πuc L + C ol (V S + V T V L ), (5.25) 2β C L where V HT is defined as V HT = V H V S V T. In the fast switching-off regime defined by βvht 2 /2C L << U, the error voltage is given as: ( ) Col + C channel ( 2 V error = V HT βv ) HT 3 + C ol (V S + V T V L ). (5.26) C L 6UC L C L The channel charges in weak inversion have been found to contribute comparably to the switch-induced error voltage on a switched capacitor (about 20% of the total injected charge) and neglecting the channel charges in weak inversion can seriously underestimate the correct value of the error voltage [95]. A simple model of switch charge injection error is proposed in [98]. This model includes the subthreshold effects by introducing the subthreshold current and inversion layer charge variation effect in the weak inversion region. The variation of the gate-source capacitance above the threshold voltage is also taken into account Charge injection effect cancelation in S/H circuits Several compensation techniques exist to reduce the charge injection due to channel charges and feedthrough through gate-to-drain overlap capacitance. As described in the previous section, a slow switching-off will permit most of the channel charges to return to the source node and thus reduce the charge injection. Also, the use of the largest capacitors possible and minimum-geometry switches will contribute to the reduction of this effect. However, these solutions will create problems in other areas,

154 122 Implementation Study of an Analog CMOS Pulse Energy Detector requiring some compromises. To overcome the problem of the charge injection phenomenon in analog MOS switches as well as the clock feedthrough, several techniques exist and were proposed in the literature. Switched capacitor circuits can be applied to S/H circuits permitting the cancelation of charge injection and clock feedthrough thanks to the use of a delay clock [55] Open-loop S/H with Miller feedback Another technique which is identical to the open-loop circuit adopted in Fig is introduced in [99] and [100] allowing to increase the precision of an open-loop S/H circuit without significantly reducing the sampling rate (see Fig. 5.18(a)). With this technique, the sampling error is significantly attenuated by sampling the input onto an equivalent hold capacitance that is small during the sampling mode, but it is electrically increased during the hold mode through the action of Miller feedback. The equivalent hold capacitance is formed by a combination of capacitors C 1 and C 2, the MOS pass transistor M 2, and inverting amplifier with gain A. C 1B and C 2B represent the parasitic bottom-plate capacitance associated with C 1 and C 2, respectively. In the sample mode, both M 1 and M 2 are conducting. Therefore, the bottom plates of both C 1 and C 2 are thus connected to the low amplifier output impedance and the input voltage is sampled onto capacitors C 1 and C 2 at the hold node X. During the transition from the sample to hold mode, the fast turnoff of transistors M 1 and M 2 results in the injection of charges onto node X causing an error in the sampled voltage. Since the drain and source of M 2 are at the threshold point of the amplifier transfer function during the sample mode, the charge injected from its turnoff is essentially independent of the input. Consequently, the induced voltage error V S2 represents a fixed offset. The source and drain of M 1 are at the input potential during sampling. Thus, the charge injected during the turnoff of transistor M 1 has a large input dependence, and it is a potential source of sampling error. However, the induced voltage error V S1 is attenuated by the action of Miller feedback. Furthermore, the equivalent hold capacitance in the hold mode is significantly increased by that feedback. The voltage change at node X caused by the turn-off of, respectively, M 1 and M2 is: V S1 = Q 1 (C 2 + C 2B ) C 2B (C 1 + C 2 ) + C 1 C 2 (A + 1) and, V S2 = Q 2 C 2. (5.27) where Q 1 and Q 2 represent the charge injected onto M 1 and M 2, respectively. Caused by capacitance C 2, a degree of coupling between M 1 and M 2 exists during the turnoff which causes the input-dependent component turnoff transient of M 1 to affect the charge injected by M 2. An elaborate study of this effect presented in [100] shows that the change in injected channel charge is found to be approximately 7%. An improved version of the Miller feedback is proposed in [101] (see Fig. 5.18(b)). It is achieved by replacing the inverting operational amplifier in the feedback circuit with a simple CMOS inverter.

155 5.4 Sample and hold circuit 123 V in M 1 Clock X 1 V out + Output, buffer V in M 1 Clock X 1 V out + Output, buffer M 2 M 2 C 2 Miller, feedback V DD M 3 C 2 Miller, feedback + C 2B C 2B M 4 C 1B C 1 C 1B C 1 (a) (b) Figure 5.18: (a) The Miller-capacitance-based S/H circuit cited in [100]. improved version cited in [101]. (b) An Ø 2 C H Ø 1 V in (t) Ø 1 V out (t) V in (t) Ø 1d C H V out(t) Ø 2 (a) (b) Figure 5.19: (a) Closed-loop S/H circuit. φ 1 is the sample phase and φ 2 is the hold phase. (b) Switched capacitor closed-loop S/H circuit Closed-loop S/H circuit The closed-loop configuration offers increased accuracy at the expense of speed. Several closed-loop S/H architectures avoid input-dependent charge injection during turnoff of the sampling switch [55], [102]. Two such configurations are shown in Fig The charge injection and clock feedthrough of S/H circuit of Fig. 5.19(a) are independent of the input because one of the switch terminals is at ground. This ensures that the charge injection and corresponding hold pedestal are independent of the input. Fig. 5.19(b) showed a simple switched capacitor amplifiers operating as a S/H circuit that cancels the offset of the operational amplifier. The use of a closed-loop configuration entails a trade-off between speed and precision governed by the gain and bandwidth of the loop transfer function. The disadvantages of such approach is that it typically includes long acquisition time, limited input bandwidth, and increased design complexity.

156 124 Implementation Study of an Analog CMOS Pulse Energy Detector Adopted S/H circuit A simple open-loop configuration of sample-and-hold circuit is chosen to meet the desired specifications. The open-loop S/H architecture is chosen because it offers the implementation of the sampling function with shortest acquisition time. The configuration consists of three switches implemented with MOS pass transistors and an output buffer (see Fig. 5.20) Circuit description The integration mode occurs when only the switch φ I is closed and the hold capacitor is charged by the input current I sq. During the hold mode, all the switches are open and the voltage is available at the output. The final step of the cycle is when the hold capacitor is discharged and the switch φ R is closed. Thus, the integration stage is incorporated into the sample and hold circuit. A unity-gain operational amplifier buffers the hold capacitor and provides a low impedance replica of the held voltage. The switch φ I has the role of connecting the current amplifier (stage with a high output impedance) to the hold capacitor, C H, during the integration mode. Then, the hold capacitor is discharged with a low time constant. The dimensions of transistors constituting the switches must be properly chosen. This will be explained in the next section. This configuration was chosen because of its simplicity and it meets the desired specification with considerable range. The choices were made in an incremental manner starting from a basic switch and capacitor circuit and then proceeding one by one to meet the specifications. Isq φ I φ R V out I C C H Figure 5.20: Illustration of the architecture of the integration and sample and hold stages. Switch architecture In this part, we will describe particular techniques permitting to realize a switch with a capability to partially compensate the charge injection effect. A dummy transistor (with both source and drain node attached to the signal line and the gate

157 5.4 Sample and hold circuit 125 attached to the inverse clock) can be used to apply an opposing charge injection due to the switch transistor (see Fig. 5.21(a)). The area of the dummy transistor must be designed to provide minimum charge injection. Another technique consists of constructing a switch by connecting p-channel and n-channel enhancement MOS transistor in parallel as illustrated in Fig. 5.21(b). When φ is low, both transistors are OFF, creating an effective open circuit. When φ is high, both transistors are ON, giving a low-impedance state. The bulk potentials of the p-channel and n-channel devices are taken to the highest and lowest potentials, respectively. The p-channel and n-channel devices are sized in such a way that they have equivalent resistance with identical terminal conditions [55]. The main advantage of the CMOS switch over the single-channel MOS switch is that the dynamic analog-signal range in the ON state is greatly increased. The architecture of the adopted CMOS switch is shown in Fig. 5.21(c). It is a combination of the two techniques (the use of a CMOS switch with dummy transistors) presented above to realize a switch with less charge injection effect possible. Several constraints were taken into account to calculate the area of the transistors in the adopted switch. It depends on the functionality of each switch in the S/H circuit. As we are treating low signals levels at the input of the S/H Switch transistor φ φ Dummy transistor φ Dummy transistors φ φ Switch transistors φ (a) (b) (c) φ φ Figure 5.21: (a) MOS switch with a dummy transistor. (b) A CMOS switch. (c) Architecture of the adopted CMOS switch associated with dummy transistors. circuit, we aim at adopting the lowest possible value of the hold capacitor. However, this will give rise to the capacitive effect in the switches and thus the charge injection effect. The second can be reduced by adopting the CMOS switch architecture with dummy transistors. The capacitive effect will induce a decrease in the detection level (the output voltage range). During the integration mode, a part of the input current will charge the parasitic capacitors of the switch. This can be partially compensated by reducing the area of the switches as low as possible. During the reset mode, the hold capacitor is discharged by connecting its extremities to the ground. In that case the charge injection and capacitive effects of the MOS switch are less critical and quite negligible on the performances of the S/H circuit. The main objective here is to achieve the discharge of the hold capacitor as fast as possible in order to start a new detection cycle. Thus, the lowest possible discharge time is required. This can be obtained by reducing the ON resistance of the switch. For that, the dimensions of the switch operating for the reset mode are chosen to be greater than those intended to operate during sample and hold stages. The dimensions of transistors constituting the switches of the S/H and integration stage are given in Tab. 5.4.

158 126 Implementation Study of an Analog CMOS Pulse Energy Detector Reset switches Other switches Switch Dummy Switch Dummy (W/L) N 5.6/ / / /0.35 (W/L) P 8.75/ / / /0.35 r ON 0.25 kω 2 kω Table 5.4: Adopted CMOS switch parameters of the S/H circuit. Unity-gain output buffer The unity-gain operational amplifier is used to buffer the input signal across the hold capacitor. Its high input impedance prevents the current from leaking off the capacitor. It provides a low-impedance output node that drives the succeeding circuitry. The DC offset of the operational amplifier and charge feedthrough of the switch will cause the output node replica of the held voltage to be slightly different. The circuit and performances parameters of the output buffer are given in Tab V DD MP 1 MP 2 MN 1 MN 7 MN 2 Input MN 3 MN 4 Output MN 5 I 0 MN 6 V SS Figure 5.22: Unity-gain output buffer. Output buffer (W/L) P 1 = (W/L) P 2 75/0.35 (W/L) N1 = (W/L) N2 28/0.35 (W/L) N3 = (W/L) N4 56/0.35 (W/L) N5 1.7/0.35 (W/L) N6 = (W/L) N7 1.5/ dB Bandwidth 825 MHz I µa V DD = V SS 1.8 V Table 5.5: Circuit and performance parameters of the output buffer.

159 5.5 CMOS pulse detector architecture and simulation results CMOS pulse detector architecture and simulation results A simple architecture of the pulse detector was proposed. It is composed of four stages. The squarer and the integration stages provide the main functionalities of this circuit. The current amplifier has the role of maintaining the best isolation between the squarer and the integrator in order not to perturb the squared signal. It must also provide a large input bandwidth (of about 500 MHz) to let the useful part of the squared signal pass to the integrator unaffected. The sample and hold stage has the role of integrating the received pulse and charging the hold capacitor. Then, during the settling time, it transmits the signal to the Analog to Digital Converter via the output buffer stage. Finally, the hold capacitor is discharged to prepare a new detection cycle. In order to increase the system performances, we propose to duplicate the S/H stage into two parallel stages allowing signals with lower spread time to be treated. Thus, two versions of the architecture of the pulse detector are presented in the next sections Detection with one S/H and integration stages The global architecture of the pulse energy detector with only one S/A and integration stages is depicted in Fig It is composed of four stages: squarer, current amplification, sample and hold circuit and an output buffer. Two switches have the role of charging and discharging the hold capacitor during the detection cycle. In addition, a switch is aimed at connecting the output of the current amplifier to the ground at the end of each cycle in order to eliminate the charge accumulation caused by the capacitive effects at the output of this stage. The hold capacitor has a value of C H = 0.2 pf. Fig presents the time domain diagram of the pulse energy detector control of Fig The energy of the pulses is estimated with a period of 30 ns with 13 ns allowed for signal integration and charging of the hold capacitor. The signal is passed to the Analog to Digital Converter with a hold time of 8 ns. The capacitor is discharged during about 4 ns. The behavior of the proposed architecture was simulated in the time domain using spectre simulator of CADENCE. The input V in and the output V out voltages of pulse detector are depicted in Fig The input voltage corresponds to a filtered monocycle pulse taken at the output of the first sub-band ( GHz) of the GHz quadriplexer described in Chapter Extension into two S/H and integration parallel stages Another architecture of the pulse detector is depicted in Fig It offers the possibility of increasing the treatment speed by providing a lower sample and hold time. The architecture of this version of the pulse detector differs from the first one by duplicating the S/H and integration stages into two parallel stages. Referring to the

160 128 Implementation Study of an Analog CMOS Pulse Energy Detector Integration and S/H stage φ I φ I Squarer stage φ R φ R +V in -V in V out φ R φ R Current amplifier Output buffer Figure 5.23: Pulse energy detector: squarer, current amplification, integration and sample and hold stages. 200 (mv) V in V) V out (m Time (ns) Figure 5.24: Energy detection of a pulse at the output of the first sub-band of the system according to time domain diagram in Fig studies and realized measurements in Chapter 2 and 3, the second case can operate with pulses transmitted via directional antennas at short range. Both hold capacitors of detector in Fig have a value of C H = 0.5 pf. During a detection cycle, we can distinguish three principal modes: charging the hold capacitor Integrate, transmitting the capacitor voltage to the output Hold and discharging the hold

161 5.6 Circuit performance 129 capacitor Reset. Fig presents the time domain diagram of the pulse energy detector control of Fig The energy of the pulses is estimated during 15 ns with an acquisition time of about 13 ns allowed for signal integration and charging of the hold capacitor. The signal is passed to the Analog to Digital Converter with a settling time of about 7 ns. The capacitors are discharged during about 3 ns. The equivalent ON resistance and the dimensions chosen for the reset switches allow the hold capacitors to discharge in such a brief period of time. During the discharge time of a hold capacitor on a side of the S/H and integration stage, an acquisition of a new received signal is realized on the other parallel side. Thus, the system could provide a higher data rate compared to case with one S/H stage. In addition, two switches have the objectives of connecting the output of the current amplifier and the input of the output buffer to the ground at the end of each cycle in order to eliminate the charge accumulation caused by the capacitive effects of these two devices. φ I φ R Time (ns) Figure 5.25: Time domain diagram of the pulse energy detector control of Fig Circuit performance This section is dedicated to evaluate the performance of the pulse detector. The noise is the most important parameter that determine the performance of the detector. The characteristics of the amplification stages and the filter bank of the IR-UWB non-coherent receiver will be taken into account in order to evaluate the noise performance of the detector. The performance of the pulse detector is also evaluated when transistors parameters are not perfectly matched. Mismatches effects of transistors constituting the squarer and amplification stages will be studied separately. Also, the equivalent input impedance of the current amplifier stage will be considered in order to study its effect on the squarer stage Detector noise In electronic circuits, noise manifests itself by representing a lower limit below which electrical signals cannot be amplified without significant deterioration in the quality of the signal. It is a phenomenon caused by small fluctuations of the analog signal

162 130 Implementation Study of an Analog CMOS Pulse Energy Detector Current amplifier φ I1 φ I1 φ H1 φ H1 φ R1 φ R1 V H1 V out φ RA φ RA φ RB φ RB φ I2 φ I2 φ H2 φ H2 Output buffer +V in -V in φ R2 φ R2 V H2 Squarer stage Integration and S/H stage φ I1 φ H1 φ R1 φ I2 φ H2 φ R2 φ RA φ RB Figure 5.26: Pulse Energy Detector with two parallel stages for the integrator and S/H stages. within the components themselves. Noise results from the fact that electrical charge is not continuous but the result of quantized behavior and is associated with the fundamental processes in a semiconductor component [55]. The aim of this section is to evaluate the noise performance of the pulse energy detector. The characteristics of the amplification stages and the de-multiplexer (described in Chapter 2) will be taken into account in order to evaluate the global amplification level and noise figure of the pulse detector Noise in MOSFETs In this section, we will briefly summarize the theory on noise in MOSFETs. In MOS transistors, noise can be modeled by a current source connected in parallel with the drain current i d (or a voltage generator in series with the gate). This current source represents essentially three sources of noise, called shot, flicker (or 1/f) and thermal noise.

163 5.6 Circuit performance n (mv) V in V H2 (mv V) V H1 (mv) V out (m mv) Time (ns) Figure 5.27: Energy detection with two parallel S/H and integration stages according to time domain diagram in Fig φ I1 φ H1 φ R1 φ I2 φ H2 φ R2 φ RA φ RB Time (ns) Figure 5.28: Time domain diagram of the pulse energy detector control of Fig

164 132 Implementation Study of an Analog CMOS Pulse Energy Detector Shot noise The Shot noise is associated with the DC current flow across a pn junction. Its noise-current spectral density typically has the form [55]: i 2 n f = 2qI D, (5.28) where i 2 n is the mean-square value of the noise current, q is the charge of an electron, I D is the average DC current of the pn junction and f is the bandwidth in Hertz. Flicker (1/f) noise The flicker (or 1/f) noise is the dominating source of noise at low frequencies. Its physical origin in MOSFETs is basically the random trapping-detrapping of mobile carriers at the S i S i O 2 interface. The corresponding model is originally proposed by McWhorter [103]. In accordance with this model, its input power spectral density is given by [104]: v 2 1/f f = K a 1 COX 2 W L f, (5.29) α where α is a parameter close to 1 and K a is a technology parameter which expresses the noise characteristic of the process. Thermal noise The thermal noise is due to random thermal motion of the electron. The input power spectral density of the thermal noise at the gate of a MOS device can be expressed as follows [55]: e 2 n f = 8kT (1 + η) 3g m, (5.30) where η = g mb /g m, g mb is the small-signal transconductance from bulk to channel, g m is the small-signal transconductance from the gate to the channel (Ω 1 ), k is the Boltzmann s constant (J.K 1 ) and T is the temperature (K). Minimizing the sources of noise in MOSFETs There are at least three approaches to minimize the 1/f noise of CMOS amplifiers. The first is to minimize the noise contribution of the MOSFETs through circuit topology and transistor selection (empirically, PMOS transistors have about two to five times less 1/f noise than NMOS transistors), DC currents, and W/L ratios. The second is to replace the MOSFETs by BJTs to avoid the flicker noise. The third is to use external means, such as chopper stabilization, to minimize the flicker noise [55]. The thermal noise can be minimized by increasing the large small-signal transconductance, g m. This can be done by large W/L ratios or large DC currents.

165 5.6 Circuit performance Noise performance of the pulse energy detector At high frequencies, the MOSFET device noise is dominated by the channel thermal noise. Besides this noise source, some other noise sources, such as induced gate noise and parasitic resistance thermal noise, become important [104]-[106]. For the proposed pulse energy detector operating in the 3.1 to 10.6 GHz UWB band, the noise performance at the input of the analog CMOS pulse energy detector is mainly dominated by the thermal noise caused by the random motion of the electron and the shot noise caused by the biasing current I bias of the amplification stage. However, at the output of the current amplifier, the flicker noise must be considered at the integration and S/H stages. At the input of the receiver, the Low Noise Amplifier (LNA) and a Variable Gain Amplifier (VGA) stages provide a global gain of about 65 db. This will reduce the noise figure of the receiver and relax the constraint on the noise of the pulse detector. Details on the characteristics of different stages of the MB-OOK UWB non-coherent receiver were described in Chapter 2. The noise performance of the pulse detector was simulated using PSS and PNoise functions of CADENCE s spectre simulator. These functions take into account the nonlinear functionality of the pulse detector. Noise figure The first step in evaluating the noise performance of the pulse detector consists of evaluating its noise figure. The power spectral density of the thermal noise is given by: v 2 n = 4kT R f, (5.31) where k = J/K is the Boltzmann s constant, R is the equivalent resistor, T is the absolute temperature of the resistor and f is the bandwidth in Hertz. At the input of the pulse detector, the input resistance is about 250 Ω. At an average temperature (T = 300 K), the input voltage spectral density of the thermal noise will be v n = 4kT R f = 2.03 nv/ Hz. The simulation results with CADENCE s spectre simulator showed that the voltage spectral density of the noise at the input of the pulse detector is less than 100 nv/ Hz in the whole 3.1 to 10.6 GHz UWB band. Thus, the noise figure can be given as: NF Detector 20log 10 ( 100 v n ) = db. (5.32) The noise figure of the pulse detector can be considered high for typical telecommunication systems. However, the amplification level at the input of the pulse detector is so high with a value of about 65 db. When including the noise performance of the pulse detector, the noise figure of the receiver NF Rx will not be affected by the noise of pulse detector. Its value will be around NF Rx = 5 db.

166 134 Implementation Study of an Analog CMOS Pulse Energy Detector Output noise level after integration As we are evaluating the noise performance of the pulse detector, it is important to calculate the mean square value of the noise voltage after the integration stage at the output of the circuit. The noise-current spectral density at the output of the pulse detector caused by the squarer, the amplification stage and the CMOS switch is depicted in Fig These simulation results were obtained for different power levels of the signal at the input of the pulse detector. It can be noticed from Fig that the noise level at the output of the detector is independent of the input power level. Its effect will be evaluated by considering an integration operation within a period T and evaluating the equivalent function in the frequency domain. A signal sampled by a S/H circuit can be written as a convolution of the signal at the input of the S/H circuit by the rectangular function defined as: h(t) = { 1 if 0 < t T < 1 0 if else, (5.33) where T is the tracking time. Its Fourier transform is H(f) = T sinc(ft ) e iπft, where sinc is the sine cardinal function. Thus, the sampled noise at the output of the detector can be given as: V N,out = 1 Nd 2 C (f) H(f) 2 df R = 1 Nd 2 C (f) (T sinc(ft ))2 df, (5.34) R where C defines the capacitor value for signal integration at the output of the detector, N d (f) is the noise-current spectral density at the output of the detector in A/ Hz (see Fig. 5.29). The tracking time has a value of about 13 ns. Thus, for C = 0.2 pf, the voltage level after the integration operation is V N,out 2 mv. This value represents approximately 0.5 % of the maximum level of a signal detected within the same time interval (see Fig. 5.24) Imperfection effect study The problem of imperfections appears especially between the squarer and the amplification stage. The squared signal can be affected by the amplifier s equivalent input impedance, which depends on its biasing current I bias. Also, this biasing current and the supply voltage V DD are related to each other almost linearly for operation in the saturation region [91] Analytical study The analytical study will permit to analyze the validity of the square law function and to study the effect of the input impedance of the current amplifier on the behavior

167 5.6 Circuit performance P in = -20 dbm P in = -30 dbm P in = -40 dbm Frequency (Hz) Figure 5.29: Noise-current spectral density at the output of the pulse detector. Output noise (A/ Hz ) of the squarer circuit. To simplify the modeling procedure and the analytical study, we will consider the resistive component R of this impedance Z in = 1/(1/R + jcw) (Fig. 5.30(b)). However, the capacitive component will be taken into account by CADENCE s spectre simulator, and the overall effect of the input impedance will be compared to the results of the analytical study. The circuit depicted in Fig. 5.30(a), where the two MOS transistors are followed by a resistance R, can be used to study the effects of the amplifier s equivalent input impedance. Based on the Taylor series given in Eq. (5.10) with V D = RI R and when R > 1/(2Ka 1 ), the resistance current I R can be expressed by: I R = b 1 Vin 2 + b 2 Vin (5.35) where the first two parameters b i are: b 1 = 2Ka 2 (2Ka 1 R 1), (5.36) b 2 = 8(Ka 2) 3 R 2 (2Ka 1 R 1) 3, (5.37) where, a 1 and a 2 are given in Eq. (5.11) and Eq. (5.12). Also, a 1 is typically much larger than a 2 [90]. Finally, the output current of the squarer can be expressed by, (see App. B.2): I sq 2Ka 2 (4K(V G V T )R 1) V 2 in, (5.38) where V G and V T are the gate and threshold voltages respectively. This equation is more representative of the detector functionality than the one given in Eq. (5.16). The squarer s output current value decreases when the equivalent resistance R increases. In order to reduce this effect, we aimed at having the lowest value of this equivalent resistance. This can be achieved by increasing the value of the biasing current circulating in the current amplifier. For that, dimensions of both channel

168 136 Implementation Study of an Analog CMOS Pulse Energy Detector type transistors are increased without changing the gain of the amplifier. Also, the gate voltage V G has an attenuation effect on the squared signal. This means that its value must be regulated to obtain the largest region of operation in the triode region for both transistors M 1 and M 2 of the squarer and the highest detection level at the output of the detector. In addition, this imperfection effect made the squared signal dependent on the mismatch error on the threshold voltage of transistors constituting the squarer stage. V G M 1 +V in -V in V B I 1 I sq R V G M 1 +V in -V in V B I 1 I sq R C M 2 V G I 2 M 2 V G I 2 (a) (b) Figure 5.30: Study of the imperfection effect: modeling of the equivalent input impedance of the current amplifier and its effect on the squarer circuit Simulation results According to the studies given in the previous section, the detector was simulated for different values of the equivalent input impedance and of the biasing current of the current amplifier. Fig shows the relation between the biasing current I bias and the magnitude and phase of the equivalent input impedance Z in = 1/(1/R + jx) of the current amplifier. For I bias = µa, R = kω and the maximum voltage level attained at the integration stage is v Cmax = 16.8 mv (hold capacitor voltage) while for I bias = µa, R = kω and the maximum voltage level attained is v Cmax = 125 mv. This proves the validity of the analytical study Eq. (5.38) Mismatch effect study Studies on mismatch characteristics in CMOS technology for analog design precision have been reported in [107]-[111]. Mismatch properties determine critical product specification such as the offset voltage at the both input and output nodes of the current amplifier. This section is dedicated to evaluating the performances of the pulse detector when the MOS transistors parameters (threshold voltage, aspect ratio, surface mobility of the channel and gate oxide thickness) are not perfectly matched. Mismatches effects in the squarer and current amplifier will be studied. Also, the equivalent input impedance of the current amplifier stage will be considered in order to study its effect

169 5.6 Circuit performance 137 Magnitude (kω) 10.0 I bias =11.24 μa I bias =114.8 μa I bias =84.45 μa Phase (deg) frequency (Hz) Figure 5.31: Magnitude and phase of the input impedance of the current amplifier for different values of biasing current versus frequency. on the squarer stage. A simple analytical model of the offset current and the gain of the current amplifier will be deduced in the presence of the mismatch errors of transistors parameters Mismatch effect on the squarer circuit In this section, non-ideal contributions which affect the squarer circuit s accuracy will be explored. These contributions are mainly due to mismatches in both transconductance factors and threshold voltages of transistors constituting the squarer stage of the detector circuit, while the body effect can be overcome if a p-well process is available. Due to these non idealities, the output current differs from that given in Eq. (5.38) and can be expressed as: I sq = + k=0 b k V k in, (5.39) where terms b k with k 2 represent the non-ideal effects on the square function, 2Ka and the difference of b 2 from the value 2 (4K(V G V T is the gain error. In order to )R 1) evaluate the accuracy of the circuit and to well understand the effects of each nonideality, we will determine parameters b k for each single source of error. To maintain a good functionality of the squarer stage, proper cancelation of the odd powers of the input voltage V in must be done. For that, both transistors M 1 and M 2 (see Fig. 5.7) must be perfectly matched. Considering the real fabrication conditions, we aimed at studying the mismatches effects of transistors constituting the squarer stage on the performances of the global detector circuit.

170 138 Implementation Study of an Analog CMOS Pulse Energy Detector Mismatch error on the threshold voltage In order to evaluate the effect of mismatch errors on the threshold voltage, we consider a variation of the threshold voltage in transistors M 1 and M 2, i.e., V T 1 and V T 2, respectively (see Fig. 5.7). Considering the circuit in Fig. 5.30(a), the drain current of each of these transistors can be expressed as: I 1 = 2K(RI sq V in ) V T 1 + K[a 1 RI sq a 1 V in + a 2 R 2 I 2 sq a 2 V 2 in +...], (5.40) I 2 = 2K(RI sq + V in ) V T 2 + K[a 1 RI sq +a 1 V in + a 2 R 2 I 2 sq a 2 V 2 in +...], (5.41) I sq = I 1 + I 2 2K( V T 2 V T 1 )V in 2Ka 2 Vin 2 +2KR[a 1 ( V T 1 + V T 2 )]I sq +2Ka 2 R 2 Isq. 2 (5.42) The output current of the squarer can be written as Eq. (5.39). The details of the theoretical study are described in App. B.3. The first three b k terms can be given as follows: b 0 = 0, (5.43) b 1 = b 2 = 2K( V T 2 V T 1 ) 2KR(a 1 ( V T 1 + V T 2 )) 1, (5.44) 2Ka 2 2KR(a 1 ( V T 1 + V T 2 )) 1 8K 3 a 2 R 2 ( V T 2 V T 1 ) 2 (2KR(a 1 ( V T 1 + V T 2 )) 1), (5.45) 3 where a 1 = 2(V G V T ) [90]. The other odd and even terms for k > 2 are negligible. It can be noticed that the first order term is not any more canceled but its value is insignificant compared to the second order one. Also, it will be filtered out later by the current amplifier and at the integration stage. The main effect results in a gain error. An approximation made for b 2 will result in a gain error with a value of G er a 2( V T 2 V T 1 ) 2 which is negligible compared to the essential gain of the output Ra 3 1 signal. Mismatch error on the tansconductance factor The mismatch in the transistor aspect ratio, in the mobility as well as in the oxide

171 5.6 Circuit performance 139 thickness gives rise to a mismatch in the transconductance factor. To study its effect, we consider a variation of the transconductance factor K in both transistors M 1 and M 2, i.e., K 1 and K 2, respectively. The drain current of each of these transistors can be written as: I 1 = (K + K 1 )[a 1 RI sq a 1 V in +a 2 R 2 I 2 sq a 2 V 2 in +...], (5.46) I 2 = (K + K 2 )[a 1 RI sq + a 1 V in +a 2 R 2 I 2 sq a 2 V 2 in +...], (5.47) I sq = I 1 + I 2 a 1 ( K 2 K 1 )V in a 2 (2K + K 1 + K 2 )Vin 2 +a 1 R(2K + K 1 + K 2 )I sq +a 2 R 2 (2K + K 1 + K 2 )Isq. 2 (5.48) The squared signal can be written as Eq. (5.39). The details of the theoretical study are described in App. B.3. The first three b k terms can be expressed by: b 0 = 0, (5.49) b 1 = a 1 ( K 2 K 1 ) a 1 R(2K + K 1 + K 2 ) 1, (5.50) b 2 = a 2 (2K + K 1 + K 2 ) a 1 R(2K + K 1 + K 2 ) 1 a2 1 a 2R 2 ( K 2 K 1 ) 2 (2K+ K 1 + K 2 ) (a 1 R(2K + K 1 + K 2 ) 1) 3. (5.51) The other odd and even terms for k > 2 are negligible. In addition to the noncancelation of the first order term, the mismatch error on the transconductance factor induces a gain error. The first order term b 1 is negligible compared to the gain of the output signal. Finally, we note that all the odd powers of the input voltage v in of Eq. (5.39) will be filtered out later by the current amplifier and at the integration stage. For that, our main concern is to verify that the first order term b 1 is still negligible in spite of the presence of these studied mismatch effect. Simulation results Fig. 5.32(a) shows the output current of the squarer for an input signal at 6.85 GHz with 500 iterations as results of Monte-Carlo simulation with variation on mismatch parameters of MOS transistors M 1 and M 2. These results prove the validity of the analytical study given in previous sections. This effect slightly affects the gain of the squarer. A gain variation of about ±0.5 db can be noticed. However, when including the process parameters during the Monte-Carlo analysis (see Fig. 5.32(b)), the gain variation will attain the ±4 db value. This gain error can be compensated at the amplifying stage at the input of the pulse detector or the receiver.

172 140 Implementation Study of an Analog CMOS Pulse Energy Detector i sq (μa) i sq (μa) time (ps) time (ns) 200 (a) (b) Figure 5.32: 500 iterations Monte-Carlo simulation: Output current i sq for a 200 mv pp input sinus signal v in at 6.85 GHz with variation on (a) mismatch and (b) mismatch and process parameters of MOS transistors M 1 and M Mismatch effect on the current amplifier Problem statement The current amplifier is designed with differential supply voltages (V DD = V SS ). Both input and output nodes are set to zero DC voltage level to facilitate direct interconnection with other stages, especially the squarer one. Maintaining zero DC voltage at both extremities requires a perfect control of the MOS transistors dimensions that form this current amplifier. However, during the fabrication process, MOS transistors dimensions and process parameters may slightly vary. This causes that both extremities of the amplifier are not exactly set to zero DC voltage. When connected to the squarer stage, it is important to evaluate the impact of the amplifier s input offset voltage V o on the squared signal. The equivalent circuit in Fig can be used in that purpose. It features a DC voltage source V o at the squarer stage output. The details of the theoretical study are described in App. B.2. Then, the output current I V can be given by: where, I V I i,ɛ 2Ka 2 V 2 in, (5.52) I i,ɛ = 2K[a 1 V o + a 2 V 2 o + a 3 V 3 o +...] 2Ka 1 V o. (5.53) The approximation given in Eq. (5.53) can be made because the first-order term is typically much larger than the remaining terms [90]. Hence the shape of the squared signal is not significantly affected, only an offset current appears. Since the squarer is composed of two MOS transistors operating in the triode region, it can be seen by the amplifier as an equivalent resistance. This explains the offset current I i,ɛ that appears in Eq. (5.52) when the input node of the amplifier is different from zero DC voltage. I iɛ causes at the amplifier s output a current I o,ɛ1 = GI i,ɛ (G is the gain of the current amplifier). Similarly, an additional offset current

173 5.6 Circuit performance 141 V G M 1 +V in I 1 I V -V in V B V 0 M 2 I 2 V G Figure 5.33: Study of the mismatch effect: modeling of the input offset voltage of the current amplifier and its effect on the squarer circuit. I o,ɛ2 appears at the output of the current amplifier in the same condition as I i,ɛ. Then, the global output offset current is given by: I o,ɛ = I o,ɛ1 + I o,ɛ2. (5.54) The global output offset I o,ɛ will induce an error on the integration procedure. Some additional procedure is required to eliminate this undesirable offset current. The offset current can be evaluated by setting the squarer s inputs to zero. It can then be compensated in further digital processing steps. Based on the circuit given in Fig. 5.33, the effect of the input offset voltage of the current amplifier was simulated. A pulse with GHz band was used. As can be seen in Fig. 5.34(a), the offset voltage and the offset current are related to each other almost linearly. This justifies the approximation made in Eq. (5.53). To evaluate the effect of the input offset voltage of the current amplifier on the squared signal, results depicted in Fig. 5.34(b) have been obtained after deducting the constant offset current. These results confirm that the square law functionality is not significantly affected by input offset current of the current amplifier. Offset current A variation of the process parameters in transistors constituting the amplification stage will produce a variation of the biasing current I bias. This variation will be considered separately according to the MOSFET s channel type. Let us consider I bias,p the biasing current circulating in the PMOS transistors and I bias,n the biasing current circulating in the NMOS transistors (see Fig. 5.35). We note that the current amplifier was modeled and conceived in order to have I bias,p = I bias,n. A variation of the biasing current in a MOS transistor can be calculated as follows: I(x) = I bias x, (5.55) x where, x corresponds to a transistor parameter. The difference between the two currents I p (x) and I n (x) will be expressed by an offset current I off (x) = I p (x)

174 142 Implementation Study of an Analog CMOS Pulse Energy Detector (a) (b) Figure 5.34: Input offset current I i,ɛ versus input offset voltage V 0 of the amplification stage and (b) Error of the squared signal with offset voltage V 0 relatively to the ideal case (V 0 = 0 V ). I n (x) at the output of the current amplifier (Coefficients p and n correspond to a p-channel and n-channel MOSFET, respectively). Our objective in this study is to identify the origin of this offset in order to evaluate its effect on the detector functionality and to propose a way to compensate it. As mentioned before, the current amplifier is composed of 4 p-channel MOSFETs and 4 n-channel MOSFETs operating in the saturation region. When operating in this region, the drain to source current of a MOS transistor can be expressed as follows: I DS = K i (V GSi V T i ) 2, (5.56) where K i is the transconductance factor, V GS is the gate to source voltage, V T is the threshold voltage and i corresponds to the MOSFET s channel type. The offset current I off can be expressed by: I off = I( V T ) + I( K), (5.57) where I( V T ) and I( K) correspond to the offset current due to the mismatch error on the threshold voltage and the transconductance factor, respectively. - Variation of the threshold voltage In order to evaluate the effect of variations of the threshold voltage, we consider a variation of the threshold voltage in transistors MN 2 and MP 1, i.e., V T n and V T p, respectively. The output offset current of the current amplifier can be expressed as, (see App. B.3.): I( V T ) = I p ( V T p ) I n ( V T n ) = 2K p (V GSp V T p ) V T p +2K n (V GSn V T n ) V T n, (5.58)

175 5.6 Circuit performance 143 V DD MP 3 MP 1 I bias, p I bias, p ( ) 2 Ioff + I MP sq 4 MP 2 I + I off amp Squarer I bias, n 4 MN 3 MN 1 I bias, n 2 0 T i Integrator MN 4 MN 2 V SS Current. amplifier Figure 5.35: Study of the mismatch effect: modeling of the input and output offset current of the current amplifier. where I p ( V T p ) and I n ( V T n ) correspond respectively to the variations of the biasing current produced in p-channel MOSFETs and n-channel MOSFETs due to the mismatch on the threshold voltage. - Variation of the transconductance factor A variation of the transistor aspect ratio, of the surface mobility of the channel as well as of the gate oxide thickness gives rise to mismatch in the transconductance factor. To study its effect, we consider a variation of the transconductance factor K in both transistors MN 2 and MP 1, i.e., K n and K p, respectively. The output offset current can be written as: I( K) = I( k ) + I( W L ), (5.59) where I( k ) and I( W L ) are the variations in the bias current due to the mismatch errors in, respectively, the transconductance process parameter and the aspect ratio W/L (W is the induced channel width and L is the induced channel length) of both p-channel and n-channel MOSFETs. I( k ) = I p ( k p) I n ( k n) = 1 2 ( W L ) p (V GSp V T p ) 2 k p 1 2 ( W L ) n (V GSn V T n ) 2 k n, (5.60) I( W L ) = I p ( W L ) p In( ( W L ) n ) = 1 2 k p(v GSp V T p ) 2 ( W L ) p 1 2 k n(v GSn V T n ) 2 ( W L ) n. (5.61)

176 144 Implementation Study of an Analog CMOS Pulse Energy Detector Gain error of the Current Amplifier The current amplifier shown in Fig is based on two current mirrors. A current mirror uses the principle that if the gate-source potentials of two identical MOS transistors are equal, the channel currents should be equal. Considering the n-channel current mirror formed by the transistors MN 2 and MN 4 of the current amplifier of Fig. 5.11, the current gain can be expressed by: G = I n2 = (W/L) n2 k n2 (V GSn2 V T n2 ) 2 I n4 (W/L) n4 k n4 (V GSn4 V T n4 ). (5.62) 2 Normally, the components of a current mirror are processed on the same integrated circuit and thus all the physical parameters such as V T and k are identical for both devices. As a result, G = ((W/L) n2 /(W/L) n4 ). Consequently, the current gain is a function of the aspect ratios that are under the control of the designer. A mismatch error in the transistors parameters constituting the amplification stage will produce a variation in the gain of the current amplifier which can be written as follows: G = (W/L) n2 (W/L) n4 ( 1 + I n2 /I n2 1 + I n4 /I n4 ), (5.63) I n2 = I( V T n2 ) + I( K n2 ), (5.64) I n4 = I( V T n4 ) + I( K n4 ), (5.65) where V T n2, V T n4, K n2 and K n4 are respectively the variation on the threshold voltage and the transconductance factor of transistors MN 2 and MN 4. To obtain the best performance of a current mirror, the geometrical aspects must be considered. In the literature [55], methods using layout techniques are proposed in order to reduce the gain error generated by the mismatch error on the aspect ratios. Analytical and simulation results To evaluate the performances of the pulse detector when the MOS transistors parameters (threshold voltage, aspect ratio, surface mobility of the channel and gate oxide thickness) constituting the current amplifier are not perfectly matched, the current amplifier was simulated with Monte-Carlo analysis. Fig. 5.36(a) and Fig. 5.36(b) show the analytical and simulation results of the offset current generated at the output of the current amplifier with variations of the transistors parameters mentioned above. The analytical results are calculated using the model deduced in the previous section. The distribution of the analytical and simulation results has approximately the same mean and standard deviation. Also, the calculated relative mean error between the theory and the simulation is less than 2 %. This proves the validity of the proposed model. This offset current can be evaluated and later eliminated by a simple system procedure during the synchronization phase. Fig. 5.37(a) and Fig. 5.37(b) show the magnitude and the phase of the complex input impedance of the current amplifier with variations on, respectively, mismatch

177 5.6 Circuit performance Variations on Mismatch parameters Analytical results Simulation results Variations on Mismatch and Process parameters Analytical results Simulation results Offset current (µa) Offset current (µa) Iteration (a) Iteration (b) Figure 5.36: 500 iterations analytical and Monte-Carlo simulation results for the offset current at the output of the current amplifier with variations on (a) mismatch and (b) mismatch and process parameters. and both mismatch and process parameters. We see that the magnitude and the phase of this impedance are mainly affected by the variations on the process parameters which in its turn will affect the gain of the squarer circuit that precede the current amplifier (see Eq. (5.38)). This was proved by simulation and a variation on the gain of the squarer circuit of about ±3 db was noticed. Fig. 5.38(a) shows the analytical and Monte-Carlo analysis results for the gain of the current amplifier with variations on the transistors parameters. A gain variation of about ±0.5 db can be noticed. This gain error can be compensated at the amplifying stage at the input of the pulse detector or the receiver. However, when including the process parameters during the Monte-Carlo analysis, we notice a large variation in the circuit passband (the 3-dB cut-off frequency varies from 250 MHz to 1.1 GHz) as shown in Fig. 5.38(b). This is due to variations in the input impedance of the current amplifier. Mainly, the variations in the resistive component (see Fig. 5.37(b)) of this impedance will produce variations in the cut-off frequency. The input impedance depends on the biasing current I bias (see Fig. 5.11) which in its turn is a function of the MOS transistors parameters constituting the circuit. Reducing mismatch effects: modified current amplifier architecture A modified architecture of the amplification stage was described in Fig. 5.11(b). Compared to the previous current amplifier architecture, in this modified architecture, the effects of mismatch errors of MOS transistors parameters (threshold voltage, aspect ratio, surface mobility of the channel and gate oxide thickness) are compensated by alternating the positions of transistors MN 3 and MP 4. Thus, the output offset current is reduced. The modified current amplifier architecture was simulated with Monte-Carlo analysis. Fig. 5.39(a) and Fig. 5.39(b) show the analytical and simulation results of the offset current generated at the output of the current amplifier with

178 146 Implementation Study of an Analog CMOS Pulse Energy Detector Magnitude (kω) R = 1.28 kω 20 0 Phase (deg) Magnitude (kω) R = kω 20 0 Phase (deg) 1.0 R = 1.23 kω R = kω frequency (Hz) frequency (Hz) frequency (Hz) frequency (Hz) (a) (b) Figure 5.37: 500 iterations Monte-Carlo simulation results: Magnitude and phase of the input impedance of the current amplifier with variations on (a) mismatch and (b) mismatch and process parameters Variations on mismatch parameters Analytical results Simulation results Gain (db) 110 KHz, mdb KHz, mdb GHz, -3 db Gain (db) KHz, mdb MHz, -3 db MHz, -3 db Iteration (a) frequency (Hz) (b) Figure 5.38: (a) 500 iterations analytical and Monte-Carlo simulation results for the gain of the current amplifier at 1 MHz with variations on mismatch parameters. (b) 500 iterations Monte-Carlo simulation results: Current amplifier gain with variations on mismatch and process parameters. variations of the transistors parameters mentioned above. Compared to the previous architecture we can observe that the generated offset current at the output of the current amplification stage is less at least by four times when considering mismatch errors on both mismatch and process parameters of transistors constituting the current amplifier. The dashed lines in Fig. 5.39(a) and Fig. 5.39(b) represent the mean and the standard deviation of the offset current at the output of the current amplifier. Fig. 5.40(a) shows the Monte-Carlo analysis results for the gain of the modified current amplifier architecture with variations in the transistors parameters. A gain variation of about 0.8 db can be noticed. As mentioned previously, this gain error