Published in: Proceedings of the 2014 IEEE International Energy Conference (ENERGYCON)

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1 Aalborg Unvertet Modelng, Stablty Analy and Actve Stablzaton of Multple DC-Mcrogrd Cluter Shafee, Qobad; Dragcevc, Tomlav; Quntero, Juan Carlo Vaquez; Guerrero, Joep M. Publhed n: Proceedng of the 24 IEEE Internatonal Energy Conference (ENERGYCON) DOI (lnk to publcaton from Publher):.9/ENERGYCON Publcaton date: 24 Document Veron Early veron, alo known a pre-prnt nk to publcaton from Aalborg Unverty Ctaton for publhed veron (APA): Shafee, Q., Dragcevc, T., Vaquez, J. C., & Guerrero, J. M. (24). Modelng, Stablty Analy and Actve Stablzaton of Multple DC-Mcrogrd Cluter. In Proceedng of the 24 IEEE Internatonal Energy Conference (ENERGYCON) (pp ). IEEE Pre. I E E E Internatonal Energy Conference. ENERGYCON proceedng, DOI:.9/ENERGYCON General rght Copyrght and moral rght for the publcaton made acceble n the publc portal are retaned by the author and/or other copyrght owner and t a condton of acceng publcaton that uer recogne and abde by the legal requrement aocated wth thee rght.? Uer may download and prnt one copy of any publcaton from the publc portal for the purpoe of prvate tudy or reearch.? You may not further dtrbute the materal or ue t for any proft-makng actvty or commercal gan? You may freely dtrbute the UR dentfyng the publcaton n the publc portal? Take down polcy If you beleve that th document breache copyrght pleae contact u at vbn@aub.aau.dk provdng detal, and we wll remove acce to the work mmedately and nvetgate your clam. Downloaded from vbn.aau.dk on: jul 24, 28

2 Th document a preprnt of the fnal paper: Q. hafee, T. Dragcevc, J. C. Vaquez, and J. M. Guerrero, Modelng, Stablty Analy and Actve Stablzaton of Multple DC-Mcrogrd Cluter, n Proc. IEEE Internatonal Energy Conference (EnergyCon 4), 24. Modelng, Stablty Analy and Actve Stablzaton of Multple DC-Mcrogrd Cluter Qobad Shafee, Tomlav Dragcevc, Juan C. Vaquez, and Joep M. Guerrero Inttute of Energy Technology, Aalborg Unverty (AAU) Aalborg Eat DK-922, Denmark Emal: qh, tdr, juq, joz@et.aau.dk Abtract DC mcrogrd (MG), a an alternatve opton, have attracted ncreang nteret n recent year due to many potental advantage a compare to the ac ytem. Stablty of thee ytem can be an mportant ue under hgh penetraton of load converter whch behave a contant power load (CP), and more epecally durng nterconnecton wth other MG, creatng dc MG cluter. Th paper develop a mall gnal model for dc MG from the pont of vew, n order to tudy tablty analy and nvetgate effect of CP and lne mpedance between the MG on tablty of thee ytem. Th model can be alo ued to ynthe and tudy dynamc of loop n dc MG and alo dc MG cluter. An actve tablzaton method propoed to be mplemented a a dc actve power flter (APF) nde the MG n order to not only ncreae dampng of dc MG at the preence of CP but alo to mprove ther tablty whle connectng to the other MG. Smulaton reult are provded to evaluate the developed model and demontrate the effectvene of propoed actve tablzaton technque. Index Term Mcrogrd (MG), dc mcrogrd cluter, contant power load, tablty analy, mall gnal model, actve dampng method. I. INTRODUCTION DC mcrogrd (MG) are reearched recently to facltate ntegratng of modern electronc load and alternatve energy ource wth dc output type uch a photovoltac (PV) ytem, fuel cell, and energy torage (e.g., econdary battery and uper capactor) [] [9], [4]. Normally, dc MG are propoed for power upply of applcaton wth entve and/or dc load lke conumer electronc, electrc vehcle, naval hp, pace craft, ubmarne, ndutral power ytem, telecom ytem and rural area [] to be benefted from ncreaed power qualty, and hgher relablty and effcency. Thee ytem have everal advantage ummarzed a ) the converon loe from ource to load are reduced, thu enhancng the ytem effcency; 2) there no need for of frequency and phae, reactve power, and power qualty whch are all bg challenge n ac MG. Furthermore, ynchronzaton requrement for connecton of ource and ESS to the bu and the man grd are not an ue n dc MG; 3) n the grd connecton mode, any blackout or voltage ag that may happen from the grd de doe not affect the unt nde the dc MG. Although there a gnfcant ncreae of dc MG project nowaday, we can tll fnd lack of tudy about modellng, tablty analy, and of thee ytem, epecally n the cae that they are connected to the other MG to create dc MG cluter. Modelng of power electronc ytem ha been addreed n everal reearch work [] [3], however, yet there no general model for dc MG baed on the ntroduced herarchcal loop []. Stablty of dc MG nfluenced under hgh penetraton of tghtly regulated power converter ued to nterface dtrbuted reource and load [5]. In thee ytem, load converter and battere durng regulated chargng mode behave a contant power load (CP), thu extractng contant power from the MG bu [9]. CP ntroduce a negatve ncremental retance feature, whch reduce the ytem tablty [3] [6]. Moreover, nterconnectng dc MG together n order to create MG cluter tend to detablze the ytem dependng on the lne mpedance between the MG. Several method have been propoed to compenate the CP effect n power electronc converter and MG applcaton [3], [5] [7]. However, no reearch work ha been done to mprove the tablty of MG whle they are connected a MG cluter. To overcome the negatve mpedance ntablty problem of CP, both pave and actve method have been preented. Pave method are bac one that employ dampng pave element() n the (output C flter of) ource converter to rehape t mpedance. Whle actve dampng tratege [4] [7] ue the vrtual loop to mprove the tablty, offerng hgher effcency and relablty. Th paper develop a mall gnal model for nterconnected multple dc MG from the pont of vew. Th model ued to degn the loop and tudy of ther dynamc. It alo ued to tudy mall gnal tablty analy and explore how tablty affected by CP and lne mpedance between the MG. The nfluence of communcaton delay on the ytem tablty can be alo evaluated ung th model. Block dagram of the model are drawn to facltate the analy. The ultmate goal to degn an actve tablzaton loop n order to mprove the tablty of MG cluter at the preence of CP and connecton of MG. II. DC MICROGRID CONFIGURATION Normally a dc MG cont of dtrbuted energy reource (DER) and energy torage ytem (ESS) whch are upplyng ort of electronc load through a common dc bu. Fg. how general confguraton of a low-voltage dc (VDC) mcrogrd. DER ued n a VDC mcrogrd can be varou type uch a

3 Grd DC Bu PV array Wnd turbne Energy Storage the actual voltage of each ource equal to t reference value (ee Fg. 2). In order to connect a number of voltage ource converter (VSC) baed ource n parallel, a vrtual output mpedance loop called droop needed. Th loop hare current between the unt accordngly, and reduce the crculatng current when the MG unt voltage are dfferent. Moreover, t mprove the dynamc performance of the ource output voltage []. Th loop create approprate voltage reference for the voltage nner loop a follow DC laod DC load Plug-n Vehcle Fg.. Typcal confguraton of a low-voltage dc mcrogrd. photovoltac (PV) array, fuel cell, wnd-turbne (WT) generator, and mcroturbne. PV and FC are more approprate to be ued n dc MG nce they produce dc voltage. However, WT and mcroturbne whch generate voltage wth varyng frequency, requre converon to be connected to the dc bu and ued n dc MG. On the other hand, due to tranent repone of ource, and the fact that they cannot be alway avalable (n the cae of RES), ESS are mandatory to be connected to the dc MG. Furthermore, they can be ued for ancllary ervce lke voltage regulaton, power qualty mprovement and emergency power upply. Normally econdary battere, uper capactor, and flywheel are ued a an ESS. Battere and capactor can be drectly connected to the dc bu, but flywheel are connected through a machne and a converter [6]. However, t dered to connect the ESS to the dc bu through converter n order to upply hgh relable power to the load. DER and ESS are connected to a common bu etablhng a dc MG. The common bu lnked to the ource through the power electronc nterface. Dependng on the ource type and voltage, there could be one or two tage of power converon a hown n Fg.. Neverthele, lat converon tage ordnarly a dc-dc converter. To connect dfferent ource and load to the dc MG, dfferent dc-dc converter wth dfferent charactertc mut be ued [8]. The tructure of thee converter mpler than ac-dc one, whch reult n hgher effcency and lower cot. Furthermore, comparng to the ac MG, dc one requre fewer power converter, and t eaer nterfaced to the ource. III. HIERARCHICA CONTRO OF DC MICROGRIDS A herarchcal multlevel trategy ha been ntroduced for MG wth three level of prmary, econdary and tertary []. For dc MG, prmary employed locally for every ource nde the MG n order to regulate the current njecton nto the common bu automatcally. Inner loop are performed to regulate voltage and current whle mantanng the ytem table. Thee loop enure that v ref = v MG R d o () wth vmg beng MG voltage reference, o the output current and R d the vrtual retance. To enure low voltage devaton, low value of droop gan R d ued. The larger droop gan, the more voltage devaton of the dc MG and better load harng. Although t ha been proved that droop an effcent method for parallel operaton of ource nde the MG, t not the bet oluton for the RES ung the droop and partcpatng alway n the voltage upport. It normally preferred to extract maxmum avalable power from RES whenever poble, ung maxmum power pont trackng (MPPT) algorthm. Moreover, approprate method hould be condered n order to recover the tate-of-charge (SOC) of the connected battery nde the dc MG. When battery dcharged, contant voltage chargng normally appled [9]. It worth mentonng that MPPT of RES and chargng of battere act a a contant power ource (CPS) and contant power load (CP), repectvely. Therefore, both tratege are modeled a an adjutable current reference to produce et-pont for the current nner loop a hown n Fg. 2. To um up, combnaton of mandatory droop unt (at leat one for each MG) and optonal CP unt (CPS or CP) ntroduced a prmary of dc MG. The prmary ntroduce the devaton of the common dc bu voltage, due to dbalance between power conumpton and producton. In order to retore the voltage of MG bu to nomnal value, a centralzed voltage econdary can be mplemented. Th trategy whch uually realzed wth tandard PI ler remove the voltage devaton nde the MG by endng an approprate et-pont (a hown n Fg. 2) to the droop ource ung a low bandwdth communcaton (BC). Th gnal change the voltage reference of droop unt() accordngly by hftng the droop lne up and down. Th loop could be alo mplemented n a dtrbuted way over the MG unt ung BC to avod havng a ngle pont falure [9]. On the other hand, n cae that the MG connected to the other dc MG or another dc bu, the concept of tertary mut be employed n order to the power flow. IV. MODEING OF DC MICROGRIDS In th ecton a generalzed model preented for dc MG a well a nterconnected dc MG conderng aforementoned loop. Frt, a mplfed model preented for a buck

4 Source-m v MG... Secondary v MG MPPT or Charge trategy of battery v ref Voltage Source-j ref Current PWM DC Source DC-DC DC common bu R d Droop ow bandwdth communcaton o converter a a bae for mplementng loop, MPPT and then the loop are modeled one by one n order toordevelop Charge a general mall gnal model for dc MG. Fnally, the obtaned trategy of battery model extended v v MGfor nterconnected dc MG MG. A. Mathematcal Model of a Buck Converter Secondary Fg. 2. Prmary and econdary of dc MG. Voltage For mplcty, a buck converter that upple a dc load through a ere C flter analyzed wthout long any generalzaton. Here, an average method R ued o that duty d only the averaged dynamc ha been condered and theduty hgh frequency wtchng dynamc have Droop been neglected. The ow bandwdth communcaton mplfed buck converter wth the correpondng C crcut upportng a dc load modelled a hown n Fg. 3(a). The dc load can be combnaton of retve electronc load and negatve retance of CP. The mathematcal model of the buck converter can be decrbed a follow [6]: d dt C d dt v ref = (duty v n ) R = R (2) wth R beng the total equvalent retance een by the ytem. C, and R are the converter output capactance, nductance and nductor loe, repectvely. Then, the correpondng tranfer functon gven a () duty v n () = C 2 + (R C + R ) + ( + R R ) (3) The locaton of the pole of the C flter hould be nvetgated n order to tudy the tablty of the buck converter. From denomnator of (3) the pole are determned a p,2 = (R C + R ) ± (R C + R ) 2 4C ( + R R ) 2C (4) ref v n R duty v n duty v n v n Current R R DC vdc vdc Source PWM DC-DC (a) R (b) d d o C C R R DC common bu C C R R oad oad Fg. 3. Repreentng the averaged dynamc of a buck converter. (a) equvalent crcut, (b) block dagram To have a table ytem, R C + R hould be potve nce n the practcal cae R > R. It obvou that f R negatve due to the extence of CP, the ytem would nherently be untable. The mathematcal model of (2) repreented a a block dagram n Fg. 3(b). B. Current and Voltage Regulator A functonal dagram of a dc-dc converter nde a MG, nclude prmary and econdary, preented n Fg. 2. A hown n th fgure, the nner current loop employed to regulate the current of dc-dc converter and voltage ler whch generate the current reference ( ref ) for current loop, regulate dc bu voltage. Normally, proportonal-ntegral (PI) ler are ued n thee nner loop. To degn the nner loop and tudy tablty analy a mall gnal model needed. Ung the model derved n the prevou ubecton, a

5 ref k p k R ref PI current regulator k k p v n v d R load Magntude (db) R 25 Fg. 4. Block dagram of the current loop. PI voltage regulator mplfed current loop v ref k p k ref C Fg. 5. Block dagram of dc voltage loop. mplfed current loop developed and the block dagram preented n Fg. 4. A reduced order dagram can be contructed ung the reaonable mplfcaton n whch the R element and nner current loop are condered to follow mpoed reference. Th way, the current loop can be reduced to a frt-order delay to mplfy the analy and derve the analytcal expreon of current regulator []. Accordng to [], the domnant pole of the R load can be canceled by ettng the ntegral tme contant of the PI current regulator equal to that of the load. Therefore, the mplfed current loop hown n Fg. 4 can be repreented a a frt-order tranfer functon wth tme contant of three tme hgher than the ytem amplng tme. Moreover, to mprove the dturbance rejecton capablty, the tme contant of the current regulator can be elected to be ffteen tme hgher than amplng tme of the ytem. It worth notng that the bandwdth of the current PI ler normally condered approxmately twenty tme hgher than the ytem amplng tme []. Smlarly, the voltage loop can be modeled wth the block dagram of Fg. 5. The block dagram how that the current loop modeled ung the frt order tranfer functon. A above mentoned tme contant of the frt order tranfer functon three tme hgher than the ytem amplng tme. Snce amplng frequency for dc ytem practcally hgh, the domnant pole of the mplfed current loop too far, thu one can note that the mplfed current loop (frt order tranfer functon) can be cancel out from the model for more mplfcaton. A ytem wth amplng tme T =. m, =.8 mh, R = 2 mω, and C = 2.2 mf wa mulated and teted ung the developed model. The bode plot wth the ampltude and phae repone of the voltage loop preented n Fg. 6. Aumng bandwdth of 5 Hz for the current loop, parameter of PI voltage ler wa tuned ung the propoed model o that bandwdth of voltage loop approxmately Hz (ee Fg. 6). d Phae (deg) Frequency (rad/) Fg. 6. Frequency repone of the cloed loop voltage regulator. vref C. Prmary Control PI voltage regulator k k p mplfed current loop d ref C R d Droop loop Fg. 7. Block dagram of prmary loop. A aforementoned, ource nde a dc MG can ue two dfferent tratege, where every one of them ha partcular effect on tablty of the ytem. RES can be regulated by droop or led wth MPPT algorthm (CPS), whle battere can be charged n regulated manner (CP) or be regulated by droop a well [9]. An deal CPS modeled a a potve ncremental retance and negatve current ource. Wherea, a complete expreon for current of a perfect CP a follow [6]: R vdc = R CP v + I CP (5) where R CP = V 2 P CP and I CP = 2 P V for a gven operatng pont of I = P V. Therefore, accordng to (5), a perfect CP can be repreented a a negatve retance n parallel wth potve current ource. The negatve retance of CP decreae dampng of the ytem, whle the potve retance of CPS enhance the tablty. Moreover, the potve and negatve contant current ource have no effect on the tablty [7]. Takng the mentoned conderaton nto account, we can conclude that by modellng droop loop and conderng CP n the model, mall gnal tablty analy of the prmary covered wthout long generalzaton. Thu, f tablty can be enured n th wore cae, MG hould be table n all other cae. Fg. 7 preent block dagram of prmary for a dc-dc converter nde a MG. In th dagram, R d vrtual retance of droop loop and R repreent equvalent load that can be combnaton of a retve electronc load wth potve or negatve retance produced by CPS or CP. By extractng the tate pace model of the ytem from

6 5 Imagnary Increang negatve retance R=.6 ohm R= ohm Imagnary 5 =.5 mh =4 mh Real Fg. 8. Famly of the cloed-loop egenvlue of the ytem a the negatve retance of a CP ncreae. MG v ref MG2 v ref 2 PI voltage regulator k k p k k p2 2 R d Droop loop R d 2 mplfed current loop 2 Capactor & load R R C 2 R 2 R 2C2 Te-lne R Fg. 9. Small gnal model of two nterconnected MG. the preented block dagram, mpact of negatve retance of CP, vrtual retance, and other parameter of loop on the ytem tablty can be ealy nvetgated. Notce that n th model the mplfed current loop aumed to be removed for more mplfcaton, nce t domnant pole qute far from the other a explaned above. Ung the extracted tate pace model, the root locu graph plotted, preented n Fg. 8, under gradual change of the negatve retance of a CP from Ω to.6 Ω. A can be oberved, the cloe loop egenvalue travel to the rght hand de of the plane a negatve retance of CP ncreae, whch ndcate untable condton for the ytem. Impact of other parameter of ytem on the tablty can be tuded mlarly. V. SMA SIGNA MODEING OF INTERCONNECTED DC MICROGRIDS DC MG can be made more relable by nterconnectng to the other MG, creatng MG cluter. Th way, each dc MG wll be able to aborb/nject power from/to the other MG. Neverthele, tablty nfluenced dependng on the rato of the retance and nductance of the nterconnected lne. The developed model for dc MG can be ealy expanded for multple dc MG cluter. Block dagram repreentaton of two nterconnected MG wth the mplemented droop- Te-lne current Real Fg.. Famly of the cloed-loop egenvalue of the nterconnected MG for dfferent value of lne nductance. hown n Fg. 9. Here, and R are the nductance and retance of nterconnected lne between MG, repectvely. A the block dagram how, te-lne current added to the nput of RC flter a a dturbance. Ung th model, t poble to tudy mall gnal tablty analy. Moreover, mpact of both CP and nterconnecton lne parameter can be nvetgated. For mplcty, only one ource condered nde each MG to be modeled whch can repreent the MG model generally. However, model of other MG unt can be ealy added n cae t needed. Smlarly, econdary and tertary loop can be added to the preented model. Ung the preented block dagram, a tate pace model extracted accordngly to tudy the behavor of egenvalue and evaluate mpact of dfferent parameter on the ytem tablty. Fg. how the behavor of ytem egenvalue when nductance of nterconnected lne change between.5 mh and 4 mh. VI. PROPOSED ACTIVE STABIIZATION METHOD When connectng MG together, tablty of ytem may be nfluenced dependng on the parameter of nterconnected lne. It hown that f the lne nductance become bgger and the lne retance get maller than ome pecal value, the ytem move toward untable regon. In th ecton, a feed-forward loop propoed a an actve dampng loop to ncreae dampng and mprove tablty of the ytem a hown n Fg.. The am of th loop to reject the mpact of dturbance, whch can be due to ether load change and/or te-lne current, on the ytem. In th method, a dagram of Fg. preent, the dturbance current are meaured, and ent to the compenaton loop through a communcaton lnk, then t hould be feed-forwarded to the nput of current regulator loop ung compenaton gan (k d ). Here, um of load current and te-lne current condered a dturbance nput for feed-forward loop, n order to cancel the mpact of both dturbance. Snce the dc-bu voltage nfluenced by the dturbance, the utlzaton of propoed method remove the ocllaton n the dc voltage. The prncple of rejectng the mpact of the dturbance frt to calculate the compenaton gan. A hown n Fg. 2, root-locu analy appled ung the extracted tate pace model form the block dagram, n order to obtan the feed=forward compenaton gan. A

7 R d2 Droop loop V ref PI voltage regulator k k p Compenaton loop R d Droop loop k d current loop T oad current Te-lne current oad current Fg.. Block dagram repreentng mplementaton of propoed feed-forward compenaton loop. Imagnary kd=. Increang kd C R V DC TABE I EECTRICA SETUP AND CONTRO SYSTEM PARAMETERS Parameter Symbol Value Electrcal parameter dc power upply V n V Output capactance C 2.2e-3 F Converter nductance.8e-3 H Inductor+wtch lo retance R.2 Ω Vrtual retance R d.5 Ω Swtchng frequency f w khz Prmary Control Reference voltage vmg 48 V Proportonal current term k p 5 Integral current term k 994 Proportonal voltage term k pv.2 Integral voltage term k v 97 te-lne parameter ne nductance.8e-3 mh ne retance R.5 Ω no compenaton wth compenaton Real Fg. 2. Famly of the cloed-loop egenvlue of the ytem a the feedforward compenaton gan (k d ) ncreae. DC voltage Connecton of MG oad change 3 th fgure llutrate, egenvalue of the ytem move toward table regon by ncreang k d. It een that the optmal value for compenaton gan k d =.. Parameter hown n Table I are ued for th mulaton. Snce the propoed loop need hgh peed communcaton to receve the te-lne current meaurement, t doe not make ene to mplement t on the all unt nde the MG. Therefore, t propoed to dedcate one unt wth mplemented compenaton loop a a dc actve power flter (APF) to tablze the whole MG. VII. SIMUATION RESUTS Smulaton reult of two nterconnected dc MG are preented n order to how the feablty of developed model and evaluate the propoed actve tablzaton method. MG are connected through hgh retve-nductve lne upportng Ω and 6 Ω load, repectvely. For the mulaton, the MG voltage wa elected at 48 V. Other parameter of ytem can be found n Table I. Fg. 3 how the effectvene of propoed actve dampng loop whle prmary actng over two nterconnected MG. Reult how dc output voltage of MG for dfferent cenaro wth and wthout compenaton loop. A een, MG are connected together at t=.3, whle the load uddenly decreae to half at the mddle of mulaton. It can be oberved that the propoed actve dampng method able to reject the current dturbance produced by both load change and connecton of MG. DC voltage Tme(ec.) (a) MG output voltage Connecton of MG no compenaton wth compenaton oad change Tme(ec.) (b) MG 2 output voltage Fg. 3. Effectvene of propoed actve tablzaton method n rejectng dturbance. VIII. CONCUSION Th paper ha addreed mall gnal modelng and tablty ue n dc MG and dc MG cluter. A model wa developed to degn and yntheze loop of dc MG. Ung th model, mall gnal tablty analy of dc MG and then nterconnected dc MG poble. Impact of negatve ncremental retance caued by CP and parameter of nterconnected lne between MG wa tuded. An actve-dampng method whch a feed-forward compenaton loop, wa propoed to tablze dc MG cluter when they are connected. Th actve dampng method can be alo ued to tablze the dc/dc converter loaded by CP. A th compenaton loop need

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