SMA Board Edge. 82 nh. L sns TBD. L zvs nH. Czv s1. OutA GND. SMD probe loop TP 2. Hin TP 1. L in. H_Sig1. External Oscillator.

Transcription

1 Demonstration System EPC90 Logic Supply Regulator U70 DSOSHF.780 Y U7 NC7SZ00L X U7 NC7SZ08L X Deadtime Rise P7 K D7 0 V 0 m Deadtime Fall P7 Main Supply 9 V max PreRegulator EP C9PR_Rev _.SchDoc Pre-Regulator Figure : EPC9 - ZVS class-d amplifier schematic. JP70." Male Vert. Oscillator Disable O Ω VCC Oscillator IntOsc K R7 Ω H_Sig L _Sig IntOsc JP7." Male Vert. Internal / External Oscillator D7 0 V 0 m R7 0 K J7." Male Vert. Single / Differential Mode R7 80 Ω J." Male Vert. Coil Current Sense J70." Male Vert. External Oscillator H_Sig a EP C9_SE_ZVSclassD_Rev _.SchDoc VMP Out U77 NC7SZ00L X Deadtime Fall P77 K D77 0 V 0 m L _Sig TP TP Out ZVS Tank Circuit U78 NC7SZ08L X Y Deadtime Rise P78 K H_Sig D78 0 V 0 m Pre-Regulator Disconnect Tsns 0 μh : 9.9% J SM oard Edge JMP Single Ended Operation Only L _Sig L zvs 00nH b EP C9_SE_ZVSclassD_Rev _.SchDoc H_Sig VMP L zvs 00 nh L zvs TD Czv s μf 0 V C90 μf, C9 μf, R7 0K R78 80 Ω L _Sig JP0 Jumper 00 D 0 V 0 m C7 pf, 0 V R70 7 K C7 00 nf, V C7 00nF, V C77 00nF, V C78 00 nf, V C70 00 nf, V C7 pf, 0 V JP7 Jumper 00 Czv s μf 0 V JP." Male Vert. R90 00 K % U90 MP 7DJ-L F IN R9 9.9 K % EN 0.8 V F Reg CNTL DRV R9 9. K % D9 D90 0 V PDS0-7 TK FIL M C9 nf, L 90 7 μh 0 m C9 μf, R.8 K % R77 Ω R. K % Reverse Polarity Protection C 80 pf, 0 V R ohm/ W P 0 K Current Set/djust D7 0 V 0 m R7 0K J7." Male Vert. odulation L sns 8 nh C7 pf, 0 V D, SMJ Tsns CST700-00L :0 Current Xrmr C 90 pf, 0 V EPC EFFICIENT POWER CONVERSION CORPORTION COPYRIGHT 07

2 Demonstration System EPC90 JP0." Male Vert. PreRegulator Disable R Ω C 00 pf F/SD R 00 K % Figure : EPC9 - Pre-regulator schematic for wireless power transfer source. V VGD Gate Driver VGD PH PL PH R80 Ω PL SW R0 0 m Ω 0.W Vsepic R K % R 8. K % PreDR PWM R 0 Ω C 0nF, 0V VDD LDO U80 UCC7DRV VREF VSS EP C μf.v D C μf D0 MRS00TG 00V C μf Ground Post C.7 μf 00 V 0 R 8. K % R 8. K % Vsepic V+ V- CMP+ UVLC VCC U0 L T90I MS#PF Lo Latch Hi R Vsepic 7 mω 0. W I+ CLR LE I- Q Imon CMPout CMPout Imon D Power Mode D Current Mode R K R. K Output Voltage Limit D0 Vom Output Power Limit D 0 V 0 m Comp R0 0 Ω C0 00nF, 00 V R8 0 Ω L 80 0 μh 0 m VGD C8 pf, 0 V C80 μf, 0 V VGD C8 00 nf, V Output Current Limit D 0 V 0m C pf, 0 V C pf, 0 V R0 C0 00nF, 00 V V+ Pcmp C pf, 0 V DC Power Monitor C.7μF 00 V D7 R Ω L 0 00 µh PH0 ProbeHole GP 0." Male Vert. Pcmp R8 9.9 K % R.0 K R 0. K R7 0 K % R9.0 K R0 K R8. K D7-7 0 V 0 m C 0.8 μf, 0 V 0 V 0m Pled Iled R 8 K % C0 00 nf, V U0 TL V0I DVR Voltage Mode R Ω R 8 K % V R0 K R.0 K R.8 K % R 70 K C0 00nF, V U0 TL V0I DVR R0 7. K R.0 K R.8 K % C nf, 0 V C nf, 0 V UVLO D CD00- ZV9 UVLO Limit UVLO Ven=8 V, Vsh=7. V R7 0 K C μf, C nf, 0 V C nf, 0 V R 0 K UVL O Under-Voltage Lock-Out Set to 8 V with +/- 0.7 V hysteresis Q0 EPC09 00 V 9 mω Osc ias R8 K 7 0 F/Sync/SD Comp.7 F Isens U0 LM8MM/NOP gnd Cnt Pgnd UVLO DR 9 R. K C nf, 0 V 8 R 00 Ω C 0nF, 0 V R7 0 K % /W C7 0nF, 00 V D7 00 V, EPC EFFICIENT POWER CONVERSION CORPORTION COPYRIGHT 07

3 Demonstration System EPC90.7 V Gbtst VHS D CZRUCV D Synchronous oostrap Power Supply R 7 K R 0 Ω C 00 nf, V C pf, 0 V C 00 nf, V Q EP C08 00V 800 mω R.7 Ω C 00 nf, V C nf, D VMP 0 nf, 00 V C C 0 nf, 00 V C 0 nf, 00 V C μf 00 V C μf 00 V C μf 00 V VHS C7 pf, 0 V U L MTM Gate Driver Out.7 V D TK FIL M C μf, 0 V PH ProbeHole Out Q EPC800 Q EPC800 GP." Male Vert. Ground Post Figure : EPC9 - Gate driver and power devices schematic. This schematic is repeated for each single-ended ZVS class-d amplifier. C7 μf 00 V EPC EFFICIENT POWER CONVERSION CORPORTION COPYRIGHT 07

4 Demonstration System EPC90 J SM PC Edge C trombone 0 pf djust on trombone mplifier Connection C 0 pf PC ClsPTU C 7. pf Coil tuning C Figure : Class source board schematic. Kelvin Output Current TP TP Coil CM CM CM nf CM LM SMD probe Vrec t D80 0 V PDS0-7 D8 0 V PDS0-7 R8 0 7 mω W TP TP Kelvin Output Voltage Vo ut Vo ut Output J8." Male Ve rt. 0 p F 8 nh RX Coil Coil CMP CMP CMP CMP CM nf CM7 Matching LM 8 nh Vrec t Vrect C8 00 nf, 0 V Vrect C8 0 μf 0 V R8.7 K D8 LED 00 Green R8 Ω D8 LED 00 Red CM 0 pf CM8 D8 0 V PDS0-7 D8 0 V PDS0-7 D88.8 V,. SMJ0 D8 D87.7 V 0 mw V 0 mw Over-Voltage Protection Figure 7: irfuel Category wireless device board schematic. Receive Indicator > V Over-Voltage Indicator > V EPC EFFICIENT POWER CONVERSION CORPORTION COPYRIGHT 07

5 Demonstration System EPC90 Kelvin Output Current TP TP J8." Male Vert. Shunt ypass CM CM CM 70 pf CM pf LM 8 nh V RECT D80 0 V, D8 0 V, R80 00 mω, W TP TP Kelvin Output Voltage V J8." Male Vert. Output Cl CatPRU CMP CMP RX Coil CM P pf CMP CM 70 pf CM 7 Matching LM 8 nh V RECT V RECT V V C8 00 nf, 0 V C8 0 µf, 0 V R8.7 K D8 LED 00 Green R8 Ω D8 LED 00 Red CM CM 8 8 pf D8 0 V, D8 0 V, D8 D87.7 V, 0 mw V, 0 mw Receive Indicator V > V Over-Voltage Indicator V > V Figure 8: Category device board schematic. EPC EFFICIENT POWER CONVERSION CORPORTION COPYRIGHT 07 7