Development Board EPC9065 Quick Start Guide. EPC2007C, EPC MHz, High Power ZVS Class-D Development Board

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1 Development Board Quick Start Guide EPC007C, EPC MHz, High Power Class-D Development Board

2 DESCRIPTION The is a high efficiency, Zero Voltage Switching () differential mode Class-D amplifier development board that operates at, but is not limited to, 6.78 MHz (Lowest ISM band). The purpose of this development board is to simplify the evaluation process of a high power Class-D amplifier, for use in applications such as AirFuel TM Alliance wireless power using egan FETs, by including all the critical components on a single board that can be easily connected into an existing system. To support the increased power capability, two mounted heat sinks are included. The amplifier board features the EPC007C and the EPC800, which are 00 V rated enhancement-mode gallium nitride FETs (egan FET). The EPC007C is used in the Class-D amplifier while the EPC800 is used as a synchronous bootstrap FET. The amplifier can be set to operate in either differential mode o r single ended mode and includes t he g ate d rivers and 6.78 MHz oscillator. Table : Performance Summary (T A = 5 C) Symbol Parameter Conditions Min Max Units V DD Logic Input Voltage Range 7.5 V V AMP Amp Input Voltage Range 0 80 V V OUTA Switch Node Output Voltage 80 V V OUTB Switch Node Output Voltage 80 V I OUT V extosc V Osc_Disable I Osc_Disable Switch Node Output Current (each) External Oscillator Input Threshold Oscillator Disable Voltage Range Oscillator Disable Current Input Low Input High Open drain/ collector Open drain/ collector * A RMS V V ma * Maximum current depends on die temperature actual maximum current will be subject to switching frequency, bus voltage and thermals. For more information on the EPC007C or EPC800 egan FETs please refer to the datasheet available from EPC at The datasheet should be read in conjunction with this quick start guide. DETAILED DESCRIPTION The consists of a differential mode Class-D amplifier, a 6.78 MHz oscillator, and a separate heat sink for each Class-D section. The power schematic of the is shown in figure. For operating frequencies other than 6.78 MHz, the oscillator can be disabled by placing a jumper into J60 or can be externally shutdown using an externally controlled open collector / drain transistor on the terminals of J60 (note which is the ground connection). The oscillator disable switch needs to be capable of sinking at least 5 ma. The external oscillator can then be connected to J7. V IN + Q Q Coil connection L L L Q Q Timing Adjustment Setting the correct time to establish transitions is critical to achieving high efficiency with the amplifier. This can be done by selecting the values for R7, R7, R73, and R74 respectively. This procedure is best performed using a potentiometer installed at the appropriate locations (P7, P7, P73, and P74) that is used to determine the fixed resistor values. The timing MUST initially be set without a load connected to the amplifier. The timing diagrams are given in figure 4 and should be referenced when following this procedure. Only perform these steps if changes have been made to the board as it is shipped preset. The steps are:. With power off, connect the logic input supply (7.5 - V) to V DD connector (J90). Note the polarity of the supply connector.. Connect a LOW capacitance oscilloscope probe to the probe-hole of the half-bridge to be set and lean it against the ground post as shown in figure Turn on the logic supply make sure the supply is set to approximately V. Figure : Power schematic of the differential mode amplifier 4. Turn on the main supply voltage to to ensure that the switch node waveform looks similar to figure 4. If not, adjust the potentiometers. After verification, the main supply voltage can be set to the required predominant operating value (such as 4 V but NEVER exceed the absolute maximum voltage of 80 V). 5. While observing the oscilloscope, adjust the applicable potentiometers to achieve the green waveform of figure Repeat for the other half-bridge. C C 7. Replace the potentiometers with fixed value resistors if required. PAGE EPC EFFICIENT POWER CONVERSION CORPORATION COPYRIGHT 06

3 Determining component values for L The tank circuit is not operated at resonance, and only provides the necessary negative device current for self-commutation of the output voltage at turn off. The capacitors C and C are chosen to have a very small ripple voltage component and are typically around µf. The amplifier supply voltage, switch-node transition time will determine the value of inductance for L x which needs to be sufficient to maintain operation over the DC device load resistance range and coupling between the device and source coil range and can be calculated using the following equation: L = () Where: Δt vt ƒ SW COSSQ Cwell t vt 8 fsw ( C OSSQ + C well ) = Voltage Transition Time [s] = Operating Frequency [Hz] = Charge Equivalent Device Output Capacitance [F] = Gate Driver Well Capacitance [F]. For the LM53, use 0 pf. NOTE. The amplifier supply voltage V AMP is absent from the equation as it is accounted for by the voltage transition time. The per device charge equivalent capacitance can be determined using the following equation: V C OSSQ = AMP COSS (v) dv 0 VAMP To add additional immunity margin for shifts in load impedance, the value of L can be decreased to increase the current at turn off of the devices (which will increase device losses). Typical voltage transition times range from ns through ns. For the differential case the voltage and charge (C OSSQ ) are doubled when calculating the inductance. (). Make sure the entire system, including the heat sink assembly, is fully assembled prior to making electrical connections. This includes any load to be connected.. With power off, connect the main input power supply bus to the bottom pin of J50 and the ground to the ground connection of J50 as shown in figure. 3. With power off, connect the logic input power supply bus to +V DD (J90). Note the polarity of the supply connector. This is used to power the gate drivers and logic circuits. 4. Make sure all instrumentation is connected to the system. 5. Turn on the logic supply make sure the supply is between V. 6. Turn on the main supply voltage, starting at 0 V and increasing slowly to the required value (it is recommended to start at for dead time tuning purposes and do not exceed the absolute maximum voltage of 80 V). 7. Once operation has been confirmed, adjust the main supply voltage within the operating range and observe the output voltage, efficiency and other parameters on both the amplifier and device boards. 8. For shutdown, please follow steps in the reverse order. Start by reducing the main supply voltage to 0 V followed by steps 6 through. NOTE. When measuring the high frequency content switch-node (Source Coil Voltage), care must be taken to avoid long ground leads. An oscilloscope probe connection (preferred method) has been built into the board to simplify the measurement of the Source Coil Voltage (shown in figure 3). QUICK START PROCEDURE The amplifier board is easy to set up and evaluate the performance of the egan FET in a wireless power transfer application. Please note that main power is connected directly to the amplifier. Hence, there is no thermal or over-current protection to ensure the correct operating conditions for the egan FETs. If the main power is sourced from a benchtop DC power supply, it is highly advised to set a reasonable current limit of ma during initial evaluation. amplifier board with heat sink photo EPC EFFICIENT POWER CONVERSION CORPORATION COPYRIGHT 06 PAGE 3

4 7.5 - V DC Gate drive and control supply (note polarity) V DC + V IN supply (note polarity) Amplifier timing setting (not installed) External oscillator input (optional) Disable pre-regulator jumper Switch-node main oscilloscope probe Ground post Figure : Proper connection and measurement setup for the amplifier board Do not use probe ground lead Ground probe against post Place probe tip in large via Minimize loop Figure 3: Proper measurement of the switch nodes using the hole and ground post PAGE 4 EPC EFFICIENT POWER CONVERSION CORPORATION COPYRIGHT 06

5 Q turn-off Q turn-off V AMP V AMP Q turn-on Q turn-on 0 Partial time Shootthrough Shootthrough 0 Partial time + Diode Conduction + Diode Conduction Figure 4: timing diagrams THERMAL CONSIDERATIONS The development board showcases the EPC007C and EPC800 egan FETs in a Class-D amplifier application. Although the electrical performance surpasses that of traditional silicon devices, their relatively smaller size does magnify the thermal management requirements. The operator must observe the temperature of the gate driver and egan FETs to ensure that both are operating within the thermal limits as per the datasheets. A heat sink kit is mounted on each half bridge of the board. Figure 5 shows the assembly order for the heat sink kit. NOTE. The development board has no current protection on board and care must be exercised not to over-current or over-temperature the devices. Excessively wide coil coupling and load range variations can lead to increased losses in the devices. Precautions The development board has no controller or enhanced protection systems and therefore should be operated with caution. Some specific precautions are:. It is highly advised to set a reasonable current limit of ma during initial evaluation.. Ensure that the gap pad included in the heat sink assembly is firmly compressed on the egan FETs prior to full power operation. Be careful not to damage the die by over-tightening of the bolts. 3. Please contact EPC at info@epc-co.com should there be questions regarding specific load range impedance requirements. Heat sink shim Cross-section plane Mounting holes center line EPC die 56 nylon hex nut 56 x / inch nylon screw Heat sink (5 mm x 5 mm x 4.5 mm) Thermal interface material for device 5 mm x 5 mm. adhesive on both sides of thermal pad OPTIONAL interface frame heat sink rests on frame (thickness = die thickness) Figure 5: Heat sink kit assembly EPC EFFICIENT POWER CONVERSION CORPORATION COPYRIGHT 06 PAGE 5

6 Table : Bill of Materials - Amplifier Board Item Qty Reference Part Description Manufacturer, Part Number C_, C_ Capacitor, Ceramic, 4.7 µf, 0 V, ±0%, X5R Samsung, CL05A475MP5NRNC 4 C5, C6, C5, C6 Capacitor, Ceramic,. µf 00 V, ±0%, X7R Taiyo Yuden, HMK35B75KN-T 3 Czvs, Czvs Capacitor, Ceramic,.0 µf, 50 V, ±0%, X7R Taiyo Yuden, C0X7RH05K5AB 4 3 C90, C9, C9 Capacitor, Ceramic,.0 µf,, ±0%, X7R TDK, C608X7RE05K 5 C7, C7, C73, C74, C_, C_, C4_, C4_, C5_, C5_, C60 Capacitor, Ceramic, 00 nf,, ±0%, X5R TDK, C005X5RE04K050BC 6 8 C, C, C3, C4, C, C, C3, C4 Capacitor, Ceramic, 0 nf, 00 V, ±0%, X7S TDK, C005X7SA03K050BB 7 C3_, C3_ Capacitor, Ceramic, nf,, ±0%, X7R TDK, C005X7RE3K050BB 8 4 C4, C43, C46, C47 Capacitor, Ceramic, pf, 50 V, ±5%, NPO TDK, C005C0GH0J050BA 9 R60 Resistor, 47 KΩ, ±5%, /0 W Stackpole, RMCF0603JT47K0 0 R75 Resistor, 0 KΩ, ±5%, /0 W Stackpole, RMCF0603FT0K0 R3_, R3_ Resistor,.74 KΩ, ±%, /6 W Panasonic, ERJ-RKF74X R7, R74 Resistor, 470 Ω, ±%, /6 W Stackpole, RMCF0603FT470R 3 R7, R73 Resistor, 390 Ω, ±%, /6 W Stackpole, RMCF0603FT390R 4 R_, R_ Resistor, 0 Ω, ±5%, /6 W Stackpole, RMCF040FT0R0 5 R4_, R4_ Resistor, 6.8 Ω, ±5%, /0 W Panasonic, ERJ-GEJ6R8X 6 4 R, R, R, R Resistor,. Ω, ±5%, /6 W Yageo, RC040JR-07RL 7 R76, R77 Resistor, 0 Ω, /6 W, Jumper Yageo, RC040JR-070RL 8 Lzvsb, Lzvsb Inductor, 390 nh, ±5%, ±%, Q=80 I RMS =4.4 A, 4.5 mω, Resonance=590 MHz Coilcraft, 99SQ-39JEB 9 8 D_, D_, D3_, D3_, D7, D7, D73, D74 Diode, Schottky Diode, 30 V, V F =370 mv at ma, 30 ma Diodes Inc, -7 0 D4_, D4_ Diode, Zener, 5. V, 50 mw ±5% Bourns Inc., BZT5C5VT-7 D_, D_ Diode, Schottky, 40 V, 300 ma, V F =900 mv at 00 ma ST Microelectronics, BAT54KFILM 4 Q, Q, Q, Q egan FET, 00 V, 6 A, R DS(on) =30 mω at 6 A, EPC, EPC007C 3 Q4_, Q4_ egan FET, 00 V, 3.4 A, R DS(on) =60 mω at 500 ma EPC, EPC800 4 U90 IC s, LDO, 50 ma, up to 6 V IN, V dropout =0.33 V at 50 ma Microchip, MCP703T-500E/MC 5 U_, U_ IC s, Gate Driver, 5. VDC,. A, 4. to 5. Texas Instruments, LM53TME/NOPB 6 U7, U74 IC s, Logic NAND Gate,.6 to 5., ± 4 ma Fairchild, NC7SZ00L6X 7 U7, U73 IC s, Input NAND Gate, Tiny Logic,.6 to 5., ± 3 ma Fairchild, NC7SZ08L6X 8 U60 IC s, Programmable Oscilator.5 to 60 MHz, V IN =.8 V/./.8 V/3.0 V/3.3 V/5.0 V Daishinku, DSOSHF TP, TP Test Point, Test Point Subminiature Keystone, J60, J7, J90 Header, Male Vertical, 36 Pin. 30" Contact Height,." Center Pitch FCI, HLF 3 J Connector, RP-SMA Plug, 50 Ω Linx, CONREVSMA J50 Connector, Header Pin.56 Pitch Vertical Gold Molex Inc, PCB PCB, REV CCI, REV 34 C75 Capacitor, DNP, 00 pf, Generic 35 4 P7, P7, P73, P74 Potentiometer, DNP, Multi Turn Potentiometer, kω, ±0%, /4 W, Turn Top Adjustment Small Murata, PV37Y0C0B00 36 Lzvsa, Lzvsa Inductor, DNP, 70 nh, ±5%, Q= 50, DCR=.5, F=50 MHz CoilCraft, SQ-7JEB 37 C44 IC s, DNP, Programmable Oscillator 3.3 V, OE, Demo is pre-programmed to 6.78 MHz 38 GP, GP Header, DNP." Male Vert. Tyco, EPC would like to acknowledge Coilcraft ( and KDS Daishinku America ( for their support of this project. EPSON, SG-800CE-PHB, or KDS Daishinku America, DSOSHF 6.780/XSF006780EH EPC EFFICIENT POWER CONVERSION CORPORATION COPYRIGHT 06 PAGE 6

7 Hin L in Q4 EPC800 C 00 nf, Gbtst R4 6.8 Ω C4 00 nf, HS D4 CD0603-Z5V D3 Synchronous Bootstrap Power Supply 4.7 V C5 00 nf, R3.7 K R 0 Ω Hin L in C3 nf, D GL H U L M53TM HS GUH GUL HS GUH GUL 4.7 V D BAT54K FILM GLH GLL GL H GL L C 4.7 μf, 0 V Gate Driver Figure 6: - Gate Driver Schematic EPC EFFICIENT POWER CONVERSION CORPORATION COPYRIGHT 06 PAGE 7

8 R75 0 K A B U7 NC7SZ08L6X Y R7 470 Ω Deadtime Right P7 DNP K A U7 NC7SZ00L6X D7 R7 390 Ω Deadtime Left P7 B DNP K D7 390 Ω Deadtime Right P Ω Deadtime Left P74 HS GRH GRL GL H GL L HighEffGateDrvr_r_0.SchDoc Gate Driver L _Sig HS GRH GRL GL H GL L Gate Driver U60 Pgm Osc. Figure 7: Class D Schematic R Ω GRH GRL Q EPC007C GL H GL L Q EPC007C R Ω GRH GRL Q EPC007C GLL Q EPC007C OutA C5. μf, 00 V 4 C75 DNP 00 pf, Logic Supply 7.DC - VDC J90 V7 in." Male Vert. VDD C7 00 nf, C7 00 nf, C73 00 nf, C74 00 nf, U V 50 ma DFN OUT C90 C9 μf, μf, Logic Supply Regulator C9 μf, H_Sig VCC 3 Osc OE OUT C60 00 nf, Oscillator GL H IN OutA R k J60 OutB J7 Osc." Male Vert. Oscillator Output H_Sig L _Sig H_Sig L _Sig OutB." Male Vert. Oscillator Disable Main Amplifier GP EMPTY." Male Vert. Secondary Amplifier GP EMPTY." Male Vert. J50.56" Male Vert. Main Supply 0 V ~ 80 V 4 A max PH ProbeHole L zvsa DNP 70 nh J SM A Board Edge Czvs μf, 50 V Tank Circuit L zvsa DNP 70 nh 40 V, 30 ma 40 V, 30 ma A B U73 NC7SZ08L6X Y R7 3 DNP K A U74 NC7SZ00L6X D73 40 V, 30 ma R7 4 B DNP K D74 40 V, 30 ma L _Sig H_Sig C4 pf, 50 V Hi n L in HS GUH GUL GL H GL L C43 pf, 50 V R7 6 0 Ω C46 pf, 50 V R7 7 0 Ω Hi n L in HS GUH GUL GL H GL L C47 pf, 50 V HighEffGateDrvr_r_0.SchDoc TP SMD probe loop R Ω TP SMD probe loop Ground Post R Ω Ground Post L zvsb 390 nh Czvs μf, 50 V L zvsb 390 nh PH ProbeHole C C 0 nf, 00 V 0 nf, 00 V C3 C4 0 nf, 00 V 0 nf, 00 V C6. μf, 00 V HS HS- 5 mm x 5 mm WMount HS HS- 5 mm x 5 mm WMount C C 0 nf, 00 V 0 nf, 00 V C5. μf, 00 V C3 C4 0 nf, 00 V 0nF, 00 V C6. μf, 00 V PAGE 8 EPC EFFICIENT POWER CONVERSION CORPORATION COPYRIGHT 06

9 For More Information: Please contact or your local sales representative Visit our website: Sign-up to receive EPC updates at bit.ly/epcupdates or text EPC to 88 EPC Products are distributed through Digi-Key. Demonstration Board Notification The board is intended for product evaluation purposes only and is not intended for commercial use. As an evaluation tool, it is not designed for compliance with the European Union directive on electromagnetic compatibility or any other such directives or regulations. As board builds are at times subject to product availability, it is possible that boards may contain components or assembly materials that are not RoHS compliant. Efficient Power Conversion Corporation (EPC) makes no guarantee that the purchased board is 00% RoHS compliant. No Licenses are implied or granted under any patent right or other intellectual property whatsoever. EPC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. EPC reserves the right at any time, without notice, to change said circuitry and specifications.

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