OWING TO its wide bandgap, high electron mobility,

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1 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 58, NO. 5, MAY Pulsed-IV Pulsed-RF Cold-FET Parasitic Extraction of Biased AlGaN/GaN HEMTs Using Large Signal Network Analyzer Chieh Kai Yang, Patrick Roblin, Member, IEEE, Fabien De Groote, Steven A. Ringel, Senior Member, IEEE, Siddharth Rajan, Jean Pierre Teyssier, Christiane Poblenz, Yi Pei, James Speck, and Umesh K. Mishra, Fellow, IEEE Abstract A new pulsed-iv pulsed-rf cold field-effect transistor (cold-fet) technique is presented to extract the parasitics of AlGaN/GaN HEMTs under various quiescent dc-biasing points. The measurement system implemented with a large signal network analyzer applies the technique of multiple recording to acquire pulsed-rf small-signal -parameters with no loss of dynamic range as the pulse duty cycle decreases. These cold-fet measurements are performed on unpassivated and silicon nitride (SiN) passivated devices by turning the device off for 1 s with a 1% duty cycle to analyze the impact of slow thermal and trapping effects on the device parasitics. The parasitic fringe capacitances extracted are found to be bias independent, except for the gate to drain capacitance in devices without SiN passivation. In unpassivated devices, the drain parasitic resistance is found to rapidly increase with increasing drain bias at negative gate to source voltages. On the contrary, in devices with SiN passivation, the dependence of the resistance with the drain bias voltage is much less significant. A simple physical model is used to fit the functional dependence of the 2-D electron gas (2DEG) concentration upon the gate-to-source and gate-to-drain voltages, which is then proposed for fitting the measured data. The analysis indicates that the variation of the resistance with bias voltage in the device studied with SiN passivation and also for the unpassivated device at GS = 0 Vis well accounted for by the reduction of the mobility with increased temperature due to self-heating, whereas for the device studied without SiN passivation, the increase of the drain resistance with drain voltages at negative gate bias principally arises from the decrease of the 2DEG population in a narrow region near the gate contact. An equivalent circuit is also introduced to explain the decrease of the source and drain parasitic inductances with increasing drain voltages at large negative gate bias, which is observed in unpassivated devices. Index Terms Cold field-effect transistor (cold-fet), HEMTs, pulsed RF, resistance, silicon nitride (SiN), surface states, thermal. Manuscript received September 14, 2009; revised December 19, First published April 08, 2010; current version published May 12, This work was supported by the Office of Naval Research (ONR) under Grant ECS The work of F. De Groote was supported by the National Science Foundation (NSF) under Grant ECS C. K. Yang, P. Roblin, S. A. Ringel, and S. Rajan are with the Department of Electrical and Computer Engineering, The Ohio State University, Columbus, OH USA ( roblin@ece.osu.edu). F. De Groote was with the Department of Electrical and Computer Engineering, The Ohio State University, Columbus, OH USA. He is now with the Verspecht Teyssier DeGroote s.a.s. Corporation, Brive, France. J. P. Teyssier is with the Verspecht Teyssier DeGroote s.a.s. Corporation, Brive, France. C. Poblenz, Y. Pei, J. Speck, and U. K. Mishra are with the Materials Science Department and the Electrical Engineering Department, University of California at Santa Barbara, Santa Barbara, CA USA. Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /TMTT I. INTRODUCTION OWING TO its wide bandgap, high electron mobility, and high thermal conductivity, AlGaN/GaN HEMTs are highly promising devices for applications in high-power and high-temperature environments due to the advantageous material properties of GaN. In the early stage of development, undesirable degradations of the device characteristics were observed under high bias operations. These performance degradations include the dc current dispersion, in which the drain current collapses at high drain-tosource voltage, and the RF current dispersion, in which a reduction of RF output power is observed [1], [2]. Much effort has been devoted to reducing current dispersion phenomena. Silicon nitride (SiN) passivation and field plates have been found to provide the most successful remediations [1], [3]. At the same time, many research investigations have been pursued to identify the physical sources of dispersions [4] [9] owing to their potential correlation to device aging and device failure. Self-heating and various trapping mechanisms can contribute to the dc current dispersion. Self-heating, which leads to a decrease of the mobility and saturation velocity, has been identified as the dominant effect leading to reversible knee walk-out in passivated GaN HEMTs on sapphire substrates [11]. Presently, most GaN HEMTs are fabricated on a silicon carbide (SiC) substrate, which, owing to its excellent thermal conductivity, greatly alleviates the self-heating problem. However, some residual self-heating effects still need to be accounted for. Fig. 1 shows various major trapping mechanisms. They include: 1) trapping at the AlGaN surface and 2) trapping in the buffer, which affect, respectively, the source and drain resistance and the threshold voltage. In the devices studied in this work, the variation of the threshold voltage is found to be rather negligible [10]. Though the physical processes are still under debate, the surface charge on top of the AlGaN layer is believed to sustain the 2-D electron gas (2DEG) in the gate drain and gate source regions. As the gate potential relative to the source and drain potential becomes more negative, the electron population of the AlGaN donor traps increases, which induces, in turn, a depletion of the 2DEG concentration. This is the so-called virtual gate effect [12]. The resulting increase in the source and drain parasitic resistances at high bias can then profoundly affect the dc and RF performance of the GaN HEMT devices [14] /$ IEEE

2 1078 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 58, NO. 5, MAY 2010 Fig. 1. Physical model with various trapping mechanisms. The extraction of the parasitic elements in a transistor is one of the very first steps in device modeling. Bias-dependent parasitics have been well documented in silicon MOSFETs and III V HEMTs and have been found to arise from various mechanisms [15], [16], but fewer works have been reported on AlGaN/GaN HEMTs [17] [19]. In this paper, a new pulsed-iv pulsed-rf measurement techniques using a large signal network analyzer (LSNA) is used to extract the bias-dependent parasitics in AlGaN/GaN HEMTs. This approach effectively extends the traditional cold-fet technique [20] to allow for the characterization of the bias and temperature dependence of the parasitics. Since the cold-fet technique by definition uses zero drain bias, it is necessary to use low duty-cycle pulse from well-defined bias conditions to investigate the desired bias and temperature dependence. It is known that pulsed measurements realized with a vector network analyzer (VNA) suffer from a loss of dynamic range when the duty cycle of the pulse is getting smaller and this can severely degrade the measurement accuracy [22]. This is due to the fact that VNAs only acquires the center tone resulting in a dynamic range reduction given by Duty Rate A modified measurement method was introduced for the LSNA in which all the tones within the main lobe of the signal (90% of the power) are acquired to compensate for the loss of dynamic range [23]. However, this method, which requires some signal processing, is still limited in practice to duty cycle above 0.3%. Indeed, as the number of tones increase for decreasing duty cycle, the peak RF power is divided among more tones owing to the lower repetition frequency, and the power of the individual tone will eventually fall below the minimum detectable power level of the LSNA assuming the peak RF power is kept the same. Indeed, by definition, pulsing a signal leads to a reduction of the average signal power by Duty Rate Recently, a pulse control board (see Fig. 2) was developed and demonstrated for the LSNA, which allows for arbitrarily low duty cycle without any dynamic range limitation. Making use of the multiple recording feature in modern analog digital converters (ADCs), the pulse control board controls the ADC acquisition such that the sampled down-converted RF data of the LSNA are only acquired during the time when a pulse is applied Fig. 2. Pulsed-IV/RF measurement system utilizing the modified LSNA. [21], [22], [24]. The data acquisition is fully synchronized so that the operation is quasi-transparent for the LSNA. Since the average power of the signal acquired is now the peak power of the pulsed signal, this modified LSNA data acquisition does not exhibit any degradation in dynamic range for decreasing pulse duty cycle. This 0-dB desensitization is, however, achieved at the price of longer measurement times. This pulsed measurement method is used in this work for extracting the small-signal pulsed -parameters needed for pulsed-iv pulsed-rf cold-fet measurements. In Section II, the pulsed-iv pulsed-rf measurement setup utilizing the modified LSNA and the devices-under-test (DUTs) are introduced. Details of the extraction procedures of the parasitics of devices are then provided in Section III. Section IV presents the measurement results obtained together with supportive physical device modeling. The contribution of this work are summarized in Section V. II. PULSED-IV PULSED-RF MEASUREMENT SETUP AND DUTS A schematic for the pulsed-iv pulsed-rf measurement setup developed is shown in Fig. 2. The dc bias and pulsed bias are combined together with a baseband bias tee. The resulting time varying bias voltages are then added to the pulsed RF signal generated by the RF sources using an RF bias tee. The combined dc, pulsed, and RF signal is then fed to the device. The synchronization of the pulsed bias and pulsed RF signal is precisely controlled by the delay generator, which can output separate triggers for different instruments. A trigger is also sent to the oscilloscope for monitoring the timing of the applied pulsed bias and pulsed RF signal. The reference timing for all the triggers output from the delay generator is controlled by an external trigger sent by the pulse control board. At the same time, the pulse control board sends another trigger to the ADC to control the data acquisition. The pulse control board itself includes a tunable delay for the trigger sent to the ADC to ensure that the peak of the pulsed RF signal is measured at the desired time while compensating for the sampler latency. In addition, the pulse control board, the controlling the samplers and the controlling the ADCs, the oscilloscope and the delay generator are all locked to the 10-MHz reference clock signal generated by the RF source so that all instruments share the same time base. Note that the clock for the ADC is set by a source, which is separate

3 YANG et al.: PULSED-IV PULSED-RF COLD-FET PARASITIC EXTRACTION OF BIASED AlGaN/GaN HEMTs 1079 Fig. 4. Wave-equation-based equivalent circuit used for the cold-fet parasitics extraction. Fig. 3. Measured traveling waves of the pulsed-rf signal with 700- and 2000-ns pulsewidths are compared with those obtained for a CW-RF signal of the same peak power. from the one controlling the samplers so that the sampling and ADC frequencies, locked as well on the same 10 MHz, can be set independently. Beside synchronizing the data acquisition of the LSNA with the pulsed IV bias applied, the function of the pulse control board includes making sure that the suspended data acquisition is resumed at the correct sampling time to correctly capture the sampling downconverted RF signal without introducing any spectral leakage. As recently demonstrated, the technique of multiple recording can also be used to measure simultaneously pulsed and modulated RF signals [13]. To verify the functionality of the setup and to select the correct data acquisition time of the ADC, the measured incident and reflected waves of a calibration standard Through are compared in Fig. 3. The peak output power levels of the pulsed-rf signal, with two different pulsewidths and the same pulse repetition period, and continuous wave RF (CW-RF) signal from the RF source are both 0 dbm. It is demonstrated that, with the change of pulse duty cycle, no significant change in the measured peak power level and noise floor is observed. This demonstrates that the setup does not exhibit any degradation in dynamic when the pulse duty cycle decreases. Two AlGaN/GaN HEMTs were used for the pulsed-iv pulsed-rf measurements with one passivated with a 160-nm SiN layer on the surface and with the other without any passivation. Both devices are grown on the same SiC substrate and are composed of a 830-nm-thick unintentionally doped (UID) GaN layer sandwiched between a 50-nm-thick AlN layer and a 30-nm-thick AlGaN layer with 28.3% Al composition. In addition, thegatewidthandgatelengthare150and0.7 m, respectively, for both devices. No field plate is used. Finally, the gate to sourcespacingis0.5 mandthegatetodrainspacingis1 m. the source and drain parasitic resistances [14]. However, zero bias voltages ( and ) need to be applied to the device for the parasitic extraction using the cold-fet method. Thus, the measurement proceeds as follows: 1) a quiescent bias point is selected; 2) the voltages of the gate and drain pulsed bias is tuned to achieve the zero-bias condition during the pulse duration; and 3) the pulsed RF signal is applied during that period for measuring the corresponding -parameters. To extract the -parameters, two measurements, and, are needed in which the incident pulsed RF signal is applied alternatively at ports 1 and 2 of the device. It is to be noted that in distinction to a vector network analyzer (VNA), the LSNA calibration is not used for transforming the termination at ports 1 and 2 into virtual perfect match loads, but to calibrate the absolute amplitude and phase of the incident and reflected waves. It results that the small reflections from the internal coupler and terminations will introduce reproducible oscillation features in the measured -parameters data if ports 1 and 2 are assumed to be perfectly matched. To remove these unwanted artifacts, both the measured incident waves and are used and the corresponding -parameters are obtained by simultaneously solving the following linear system of equations: where and are the measured incident and reflected waves, respectively. A nonlinear least square fitting method is utilized for fitting the measured -parameters with frequency sweeping from 0.7 to 13.2 GHz using the equivalent circuit shown in Fig. 4. In this model, the intrinsic device is modeled using the first-order nonquasi-static approximation of the long-channel MOSFET wave-equation [25] where, for ( in [25]), the wave equation yields (1) (2) III. MEASUREMENT STEPS AND EXTRACTION OF PARASITICS Any modification of the surface charge in the extrinsic region of the device due to the applied bias, and will result in a change of the 2DEG concentration in the channel. Thus, the strongest impact of the surface charge is expected to be on and and with

4 1080 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 58, NO. 5, MAY 2010 Fig. 5. Equivalent circuit under pinched-off condition used for the extraction of parasitic capacitance. The MOSFET wave-equation-based intrinsic equivalent circuit has the advantage to prescribe the relationship between the nonquasi-static time constant, gate capacitance, and channel resistance. Note that the symmetry assumption of hold only for the intrinsic device below the gate and not the fringing capacitances to be discussed below. The deembedding of the parasitic capacitances and with additionally extractions of and is also necessary for accurate cold-fet modeling. These capacitances are also obtained from cold-fet RF measurements, but with the device in pinch-off V. The small-signal model can be simplified as presented in Fig. 5. At low frequencies, the capacitive elements can be extracted from the slope of the imaginary part of the device -parameters obtained from the measured -parameters using the following equations: where and are fringe capacitances between the intrinsic gate, drain, and source terminals. For consistency, the -parameters of the pinched-off device are also measured using the same pulsed-iv pulsed-rf procedure described above. The remaining fitting steps in the process of extraction are as follows. 1) The parasitic capacitances are extracted using the methodology described in Section IV. 2) The device -parameters transformed from the measured -parameters are deembedded using the estimated parasitic pad and fringe capacitances. 3) The remaining device parameters and are fitted using nonlinear least square starting from estimated values. 4) The average value of and obtained for the passivated device is then used for the final fitting of both the unpassivated and passivated devices as no bias dependence is observed in these parameters. The average value of and used are 2.68 and 332 ff, respectively. An example of the fitting results for a passivated device is shown in Fig. 6. The pulsed-iv pulsed-rf measurements reported in this section utilize 1- s duration for the pulsed bias, 700-ns duration for the pulsed RF signals, and an RF/bias pulse repetition period of 100 s. It is assumed that the surface charge does not (3) Fig. 6. Example of measured (red dot in online version) and fitted (black line) S-parameters for one dc-bias point for the passivated device where S and S have been magnified five times larger. have time to change within the 1- s pulsed bias duration and is well set by the applied quiescent bias point, which is held on for 99% of the time. As will be shown in latter sections, this assumption is reasonable for the observations of thermal and trapping effects in this work. However, fast thermal and trapping effects with time constants smaller than 1 s are also possible in the devices we measured. Due to the inherent limitation of the measurement system using this modified pulsed-iv pulsed-rf measurement method, 700-ns duration for the pulsed RF signals is the minimum value for accurate measurement results, which limits the minimum duration for the pulsed bias that can be applied. With improvements in the measurement system, pulse duration smaller than 1 s can be applied and observation of fast thermal and trapping effects will be expected. Taking account of these fast processes, which are ignored in this study, larger deviations of parasitic components at different bias points from the reference values as shown in latter sections can be expected. IV. RESULTS AND DISCUSSIONS A. Parasitic Capacitance Conventionally, to obtain bias-independent parasitic capacitances and, the assumption of is made [26] and and are extracted by subtracting from and, respectively, where is generally very small and can be neglected. However, in our case, these assumptions cannot be applied due to the observed bias dependence. Comparisons of the measured and based on (3) for unpassivated and passivated devices are shown in Figs. 7 9, respectively. Larger and for the passivated device are clearly observed in Figs. 7 and 9. The increase in and for the passivated device is due to the increase of the fringe capacitance and caused by the high dielectric constant of Si3N4 passivation [27]. At the same time, both unpassivated and passivated devices show a similar value of, as demonstrated in Fig. 8, which may indicate a negligible influence from the bulk traps described in Fig. 1 during the device operation. The inspection of the total parasitic capacitances measured at the different bias points reveals no significant bias dependence for and in both unpassivated and passivated devices, whereas a clear bias dependence in for the unpassivated device is observed.

5 YANG et al.: PULSED-IV PULSED-RF COLD-FET PARASITIC EXTRACTION OF BIASED AlGaN/GaN HEMTs 1081 TABLE I EXTRACTED AVERAGE VALUES OF C ;C ; AND C ARE USED FOR BOTH UNPASSIVATED AND PASSIVATED DEVICES Fig. 7. Measured C of unpassivated (circle mark) and passivated (square mark) devices for different dc-bias points. Fig. 8. Measured C of unpassivated (circle mark) and passivated (square mark) devices for different dc-bias points. Fig. 9. Measured C of unpassivated (circle mark) and passivated (square mark) devices for different dc-bias points. A possible explanation for the bias dependence in the gate-todrain total capacitance is the pinch-off like behavior of its fringe capacitance component due to the surface fixedcharge depletion effect [28]. This effect will be further justified in Section IV-B by the observation of a large increase in parasitic drain resistance for the unpassivated device originating from the depletion of the 2DEG charge in the access region. It is usually not possible to extract both the pad and fringe capacitances from the measured and without making some modeling assumptions. In this work, dummy device structures are used instead to extract the pad capacitances for both unpassivated and passivated devices. In these dummy device structures, the AlGaN barrier in the vicinity of the gate region is completely removed such that there is no 2DEG located in that region and all the fringe capacitances are expected to be completely suppressed. The pad capacitances can then be directly extracted by measuring the -parameters of the dummy devices. It was verified that these measurements are not bias dependent. Both unpassivated and passivated dummy structures give almost the same measurement results. This is reasonable since both passivated and unpassivated devices share the same pad patterns and the pads are not expected to be affected by the passivation. The average results obtained from passivated and unpassivated pad capacitances are shown in Table I. These average results are used for both types of devices in the subsequent extraction of the parasitic resistances and inductances. As shown in Table I, the extracted and measured from the dummy structures have comparable values and are found to be much smaller than the total capacitances and measured from the normal HEMT devices under pinched-off condition. This indicates the gate-to-source and gate-to-drain fringe capacitances and contribute the dominant fraction (about 85%) to the total parasitic capacitances and compared to the pad capacitances and (about 15%). On the other hand the value measured for is much larger in the device considered in this work and the drain-to-source fringe capacitance is neglegible. Note that we have found that the use of accurate values for the pad capacitances is of crucial importance for the subsequent extraction of the parasitic inductances, but has negligible impact on the extraction of the parasitic resistances. The fringe capacitances at different bias points are then obtained by subtracting the pad capacitances listed in Table I from the measured and. The resulting pad and fringe capacitances are then used in the HEMT model for the extraction of the parasitic inductances and resistances at each bias point. B. Parasitic Resistance Table II lists the extracted parasitic source and drain resistances measured at the quiescent bias of V and V. A deviation of the source and drain resistances from these references is observed when a different bias point is selected. Comparisons of the deviations of drain and source resistances

6 1082 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 58, NO. 5, MAY 2010 TABLE II REFERENCE PARASITIC RESISTANCES AT THE SOURCE AND DRAIN SIDES MEASURED AT THE QUIESCENT BIAS OF V =0V AND V =0V Fig. 11. Deviation of source resistance 1R = R 0 R : measured (circle line for the unpassivated device and square line for the passivated device) and fitting (dashed dotted line for the unpassivated device and dotted line for the passivated device) deviations of parasitic resistances on the source side. and the bias-dependent parasitic resistance are themselves related to the charge mobility and 2DEG concentration by Ohm s Law Fig. 10. Deviation of drain resistance 1R = R 0 R : measured (circle line for the unpassivated device and square line for the passivated device) and fitting (dashed dotted line for the unpassivated device and dotted line for the passivated device) deviations of parasitic resistances on the drain side. for unpassivated and passivated devices are shown in Figs. 10 and 11, respectively. As shown in Fig. 10, a strong bias dependence of the deviation of drain resistance is observed for the unpassivated device (circle line), which exhibits a quasi-linear dependence on the drain-to-source voltage for positive gate bias. As the gate bias becomes more negative and eventually turns off the device for V, the deviation of drain resistance becomes gradually larger and its dependence on the drain bias is converted from a quasi-linear to a power-law relationship. However, much less significant bias dependence is observed for the passivated device (square line). Further, instead of the power-law increase of the deviation of drain resistance with drain bias observed at negative gate voltages in the unpassivated device, the deviation of drain resistance for the passivated device becomes progressively smaller as the gate voltage becomes more negative. Similar observations are also obtained from Fig. 11 for the deviation of source resistance, but the magnitude and the variation are far less noticeable in comparison to those observed at the drain side. C. Modeling of the Parasitic Resistance A change of quiescent bias does not only change the current and power dissipation of the device, but can also update the trap charges existing in the devices that can be located on the surface, at the interfaces, or inside the bulk. These changes contribute in turn to modifying the charge mobility and sheet carrier density (2DEG) in the channel. The reference parasitic resistance where is the length between gate and drain (source), is the device width, is the electron charge, and are the reference and bias-dependent charge mobilities, respectively, and and are the reference and biasdependent 2DEG concentrations, respectively, with being the deviation in charge mobility and being the deviation in 2DEG concentration. Assuming and are uniformly distributed over the integration path, the deviation in drain (source) resistance is then given by In a UID channel layer, at room temperature, the electron mobility of the 2DEG is limited by phonon scattering [29], [30]. In addition, it is observed experimentally that the electron mobility at room temperature exhibits a dependence on the sheet carrier density in the channel to a certain degree. Due to SiN passivation, a reduced sheet-carrier-density modulation by trap states is expected in the passivated device, thus a negligible dependence of the electron mobility on the sheet carrier density is assumed. On the other hand, for unpassivated devices, the effect of trap state modulation is expected to be significant, causing a broad range variation in sheet carrier density. The dependence of the electron mobility on the sheet carrier density must, therefore, be considered. However, the variation in parasitic resistance contributed by the electron mobility variation due to the change of sheet carrier density is of a second-order effect compared with (4) (5) (6)

7 YANG et al.: PULSED-IV PULSED-RF COLD-FET PARASITIC EXTRACTION OF BIASED AlGaN/GaN HEMTs 1083 that contributed directly by the change of sheet carrier density. It is also proposed that as the sheet carrier density decreases, the electron mobility transits from 2-D to bulk transport where the dependence of the electron mobility on the sheet carrier density is small. Therefore, a negligible dependence of the electron mobility on sheet carrier density is still assumed for the unpassivated device In addition, for the small RF excitations applied in the cold-fet measurement performed at zero bias, it is reasonable to consider only the low-field mobility, which is assumed here to be mainly influenced by the channel temperature. The temperature dependence of the low-field mobility can be modeled as [29], [30] (7) where is the reference temperature for is the channel temperature, is the power of the temperature dependence, and is the temperature deviation. The latter one is given by Fig. 12. Deviation of resistance: measured (circle line for the unpassivated device and square line for the passivated device) 1R at drain and source sides with 1T = T 0 T, where T = 300K. Dashed line is the fitting result using (9) to determine and R in the equation. where is the thermal resistance and is the device current. Since usually, (5) can be further simplified to be (8) On the other hand, with respect to the 2DEG concentration in the access region, it is assumed that its temperature dependence is negligible and that the main variation is contributed by the modulation of the trap charges. Following our discussion in Section I, only surface states will be considered and will be assumed to be controlled by the quiescent gate and drain biases. For the passivated device, the observations of the experimental results shown in Figs. 10 and 11 point toward the dominance of the thermal effect given the variation of the 2DEG concentration influenced by the surface states is expected to be negligible owing to the stabilization of the surface by the SiN passivation. Assuming the 2DEG charge, is uniformly distributed over the integration path and equal to and the channel temperature is also uniform, the deviation in drain (source) resistance is then given by the following equation: To determine the values of and in the above equation and to justify the assumption of the dominance of the thermal effect, cold-fet measurements of the device parasitics were performed at zero bias for both passivated and unpassivated devices while varying the substrate temperature from room temperature to 380 K. The resulting deviation (9) Fig. 13. Calculated change of the channel temperature with different quiescent bias points (circle line for the unpassivated device and square line for the passivated device). of the parasitic resistances are plotted versus the deviation of the temperature from K for both passivated and unpassivated devices in Fig. 12. and are determined by fitting the measured results in Figs simultaneously. Using for the drain side and for the source side of the passivated device, and C/W. Note that is higher than the one estimated by [31] and [32], whereas is somewhat smaller than reported values. The resulting and are plotted against (dotted line) in Figs. 10 and 11 for the different bias points. The closeness of the fitting and the experiments indicates the reasonability of the assumption that the thermal effects dominate the variation of the parasitic resistance in passivated devices. The change of the parasitics resistance with the gate bias is then accompanied by the change of the channel temperature, which is is plotted in Fig. 13 (square line). For the unpassivated device, in addition to the thermal effect ( is represented in Fig. 13 by circle lines for the unpassivated device), the device is susceptible to be influenced by the surface states owing to the lack of SiN passivation on the surface region. It has been proposed that the electrons from the gate contact are captured by the surface

8 1084 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 58, NO. 5, MAY 2010 states near the contact depleting, in turn, the 2DEG concentration in the channel [9]. Therefore, an assumption can be made in which the resistance of the unpassivated device is composed of two contributions, which are: 1) near the gate contact where both the surface states and thermal effect influence the variation of the resistance and 2) far from the gate contact, where the thermal effect dominates as in the passivated counterpart. In region 1), the 2DEG charge is assumed to take a constant value over a distance. The channel temperature is assumed to be uniform over both regions and to be controlled by the power dissipation of the device. The deviation of the parasitic resistance can then be expressed using the result derived in (9) as Fig. 14. DC IV curve and channel modulation index (calculated using coefficients for the drain side) contour for unpassivated device. (10) where is the ratio of extension of the region near the gate contact within which the surface states are negatively charged and where is the modulation index of the 2DEG concentration, which varies between 0 and 1. An empirical assumption is made for fitting the bias dependence of and where and are fitting parameters. As for the passivated device, the thermal effect was assumed to dominate the variation of the parasitic resistance in the unpassivated device when V, as the contribution from the surface states mostly shows when a negative gate bias is applied. The physical parameters used in the modeling of the passivated device are used for the unpassivated device with in addition V, V, and V for the drain side, and V, V, and V for the source side. The results shown in Figs. 10 and 11 (dashed dotted line) exhibit a reasonable fit of the measurement data. These results indicate that the 2DEG population is largely depleted in a region corresponding to about 9% of the gate-to-drain access region in our case. Presumably in this region, assumed to be located near the gate contact, the donor surface states have captured electrons yielding the reduction in 2DEG concentration. In our measurement analysis, the surface states influence the 2DEG concentration through the channel modulation index, which is controlled by both the gate and drain biases. The variation of as a function of bias for the unpassivated device is plotted using a contour plot in the device dc IV characteristics shown in Fig. 14. It was verified that using a sole drain bias dependence can only yield a satisfactory fit for a single constant gate-to-source voltage at a time. The strong voltage dependence observed in the unpassivated device could be explained by the influence of the 2DEG channel concentration under the gate upon the lateral fringing electric field at the AlGaN surface. Indeed the lateral electric field at the AlGaN surface eventually regulates the electron flux from the gate metal to the surface states for a given surface mobility [9]. Stronger lateral fringing electric fields at the AlGaN surface will result when the channel under the gate is pinched off (large negative ) yielding a larger surface current, and in turn, a higher population of electrons captured by the donor surface states for a given excess electron recombination rate at the surface. Furthermore, the difference in the and scaling parameters of the gate and drain bias dependence used for the drain side and source side implies a strong physical asymmetry. The latter cannot be attributed alone to the use of different length ratios, but possibly originates from a comparatively larger population of donor surface states in the drain region than in the source region. This, in turn, may result from the stronger cumulative electrical and thermal stresses affecting the drain region since, under normal FET biasing, the applied voltages are largely more negative than the applied voltages. Note that (9) can also be used to obtain a satisfactory fit for the passivated device when using and V. The variation of at different bias points are also demonstrated with a dc IV curve for the passivated device, as shown in Fig. 15. This emphasizes the respective suppression and reduction of the and dependences in passivated devices. This would then naturally be explained by the greatly reduced surface mobility at the AlGaN engendered by the SiN passivation. It should be noted that the hot spot effect [33] observed in the AlGaN/GaN HEMTs implies a nonuniform power and channel temperature distribution inside the device, whereas a

9 YANG et al.: PULSED-IV PULSED-RF COLD-FET PARASITIC EXTRACTION OF BIASED AlGaN/GaN HEMTs 1085 TABLE III REFERENCE PARASITIC INDUCTANCES AT THE SOURCE AND DRAIN SIDES MEASURED AT THE QUIESCENT BIAS OF V =0V AND V =0V Fig. 15. DC IV curve and channel modulation index (calculated using coefficients for the drain side) contour for passivated device. Fig. 17. Deviation of drain inductance 1L = L 0 L measured for the unpassivated (red circle line in online version) and passivated devices (blue square line in online version) and fitting results for the unpassivated device (red dashed dotted line in online version). Fig. 16. Example of measured (red dot in online version) and fitted (black line) S-parameters for one dc-bias point for the unpassivated device for V = 06 V. uniform channel temperature is assumed in the present model for both unpassivated and passivated devices. Further improvements in the modeling will require a more detailed analysis of the physical interaction between the surface states and 2DEG concentration. D. Parasitic Inductance An example of the measured data and fitting results for the unpassivated device is shown in Fig. 16 for V. Compared to the passivated device shown in Fig. 6, a strong bias dependence for is observed in Fig. 16. The frequency dependence of the -parameters is also increasing for increasing drain voltages. Table III lists the extracted parasitic source and drain inductances measured at the quiescent bias of V and V. Comparisons of the deviations of the drain and source inductances for unpassivated and passivated devices are shown in Figs. 17 and 18, respectively. A negligible deviation of the drain inductance is observed in Fig. 17 for the unpassivated device (circle line) for small negative values. However as the gate bias becomes more negative and the device eventually turns off at V, a large negative deviation of the drain inductance from the unbias condition is observed for increasing Fig. 18. Deviation of source inductance 1L = L 0 L measured for the unpassivated (red circle line in online version) and passivated devices (blue square line in online version) and fitting results for the unpassivated device (red dashed dotted line in online version). drain voltage. However, negligible bias dependence is observed for the passivated device (square line). E. Modeling of the Parasitic Inductance The deviation of the parasitic inductances in unpassivated device observed in Figs. 17 and 18 when V can be modeled using the equivalent circuit shown in Fig. 19. For small such that, the equivalent impedance of this circuit can be approximated by (11)

10 1086 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 58, NO. 5, MAY 2010 Fig. 19. Equivalent circuit for modeling the effective reduction in parasitic inductances L and L observed. where represents a capacitance bypassing the region of high resistance in the source and drain access regions and with on the drain side and on the source side. The capacitance, which is supported by the high electron concentration regions on both sides of the region is similar to the drain-to-source capacitance, which arises in the saturation region of an FET [25], [34]. It results that can be identified to be (12) Using the obtained in Section IV-C with pf for the drain side and pf for the source side in (12), a reasonable fit of the measurement data is obtained as shown in Figs. 17 and 18 (dashed dotted line for the unpassivated device). The differences between the fitting results and the measured data imply that may be bias dependent. V. CONCLUSION A recently reported pulsed-rf measurement technique for the LSNA using the capability of multiple recording in the modern data acquisition system [21], [22], [24] is used for the acquisition of pulsed -parameters. The functionality of the measurement system is verified with the measurement of a through calibration standard confirming the ability of the system in maintaining its dynamic range when the pulse duty cycle decreases. This pulsed-iv pulsed system is then applied to the measurement of pulsed -parameters of AlGaN/GaN HEMTs for the extraction of the parasitic resistances using the cold-fet technique. This resulting pulsed cold-fet technique allows for the extraction of the device parasitics at zero transient bias with the device operating at different quiescent bias points. The extracted parasitic capacitances exhibit an increase in and for the passivated device compared to the unpassivated device. This increase is associated with the increase in fringe capacitance between the gate and source contacts and the gate and drain contacts, respectively, due to the high dielectric constant of the Si3N4 passivation. On the other hand, a negligible influence from the bulk traps in GaN is inferred from the similarity of the values obtained for the total drain-to-source parasitic capacitances for both passivated and unpassivated devices. Bias-independent and are measured for the unpassivated and passivated devices, whereas a clear bias dependence in is observed for the unpassivated device. This bias dependence is attributed to the variation of the gate-to-drain fringe capacitance on the drain side when the 2DEG channel in the access region near the gate is pinched off due to the increased trap occupation at the AlGaN surface. A strong dependence of the source and drain resistances upon the quiescent biases is observed in the unpassivated AlGaN/GaN HEMT device. These parasitic resistances increases with an ascending drain bias voltage and this trend becomes stronger when the gate contact becomes more negatively charged. On the contrary, with the SiN passivation, the variation of the access resistance with the drain voltage is much less significant when a negative gate voltage is applied. A simple physical model indicates that thermal effects dominate the variation of the deviation of the source and drain resistance with bias voltages in the passivated device and also in the unpassivated device for V. For the unpassivated devices when goes to negative values, contributions to the variation in access resistance occur both in: 1) the extrinsic channel region near the gate, which is influenced by the surface states and the self-heating effect and in 2) the rest of the extrinsic channel region where only the thermal effect needs being considered. A reduction in the source and drain series inductances with increasing drain voltage is also observed in the unpassivated AlGaN/GaN HEMT device for large negative gate bias when the device is close to pinched-off condition, whereas no reduction is found for the device with SiN passivation. The deviations of inductances can be reasonably fitted using an equivalent circuit consisting of a capacitance in shunt with the deviation resistance in the channel of access region. This model suggests that the RF drain current starts relying on the displacement current to bypass the high resistance region near the gate induced by the traps when the device is in pinched-off. It is to be noted that given the capability of our present pulsed- IV pulsed-rf system, the study reported here on the bias dependence of device parasitics is limited to memory effects, which do not have time to respond to a 1- s pulsed IV. Thermal transients, for example, are distributed effects with time constants varying from 1 ns to seconds [35]. For our devices, which are turned off for 1 s, this implies that the device temperature may have relaxed to a fraction of its original value. The actual device temperature would then be higher than extracted. Similarly fast surface states may also be present at the AlGaN surface, which could have relaxed. Nonetheless, the presence of slow thermal effects and slow trapping effects are unquestionably detected with the reported pulsed cold-fet measurements. Further studies of these memory processes using a pulsed cold-fet may be concerned with the characterization of the time constants involved by varying the pulse duty cycle or/and the pulse duration. ACKNOWLEDGMENT The authors are grateful to the reviewers for their time and in-depth review of this paper s manuscript. The reviewers helpful and constructive suggestions have greatly helped the authors improve this paper. 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Aubry, Pulse profiling for AlGaN/GaN HEMTs large signal characterizations, in 38th Eur. Microw. Conf., Oct. 2008, pp [25] P. Roblin and H. Rohdin, High-Speed Heterostructure Devices From Device Concepts to Circuits Modeling.. Cambridge, U.K.: Cambridge Univ. Press, [26] P. M. White and R. M. Healy, Improved equivalent circuit for determination of MESFET and HEMT parasitic capacitances from cold-fet measurements, IEEE Microw. Guided Wave Lett., vol. 3, no. 12, pp , Dec [27] W. Lu, V. Kumar, R. Schwindt, E. Piner, and I. Adesida, A comparative study of surface passivation on AlGaN/GaN HEMTs, Solid State Electron., vol. 46, pp , Jan [28] W. L. Liu, Y. L. Chen, A. A. Balandin, and K. L. Wang, Capacitance voltage spectroscopy of trapping states in GaN/AlGaN heterostructure field-effect transistors, J. Nanoelectron. Optoelectron., vol. 1, no. 2, pp , May [29] T. T. Mnatsakanov, M. E. Levinshtein, L. I. Pomortseva, S. N. Yurkov, G. S. Simin, and M. A. Khan, Carrier mobility model for GaN, Solid State Electron., vol. 47, pp , [30] F. Schwierz, An electron mobility model for Wurtzite GaN, Solid State Electron., vol. 49, pp , [31] A. M. Darwish, A. J. Bayba, and H. A. Hung, Thermal resistance calculation of AlGaN GaN devices, IEEE Trans. Microw. Theory Tech., vol. 52, no. 11, pp , Nov [32] A. M. Darwish, A. J. Bayba, and H. A. Hung, Accurate determination of thermal resistance of FETs, IEEE Trans. Microw. Theory Tech., vol. 53, no. 1, pp , Jan [33] M. Hosch, J. W. Pomeroy, A. Sarua, M. Kuball, H. Jung, and H. Schumacher, Field dependent self-heating effects in high-power AlGaN/GaN HEMTs, in CS Mantech Conf., 2009, pp [34] A. G. Brady, C. H. Oxley, and T. J. Brazil, An improved small-signal parameter-extraction algorithm for GaN HEMT devices, IEEE Trans. Microw. Theory Tech., vol. 56, no. 7, pp , Jul [35] O. Jardel, F. De Groote, T. Reveyrand, J.-C. Jacquet, C. Charbonniaud, J.-P. Teyssier, D. Floriot, and R. Quere, An electrothermal model for AlGaN/GaN power HEMTs including trapping effects to improve large-signal simulation results on high VSWR, IEEE Trans. Microw. Theory Tech., vol. 55, no. 12, pp , Dec Chieh Kai Yang was born in Miaoli, Taiwan, in June He received the B.S. and M.S. degrees in electrical engineering from National Tsing Hua University, Hsinchu, Taiwan, in 2003 and 2007 respectively, and is currently working toward the Ph.D. degree at The Ohio State University. His main interests include nonlinear characterizations, modeling, and design of RF devices and circuits. His current research topic focuses on nonlinear characterization and device modeling of AlGaN/GaN HEMTs using a LSNA/deep-level optical spectroscopy combined measurement system. Patrick Roblin (M 85) was born in Paris, France, in September He received the Maitrise de Physics degree from Louis Pasteur University, Strasbourg, France, in 1980, and the M.S. and D.Sc. degrees in electrical engineering from Washington University, St. Louis, MO, in 1982 and 1984, respectively. In 1984, he joined the Department of Electrical Engineering, The Ohio State University (OSU), Columbus, as an Assistant Professor. He is currently a Professor with OSCU. He founded the Non-Linear RF Research Laboratory, OSU. At OSU, he developed two educational RF/microwave laboratories and associated curriculum for training both undergraduate and graduate students. He coauthored the textbook High-Speed Heterostructure Devices (Cambridge Univ. Press, 2002). His current research interests include the measurement, modeling, design, and linearization of nonlinear RF devices and circuits such as oscillators, mixers, and power amplifiers.

12 1088 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 58, NO. 5, MAY 2010 measurement systems. Fabien De Groote was born in Limoges, France, in He received the Engineer and Ph.D. degrees from Limoges University, Limoges, France, in 2004 and 2007, respectively. For one year, he was a Post-Doctoral Researcher with The Ohio State University, Columbus. In 2008, he cofounded Verspecht Teyssier DeGroote s.a.s. Corporation, Brive, France, where he is currently President. His main interests are nonlinear microwave characterizations of power transistors and the development of new nonlinear microwave Steven A. Ringel (S 85 M 90 SM 99), photograph and biography not available at time of publication. Siddharth Rajan, photograph and biography not available at time of publication. on time-domain pulsed large-signal characterization of transistors. In 2007, he defended his habilitation thesis in order to become a Full Professor. Prof. Teyssier is a member of the ARFTG ExCom and MTT-11. Christiane Poblenz received the Bachelor of Science degree in chemical engineering from the University of California at Santa Barbara, in 1999, and the Ph.D. degree in materials from the University of California at Santa Barbara, in Her doctoral thesis concerned (In, Al)GaN growth by molecular beam epitaxy (MBE) for GaN-based electronic devices, where she developed state-of-the-art AlGaN/GaN HEMTs grown by MBE. Through 2008, her post-doctoral research was focued on the development of MBE growth techniques to achieve low defect density high-performance novel GaN-based transistor structures. She has authored or coauthored over 35 technical publications and conference presentations within this field. Yi Pei, photograph and biography not available at time of publication. Jean-Pierre Teyssier was born in Brive, France, in He received the Ph.D. degree from University of Limoges, Limoges, France, in His doctoral thesis concerned pulsed I(V) and pulsed S-parameters for nonlinear characterization of microwave active devices. Since 1990, he has been with the IRCOM/XLIM Laboratory, University of Limoges, Limoges, France. He has been involved in the design of measurement systems and instrumentation for microwave nonlinear investigations with an emphasis James Speck, photograph and biography not available at time of publication. Umesh K. Mishra (S 82 M 83 SM 90 F 95), photograph and biography not available at time of publication.