1590 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 8, AUGUST Symmetrical Large-Signal Modeling of Microwave Switch FETs

Transcription

1 1590 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 8, AUGUST 2014 Symmetrical Large-Signal Modeling of Microwave Switch FETs Ankur Prasad, Student Member, IEEE, Christian Fager, Member, IEEE, Mattias Thorsell, Member, IEEE, Christer M. Andersson, Member, IEEE, and Klas Yhland, Member, IEEE Abstract This paper presents a new symmetrical field-effect transistor (FET) model suitable for microwave switches. The model takes advantage of the inherent symmetry of typical switch devices, justifying a new small-signal model where all intrinsic model parameters can be mirrored between the positive and negative drain source bias regions. This small-signal model is utilized in a new and simplified approach to large-signal modeling of these type of devices. It is shown that the proposed large-signal model only needs a single charge expression to model all intrinsic capacitances. For validation of the proposed model, small-signal measurements from 100 MHz to 50 GHz and large-signal measurements at 600 MHz and 16 GHz, are carried out on a GaAs phemt. Good agreement between the model and the measurements is observed under both small- and large-signal conditions with particularly accurate prediction of higher harmonic content. The reduced measurement requirements and complexity of the symmetrical model demonstrates its advantages. Further, supporting operation in the negative drain source voltage region, the model is robust and applicable to a variety of circuits, e.g., switches, resistive mixers, oscillators, etc. Index Terms Field-effect transistors (FETs), GaAs, HEMTs, large-signal model, microwave switch, modeling, semiconductor device modeling, small-signal model, symmetrical model. I. INTRODUCTION MICROWAVE switches are a key component in many advanced circuits, such as transceivers. Field-effect transistors (FETs) are advantageous as switches due to low ON-resistance, negligible power consumption, and easy integration with other active components in monolithic microwave integrated circuits (MMICs) [1]. The majority of switch design work has been done on high electron-mobility transistors Manuscript received November 29, 2013; revised February 07, 2014 and May 14, 2014; accepted June 12, Date of publication July 15, 2014; date of current version August 04, This work was supported by the Swedish Governmental Agency of Innovation Systems (VINNOVA), the Chalmers University of Technology, the SP Technical Research Institute of Sweden, ComHeat Microwave AB, Ericsson AB, Infineon Technologies AG, the Mitsubishi Electric Corporation, NXP Semiconductors BV, Saab AB, and United Monolithic Semiconductors. A. Prasad, C. Fager, and M. Thorsell are with the GigaHertz Centre, Microwave Electronics Laboratory, Department of Microtechnology and Nanoscience, Chalmers University of Technology, SE Göteborg, Sweden ( ankur@chalmers.se). C. M. Andersson is with the Information Technology Research and Development Center, Mitsubishi Electric Corporation, Kamakura, Japan. K. Yhland is with SP Technical Research Institute of Sweden, SE Borås, Sweden, and also with the GigaHertz Centre, Microwave Electronics Laboratory, Chalmers University of Technology, SE Göteborg, Sweden. Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /TMTT Fig. 1. Switch FET operation in shunt configuration. (HEMTs) due to the advantage of low insertion loss [2]. Due to strict requirements on harmonic and intermodulation distortion in many communication and sensing systems, nonlinearities in switches are important to be modeled accurately. As opposed to amplifiers, switches operate at both positive and negative drain source voltages. This disqualifies common FET models in [3] and [4] for switch design since they are only valid for positive. Some switch and resistive mixer models have been published, which considers operation in the negative region [2], [5], [6]. However, the model in [2] has two charge equations with a large number of parameters to model, the capacitance model in [5] is dependent only on one control voltage, while the model in [6] has constant capacitances reducing its usage at a wider frequency range. This paper presents a symmetrical model for switch FETs. The traditional small-signal FET model in [7] is simplified by introducing symmetry around the gate in Section II. With this symmetry, it is shown that only one charge expression is required to model all intrinsic capacitances of the device in Section III. This significantly simplifies the switch device measurement, extraction, and modeling. For demonstration purposes, a symmetrical model is developed for a GaAs pseudomorphic high electron-mobility transistor (phemt) common source device using previously published models. Nonsymmetrical charge models from [2], [8], and [9] are reformulated and used in the proposed symmetrical form to give good agreement for both positive and negative regions. The proposed switch model is then validated with large-signal RF waveform measurements in Section IV. II. MODEL DESCRIPTION The modeling requirements for a switch FET can be understood by looking at its operation. For a shunt switch (see Fig. 1), the voltage waves at the drain are functions of the gate bias. If the drain source bias is kept at zero volts, which is common in switch and mixer circuits, the RF swing at the drain terminal will cause to be both positive and negative over an RF cycle. Clearly, the negative region needs to be carefully considered in the modeling of a switch FET. For switch devices, which IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See for more information.

2 PRASAD et al.: SYMMETRICAL LARGE-SIGNAL MODELING OF MICROWAVE SWITCH FETs 1591 Fig. 2. General FET cross section showing the typical line of symmetry between the drain and source. Fig. 4. Simplified traditional small-signal model with six intrinsic parameters. TABLE I EXTRINSIC PARAMETERS FROM COLD-FET EXTRACTION Fig. 3. Photograph of the GaAs phemt DUT. are typically symmetrical (see Fig. 2), negative operation is equivalent to positive operation with the drain and source being interchanged. One would therefore expect to be able to model the negative region by mirroring the properties of the positive region. However, traditional small-signal models, e.g., [7] do not reflect this symmetry between drain and source. A new symmetrical model is therefore proposed and compared to the traditional model in this section. To demonstrate the symmetrical modeling, -parameters of a2 25 m on-wafer GaAs phemt 1 are measured in both a positive and negative region (see Fig. 3). A. Traditional Small-Signal Model The traditional model in [7] and similar models are extensively used in previously published small-signal FET modeling work [3], [4], [8], [10] [12]. In order to simplify the derivation of the new model, the intrinsic model shown in Fig. 4 is used. In this model, intrinsic resistances in series with the gate source and gate drain capacitances (e.g., in [7, Fig. 1] are neglected since their effects will appear mainly at high frequencies [13]. This model topology is further modified by replacing with a transcapacitance [14, p. 142]. The resulting intrinsic common source -parameters are then given by (1) A cold-fet extraction technique [7] is used to obtain the eight parasitics in the -configuration for the GaAs phemt device-under-test (DUT), see Table I. These parasitics are de-embedded from the measured data to obtain the bias-dependent small-signal intrinsic admittance matrix [7], [10]. The intrinsic parameters are then found from (1). The extraction result of the intrinsic parameters from the GaAs phemt measurements is shown in Fig. 5. The small-signal equivalent circuit 1 WIN Semiconductor PP10 GaAs phemt MMIC process. and the expected symmetry between drain and source implies that at bias point A ( V, V) should be equal to at bias point B ( V, V). This behavior is clearly reflected in Fig. 5(a) and (b). However, no other useful symmetries are observed for the other intrinsic parameters such as and. This demonstrates how the traditional model falls short when extracting symmetrical devices. In Section II-B, the traditional model is modified to make the small-signal model symmetrical. Later, it is shown that the proposed model will only require one-half of the bias region to predict the second half. B. Symmetrical Small-Signal Model To take advantage of the symmetry between drain and source terminals of a switch device, a better choice of independent control voltages are and rather than the traditional and [6]. This symmetry also implies that since the model has a -controlled current source, it should also have a -controlled current source. Hence, it is proposed to replace in the traditional model by two current sources and (see Fig. 6). Please note that of the traditional model and of the symmetrical model are different. While is a derivative in the constant direction, is a derivative in the constant direction. Since an FET is a three-terminal device, the two current sources and are sufficient to model the small-signal current parameters, making redundant. Similarly, is split into and,making redundant. Together, these changes make the small-signal model symmetrical, as shown in Fig. 6. The common-source -parameters for the proposed model are then given by (2)

3 1592 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 8, AUGUST 2014 Fig. 5. Bias dependence of traditional small-signal model intrinsic parameters of DUT obtained using direct extraction in an intrinsic bias grid covering both positive and negative region: (a) (ff), (b) (ff), (c) (S), (d) (ff), (e) (ff), and (f) (S). useful symmetries for all intrinsic parameters. This is an essential step towards simplifying the large-signal modeling of switch devices. Fig. 6. Proposed symmetrical small-signal intrinsic model with two antiparallel current sources and two transcapacitances. with (3a) (3b) (3c) (3d) The symmetrical small-signal parameters in (3) can now be related to the traditional parameters in (1) by (4a) (4b) (4c) (4d) The extracted,,,and results are shown in Fig. 7. It is now evident that model parameters are interchangeable with respect to and and that the proposed model results in C. Small-Signal Model Validation The proposed model is validated by the following procedure. 1) Intrinsic model parameters are extracted from measured -parameters at a bias point A (e.g., Vand V). 2) The intrinsic parameters from bias point A are mirrored by swapping and, and, and (see Table II). 3) -parameters are simulated from the mirrored set and compared to measurement at the corresponding bias point B ( V, V). This validation procedure is applied to the GaAs phemt DUT. For comparison, the pair of bias points (A, B) is chosen such that the error between the simulated and the measured -parameters is maximum at B, with the error being defined as Resulting modeled and measured -parameters (100 MHz 50 GHz) are shown in Fig. 8. Good agreement is observed between model and measurement even at the bias point with maximum error. This not only confirms that the model fits measured -parameters over a large-frequency range at bias points A and B, but also that the measured device indeed is intrinsically symmetrical. Therefore, a physically symmetrical intrinsic device will have an electrically symmetrical intrinsic model. Hence, for this and similar FETs, (5)

4 PRASAD et al.: SYMMETRICAL LARGE-SIGNAL MODELING OF MICROWAVE SWITCH FETs 1593 Fig. 7. Plot of proposed intrinsic parameters for the proposed symmetrical small-signal model in an intrinsic bias grid covering both positive and negative region: (a) (S), (b) (ff), (c) (S), and (d) (ff). TABLE II INTRINSIC PARAMETERS AT SYMMETRICAL BIAS POINTS measurements and extraction at either the positive or negative region is sufficient to predict and model the other region. III. LARGE-SIGNAL MODEL In this section, a new nonlinear model is developed from the extraction results of the proposed small-signal model with a focus on the nonlinear charge modeling. It is shown that a single charge expression is sufficient to model the reactive part of a symmetrical device. A. Nonlinear Current Modeling Several nonlinear current models are found in the literature, which consider FET operation only in the positive region, e.g., [3], [4] and [15] [17]. However, for a shunt switch shown in Fig. 1, the drain source current must be defined in both the positive and negative regions, e.g., [6], [18], [19]. For this work, the nonlinear drain source current for the measured DUT is modeled using the symmetrical model in [6]. The model in [6] contains six parameters, where accounts for change of maximum with and affect the maximum,and and account for pinch-off voltage and its shift with. The parameter accounts for change in saturation current with as described in the original paper. These model parameters were extracted by manual fitting to the measured dc I V data with the resulting parameter values listed in Table III. In Fig. 9, the comparison between measured and modeled current characteristics shows good agreement at both positive and negative. B. Nonlinear Charge Modeling Similar to the nonlinear current modeling, this section shows that a single charge expression is sufficient to model the reactive contributions to the intrinsic drain source current. The use of charge as opposed to capacitance expressions ensures charge conservation and good convergence properties in simulations [20]. For typical FET charge modeling, a pair of gate and drain charge expressions is widely used to model the reactive currents

5 1594 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 8, AUGUST 2014 Comparison of measured (marker) versus modeled ( ) I V character- Fig. 9. istics. results from Section II-B to develop a common charge expression. The charge expressions and are related to the intrinsic capacitances in (2) by (6a) (6b) (6c) (6d) From Section II-B, the extracted intrinsic capacitances are related to each other by (7a) (7b) Fig. 8. Comparison of -parameters from 100 MHz to 50 GHz between measured ( :BiasA, : Bias B) and model(-) at bias points A ( V, V) and B ( V, V) where model at B is obtained from measurement at bias point A: (a) and, (b) magnitude of and, (c) phase of and. TABLE III YHLAND MODEL [6] PARAMETERS FOR CURRENT Therefore, from (6) and (7), the partial derivatives of the two charge expressions must be symmetrical with respect to each other. As a result, the charge expressions and must also be symmetrical according to It is therefore sufficient to model either or.to demonstrate this, the focus is hereafter on the modeling of for the GaAs phemt DUT. Due to charge conservation, is related to the traditional gate and drain charge, and, respectively, by (8) (9) [2], [4], [8], [9]. However, since the drain and source terminals of a switch device are identical (see Fig. 6), it is advantageous to instead model the drain and source charge, and, respectively. This enables the immediate use of the small-signal Several models for and are found in literature [2], [4], [8], [9]. For the GaAs phemt DUT, none of the published expressions are capable of modeling the extracted intrinsic capacitances in both the positive and negative regions. Hence, to obtain a good agreement, a combination of gate and drain charge functions is taken from [8] and [2], respectively. Further, a reduction function from [21, eq. (7)] is introduced in [8, eq.

6 PRASAD et al.: SYMMETRICAL LARGE-SIGNAL MODELING OF MICROWAVE SWITCH FETs 1595 TABLE IV FITTING PARAMETERS OF THE CHARGE MODEL FROM [2], [8], AND (12) Fig. 12. Measured ( -ON, -OFF) and modeled ( ) -parameters from 100 MHz to 50 GHz at ON and OFF-state of a switch. (a) and.(b). Fig. 10. Comparison of: (a) versus and (b) versus between extracted small-signal capacitance and capacitance obtained using charge expressions (13) ( ). Fig. 13. Large-signal measurement setup with LSNA, signal source, and on-wafer DUT with 50- RF termination at gate. The reference plane of measurement is at the probe tips. Fig. 11. Proposed large-signal model for a symmetrical common source device. (11) (12) (15)] to correct the behavior at higher and.themodified expression [8, eq. (15)], including the reduction function,aregivenby The complete source charge expression is given as (10) (13)

7 1596 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 8, AUGUST 2014 Fig. 14. Comparison between magnitude of measured (fundamental frequency:, second harmonic:, and third harmonic: ) and simulated ( )reflected versus incident power at the drain of the DUT at: (a) magnitude 600 MHz, V, V, (b) 600 MHz, V, V, (c) 16 GHz, V, V, (d) 16 GHz, V, and V, measured using setup shown in Fig. 13. Below 50 dbm, the noise floor of the measurement setup makes it difficult to obtain good measurements. Afterwards, the drain charge function is obtained using (8). The parameters of the nonlinear charge model for the GaAs phemt DUT (see Table IV) were extracted by manual fitting to the extracted small-signal intrinsic capacitances. Fig. 10 shows the comparison between extracted and modeled capacitances. The agreement for is good, but some mismatch is observed in at high. The common charge function is not able to model the change in peak of with. Therefore, the common charge function in (13) opens a new research window for significant improvement over a wider bias range. The new charge function can be modeled using the pair of directional derivatives given by (6) and it is left for further investigations. However, in this section, it is clearly shown that a single charge expression is sufficient to model the reactive parts in symmetrical large-signal models. IV. GaAs phemt MODEL VALIDATION The complete large-signal model for the GaAs phemt device obtained from small-signal measurements is shown in Fig. 11. The model contains the parasitics obtained by cold-fet extraction (see Table I), the nonlinear current source [6, eq. (1)], and the nonlinear charge expression given by (13). The proposed model is validated for a shunt switch (see Fig. 1), where the device either operates in open-channel (ON-state) or in pinch-off (OFF-state) conditions. Small- and large-signal measurements of the DUT at these bias conditions are therefore used to experimentally verify the agreement with the model in Fig. 11. A. Small-Signal Verification The small-signal behavior of the model is verified with -parameter comparisons in the ON state ( Vand V) and OFF state ( Vand V) of the switch. Fig. 12 shows comparisons between measured and modeled -parameters. Some phase mismatch in and gain mismatch in is observed at the ON state of the device due to the mismatch observed in. Since extrinsic and current parameters are correctly modeled (see Figs. 8 and 9), further improvements in the charge model is required to correctly predict the extracted small-signal intrinsic capacitances. However, the proposed model derived from the symmetrical modeling technique shows an overall good agreement with the measured reflection coefficient at the drain port [see Fig. 12(a)]. Due to the absence of RF signal at the gate as in shunt switches, large-signal measurements can still verify the proposed model.

8 PRASAD et al.: SYMMETRICAL LARGE-SIGNAL MODELING OF MICROWAVE SWITCH FETs 1597 Fig. 15. Comparison between the model ( )andthemeasured( :600MHz, OFF-state; : 600 MHz, ON-state; :16GHz,OFF-state; : 16 GHz, ON-state) phase of reflected wave at the drain port at the fundamental frequencies of measurement performed with the setup in Fig. 13. B. Large-Signal Verification For large-signal verification of the model, waveform measurements are performed with the on-wafer DUT in a commonsource configuration. The large-signal measurement setup, as shown in Fig. 13, is used to excite the DUT with RF at the drain terminal with the gate terminated to 50, forcing it into switchlike operation in both positive and negative regions, similar to shunt switch in Fig. 1. A large-signal network analyzer (LSNA) (Maury MT4463) is used to measure calibrated waveforms at the device gate and drain terminal reference planes. In the ON state, the drain and gate are biased at 0 V, while for the OFF state, the gate bias is set to 2.5 V. These bias settings allow model validation with a large RF voltage swing at the drain terminal. The harmonic response of the proposed model is simulated in a similar environment as of the measurement setup. Measured incident waves at the fundamental and the higher harmonic frequencies are injected into the model at the respective ports. While the use of incident power at the gate compensates for any mismatch due to 50- RF termination, the use of incident power at the harmonics ensures identical harmonic terminations in simulations, as seen in the measurements. Fig. 14 shows the comparison between the measured and the modeled reflected power at different harmonics. At 600 MHz, the harmonics are mainly generated by the nonlinear current source. However, at 16 GHz, the harmonics are increasingly dependent on reactive currents generated by the nonlinear charge model. At power levels below the noise floor of the measurement setup, measured noise will be injected into the model simulations. This explains why noisy behavior is observed at lower power levels even in the simulation. The measured noise will also influence the phase of harmonics both in measurement and the simulation, making it difficult to compare. Therefore, the phase of the reflected wave at fundamental frequencies is compared (see Fig. 15). The good agreement between simulated and measured power and phase of the reflected wave at both low and high frequencies confirms the accuracy of the model and the symmetrical modeling procedure. For further validation, the measured and simulated time-domain drain source current versus voltage waveforms are shown in Fig. 16. The proposed model accurately reproduces measured Fig. 16. Comparison of modeled [600 MHz black, 16 GHz orange (in online version)] and measured [600 MHz red (in online version), 16 GHz brown (in online version)] current versus voltage waveform at the drain of the DUT in the ON and OFF state of the shunt FET with 50- RF termination at the gate. behavior both at 600 MHz and 16 GHz, thus confirming its validity. V. DISCUSSION AND CONCLUSION In this paper, a new modeling technique for microwave switch FETs has been proposed based on the inherent geometrical and electrical symmetry of the intrinsic device with three important conclusions. First, the small-signal model allows mirroring of the intrinsic model parameters from the positive to the negative region. This allows a reduction in measurement and extraction effort for a symmetrical device. Second, large-signal modeling considers the symmetry and uses a single charge expression, clearly demonstrating the advantages of the proposed model. Third, a model is developed for a commercial GaAs phemt device using the proposed method, which is validated with large-signal measurements. Calling for future work, the charge expression used for the GaAs phemt can be further improved to fit a wider range of bias points. New charge equation can be formulated for other switch FET technologies based on proposed model topology. For high-frequency operation, additional model parameters such as resistances in series with and may be employed to improve the high-frequency response of the model. These improvements open a window for further investigation and future research on enhanced switch models. Finally, although this work has focused on switches, other types of circuits subject to operation in the negative region can also benefit from the robustness offered by the modeling approach in this work, e.g., resistive mixer, oscillators, and amplifiers under high mismatch conditions. ACKNOWLEDGMENT The authors would like to thank Prof. I. Angelov, Microwave Electronics Laboratory, Chalmers University of Technology, Göteborg, Sweden, for valuable discussion and insights. This research was carried out at the GigaHertz Centre, Microwave Electronics Laboratory, Chalmers University of Technology.

9 1598 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 8, AUGUST 2014 REFERENCES [1] A. Gopinath and J. Rankin, GaAs FET RF switches, IEEE Trans. Electron. Devices, vol. 32, no. 7, pp , Jul [2] S. Takatani and C.-D. Chen, Nonlinear steady-state III-V FET model for microwave antenna switch applications, IEEE Trans. Electron. Devices, vol. 58, no. 12, pp , Dec [3] W. Curtice and M. Ettenberg, A nonlinear GaAs FET model for use in the design of output circuits for power amplifiers, IEEE Trans. Microw. Theory Techn., vol. MTT-33, no. 12, pp , Dec [4] I. Angelov, H. Zirath, and N. Rosman, A new empirical nonlinear model for HEMT and MESFET devices, IEEE Trans. Microw. Theory Techn., vol. 40, no. 12, pp , Dec [5] G. Callet, J. Faraj, O. Jardel, C. Charbonniaud, J.-C. Jacquet, T. Reveyrand, E. Morvan, S. Piotrowicz, J.-P. Teyssier, and R. Quéré, A new nonlinear HEMT model for AlGaN/GaN switch applications, Int. J. Microw. Wireless Technol. (Special Issue), vol.2,no.3 4,pp , Jul [6] K. Yhland, N. Rorsman, M. Garcia, and H. Merkel, A symmetrical nonlinear HFET/MESFET model suitable for intermodulation analysis of amplifiers and resistive mixers, IEEE Trans. Microw. Theory Techn., vol. 48, no. 1, pp , Jan [7] G. Dambrine, A. Cappy, F. Heliodore, and E. Playez, A new method for determining the FET small-signal equivalent circuit, IEEE Trans. Microw. Theory Techn., vol. 36, no. 7, pp , Jul [8] C.-J. Wei, Y. Tkachenko, and D. Bartle, An accurate large-signal model of GaAs MESFET which accounts for charge conservation, dispersion, and self-heating, IEEE Trans. Microw. Theory Techn., vol. 46, no. 11, pp , Nov [9] L.-S. Liu, J.-G. Ma, and G.-I. Ng, Electrothermal large-signal model of III V FETs including frequency dispersion and charge conservation, IEEE Trans. Microw. Theory Techn., vol. 57, no. 12, pp , Dec [10] N. Rorsman, M. Garcia, C. Karlsson, and H. Zirath, Accurate smallsignal modeling of HFET s for millimeter-wave applications, IEEE Trans. Microw. Theory Techn., vol. 44, no. 3, pp , Mar [11] M. Berroth and R. Bosch, Broad-band determination of the FET small-signal equivalent circuit, IEEE Trans. Microw. Theory Techn., vol. 38, no. 7, pp , Jul [12] M. Wren and T. Brazil, Enhanced prediction of phemt nonlinear distortion using a novel charge conservative model, in IEEE MTT-S Int. Microw. Symp. Dig., 2004, vol. 1, pp [13] C. Fager, L. Linner, and J. Pedro, Optimal parameter extraction and uncertainty estimation in intrinsic FET small-signal models, IEEE Trans. Microw. Theory Techn., vol. 50, no. 12, pp , Dec [14] M. Rudolph, C. Fager, and D. Root, Nonlinear Transistor Model Parameter Extraction Techniques, ser.cambridgerfmicrow.eng.. Cambridge, U.K.: Cambridge Univ. Press, [15] T. Kacprzak and A. Materka, Compact DC model of GaAs FETs for large-signal computer calculation, IEEE J. Solid-State Circuits, vol. SSC-18, no. 2, pp , Apr [16] J. Rodriguez-Tellez and P. J. England, Five-parameter DC GaAs MESFET model for nonlinear circuit design, Proc. Inst. Elect. Eng., vol. 139, no. 3, pp , Jun [17] M. S. Islam and M. M. Zaman, A seven-parameter nonlinear I V characteristics model for sub-m range GaAs MESFETs, Solid-State Electron. J., vol. 48, no. 7, pp , [18] O. Jardel, G. Callet, C. Charbonniaud, J.-C. Jacquet, N. Sarazin, E. Morvan, R. Aubry, M.-A. Di Forte Poisson, J.-P. Teyssier, S. Piotrowicz, and R. Quere, A new nonlinear HEMT model for AlGaN/GaN switch applications, in Proc. 4th Eur. Microw. Integr. Circuits Conf., 2009, pp [19] J. Dobes and L. Pospisil, Enhancing the accuracy of microwave element models by artificial neural networks, RadioEng.J., vol. 13, no. 3, pp. 7 12, Sep [20] D. Root, Nonlinear charge modeling for FET large-signal simulation and its importance for IP3 and ACPR in communication circuits, in Proc. 44th IEEE Midwest Circuits Syst. Symp., 2001,vol.2,pp [21] C. Fager, J. Pedro, N. de Carvalho, and H. Zirath, Prediction of IMD in LDMOS transistor amplifiers using a new large-signal model, IEEE Trans. Microw. Theory Techn., vol. 50, no. 12, pp , Dec Ankur Prasad (S 14) received the B.Tech. M.Tech. dual degree in electrical engineering from the Indian Institute of Technology Kanpur, India, in 2010, and is currently working toward the Ph.D. degree at the Chalmers University of Technology, Göteborg, Sweden. He is currently with the Microwave Electronics Laboratory, Chalmers University of Technology. His research interests are device characterization and modeling. Christian Fager (S 98 M 03) received the M.Sc. and Ph.D. degrees in electrical engineering and microwave electronics from the Chalmers University of Technology, Göteborg, Sweden, in 1998 and 2003, respectively. He is currently an Associate Professor and Project Leader with the GigaHertz Centre, Microwave Electronics Laboratory, Chalmers University of Technology. His research interests are in the areas of large-signal transistor modeling and high-efficiency power-amplifier architectures. Dr. Fager was the recipient of the 2002 Best Student Paper Award of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS). Mattias Thorsell (S 08 M 11) received the M.Sc. and Ph.D. degrees in electrical engineering from the Chalmers University of Technology, Göteborg, Sweden, in 2007 and 2011, respectively. He is currently an Assistant Professor with the Chalmers University of Technology. His research interests are characterization and modeling of nonlinear microwave semiconductor devices. Christer M. Andersson receivedthem.sc.degree in engineering nanoscience from Lund University, Lund, Sweden, in 2009, and the Ph.D. degree in microwave electronics from the Chalmers University of Technology, Göteborg, Sweden, in Since 2013, he has been a member of the Amplifier Group, Mitsubishi Electric Company Information Technology Research and Development Center, Ofuna, Japan. His main research interests are wide-bandgap devices and the design of high-efficiency power amplifiers. Klas Yhland (M 07) received the M.Sc. degree in electronic engineering from the Lund University of Technology, Lund, Sweden, in 1992, and the Ph.D. degree in microwave electronics with the Chalmers University of Technology, Göteborg, Sweden, in From 1992 to 1994, he was with the Airborne Radar Division, Ericsson Microwave Systems. Since 1999, he has been Head of the National Laboratory for High Frequency and Microwave Metrology, SP Technical Research Institute of Sweden, Borås, Sweden. From 2000 to 2003, he was also with the Microwave Electronics Laboratory, Chalmers University of Technology. Since September 2012, he has been an Adjunct Professor with the Terahertz and Millimetre Wave Laboratory, Chalmers University of Technology. His research interests are microwave technology, uncertainty analysis, new measurement techniques, planar measurement techniques, and design and modeling of microwave circuits.