3G-SDI Equalizers. Design Guide. 1 of 12. Design Guide May 2010

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1 3G-SDI Equalizers 1 of 12

2 Version ECR Date Changes and / or Modifications May 2010 New document. Contents Overview Power Stack-Up SDI Input and Output IRL Design BNC Connector Footprint IRL Compensation Network AC-Coupling Capacitor Crosstalk and Isolation Other Recommendations AGC Capacitor Analog Inputs/Outputs Squelch Adjust (SQ_ADJ) Output Control (OP_CTL) Cable Length Indicator (CLI) Digital Inputs/Outputs Methods to Avoid of 12

3 Overview This document serves as a reference for designing with Gennum s 3G Equalizers, including the GS2994, GS2993, GS2984 and GS2974A/B. This document contains two main areas of focus: 1. Recommended Schematic Designs. 2. Recommended PCB Layout Practices when designing with Gennum s 3G Equalizers. Figure A below shows the Typical Application Circuit of a 3G Equalizer such as the GS2993 Dual Output Equalizer. VCC_A VCC_O1 10nF VCC_O2 10nF 10nF nH 75Ω 75Ω 1μF 1μF 37.4Ω 470nF BYPASS SDI SDI SQ_ADJ OP1_CTL OP2_CTL OP1_EN OP2_EN GAIN_SEL SLEEP AGC AGC VEE_A VCC_A VCC_O1 VCC_O2 GS2993 VEE_O1 VEE_O2 SDO1 SDO1 SDO2 SDO2 CD CLI TAB μF 4.7μF 4.7μF 4.7μF TAB Figure A: GS2993 Typical Application Circuit 3 of 12

4 1. Power The GS2994 and GS2993 require a 3.3V power supply for the analog core, and a 3.3V/2.5V power supply for the digital inputs. Additionally, the outputs can be powered up with a 1.2V-3.3V power supply. Previous equalizers, such as the GS2984 and GS2974, require a single 3.3V power supply to power-up the entire device. The following guidelines are recommended when designing power for Gennum 3G Equalizers: Use coupled-power and coupled-ground planes (for example: use minimum spacing between the power and ground planes). Power and ground planes form a natural capacitor, which will increase the total capacitance Do not overlap power planes. If it is unavoidable, different power planes should be isolated from each other with a ground plane between them Power and ground planes should be placed near the component side. This will reduce the inductance of vias Bulk supply decoupling capacitors of 10μF and 100nF are recommended to filter-out high-frequency noise. Avoid the use of electrolytic capacitors for bulk decoupling. Instead, use high-quality, low-esr ceramic capacitors In addition to bulk supply decoupling, it is recommended to decouple each power supply pin individually with a 10nF capacitor. All decoupling capacitors should be placed as close as possible to the power and ground pin pairs of the device. Wherever possible, use two vias for each VCC and GND pin and flood the vias with copper as shown in Figure 1-1 Flood Copper Area V IA s to P ower 1mm VIAs to GND no thermal reliefs VEE VCC Figure 1-1: Local Decoupling The central paddle should be connected to ground with multiple vias for proper thermal conductivity. A minimum of five vias are recommended for the 16-pin QFN equalizers (GS2994, GS2984, GS2974), and nine vias for the 24-pin QFN equalizers (GS2993) Additional capacitors may be required, depending on the power supply incorporated in your design. Large noise transients on power supplies can cause undesirable effects for high-gain equalizers. 4 of 12

5 2. Stack-Up There are important stack-up recommendations to assist with controlled impedances on the component side, as well as minimizing reflections in the input transmission lines. Figure 2-1 shows the recommended stack-ups for four and six layer designs: CROSS SECTIONAL VIEW - 4 Layer Stack-Up FR4 10mil OPTION 1 Component Side GND REF CORE 42mil FR4 10mil PWR Opposite Side CROSS SECTIONAL VIEW - 6 Layer Stack-Up FR4 10mil CORE 4-6mil OPTION 1 OPTION 2 Component Side Component Side GND REF GND REF CONTROL PWR FR mil CORE 4-6mil FR4 10mil Figure 2-1: Recommended Stack-Up PWR GND REF Opposite Side CONTROL GND REF Opposite Side Table 2-1 shows the 75Ω transmission line width parameters based on a recommended 10mil dielectric thickness between the high-speed routing layer and the associated ground reference layer (standard FR4 material is assumed for all calculations). Table 2-1: Input Transmission Line Width Parameters Parameter Recommended Value Dielectric constant 4.00 Dielectric height (mil) 10 Copper thickness, including copper plating process (mil) 1.85 Transmission line width (mil) 8.16 Impedance (Ω) 75 5 of 12

6 3. SDI Input and Output Although Gennum's 3G Equalizers support differential inputs, typically 75Ω single-ended inputs and 100Ω differential outputs are used. The following general guidelines are recommended when designing the transmission lines for the 3G Equalizers: Input trace lengths should be minimized Differential pairs should be closely matched, and curved rather than sharp-angled Any discontinuity (impedance transitions) should be avoided on the transmission lines No silk-screen should be allowed on these traces to ensure an accurate impedance 1μF ceramic AC-coupling capacitors are recommended for the input and 4.7μF ceramic capacitors are recommended for the output, as shown in the typical application circuit. If interfaced to other Gennum devices such as the GS2985 or GS2965 reclockers, DC-coupling may be used on the output Typically, input transmission lines should have 75Ω single-ended controlled impedance, while output transmission lines should have 100Ω differential controlled impedance Non-transmission line components should be placed at a minimum distance of 10x the transmission line width away from transmission lines or transmission line components. For example: if the transmission line is 0.2mm wide, the closest non-transmission line component should be placed at least 2mm away whenever possible) Antipads are recommended to deal with transmission line component parasitics. The antipad sizes used on evaluation boards are given in figures below. These antipad sizes are specific to FR4 dielectric with a 10mil dielectric thickness between the top routing layer and the associated ground layer 0.51mm 0.51mm 0.60mm 0.51mm 0402 PAD 0402 PAD ANTIPAD 0.80mm TX LINE Figure 3-1: Series 0402 Component Antipad 6 of 12

7 0.51mm 0402 PAD 0.51mm TX LINE reduced 0.60mm ANTIPAD 0.51mm 0402 PAD Figure 3-2: Shunt 0402 Component Antipad ANTIPAD 0.96mm 0.81mm 0603 PAD 1.20mm 0603 PAD TX LINE 0.61mm 1.80mm Figure 3-3: Series 0603 Component Antipad Antipads are defined as specific sized absences of copper in all inner layers directly underneath a transmission line component. While there should be no signal routing underneath any antipads, it is recommended that a well stitched copper pour attached to the ground net is used on the back side of the board underneath these antipads to help EMI. Figure 3-4 shows the cross section and top view of a PCB around a series transmission line component. The transmission line on either side of this component can also be seen. 7 of 12

8 CROSS-SECTIONAL VIEW - Transmission Line 0402/0603 Component FR4 CORE FR4 CORE FR4 Transmission Line Component Copper Absence SIDE A GND REF PWR CONTROL/GND GND REF SIDE B Solid Ground On Bottom Layer Under Antipad TOP VIEW - Transmission Line Component Component Pads 0402/0603 Component Transmission Line Antipad Figure 3-4: Cross-Sectional and Top View of PCB Underneath Transmission Line Component 4. IRL Design This section contains recommendations that should be followed to obtain a good Input Return Loss (IRL) when designing with Gennum 3G Equalizers. 4.1 BNC Connector Footprint It is important to have a good BNC launch. The BNC footprint signal pin width should closely match the transmission line width. Antipads may be required within the BNC footprint to minimize the impedance mismatch. 4.2 IRL Compensation Network The IRL compensation network should consist of a 75Ω resistor in parallel with an inductor. The type of inductor used in the IRL compensation network is critical for good performance. For best performance, select a chip inductor with a good tolerance and a high self-resonant frequency, such as the LQG15HS series Murata inductors. A value of 6.2nH is recommended, although this may vary with board layout. 4.3 AC-Coupling Capacitor It is recommended to use a 1μF ceramic capacitor with a voltage rating of 10V or more to AC-couple the inputs. The pad size should closely match the transmission line width to avoid impedance discontinuities. It is also recommended to use antipads (as defined in the previous sections) to compensate for the parasitic effects of the capacitor package. 8 of 12

9 5. Crosstalk and Isolation When designing systems with multiple 3G Equalizers, care needs to be exercised to minimize input-to-input, output-to-output, and output-to-input coupling. There are several ways to reduce coupling as outlined below. Use an appropriate stack-up, allowing high-speed signals to have an uninterrupted return path with a solid reference plane directly beneath the signal layer Use isolation ground pours to isolate adjacent outputs and inputs. The output pour should be separated from the input pour by at least 40mils. The pours should be placed far enough from the transmission lines and transmission line components to not affect the controlled-impedances An example of adequate perimeter stitching is shown in Figure 5-1 Route differential outputs coupled for as long as possible Use proper local decoupling techniques as described in this guide. Use only high-quality decoupling capacitors Correctly terminate all unused inputs and outputs Output to Input Separation Pour Perimeter Stitching Input 3G EQ Output Large gap to maintain controlled impedance Input Isolation Pour stitched to ground Output Isolation Pour stitched to ground Input 3G EQ Output Input 3G EQ Output Figure 5-1: Example of Adequate Perimeter Stitching 9 of 12

10 6. Other Recommendations 6.1 AGC Capacitor For optimum performance, please read the data sheet of the device in question and refer to the recommended typical application circuit. Two AGC capacitors are required for the GS2974A/B equalizers, while only one AGC capacitor is required for the GS2984, GS2994 and GS2993 equalizers, as shown in Figure 6-1. AGC AGC AGC AGC 470nF 470nF 470nF AGC Circuit for the GS2974A/B Figure 6-1: AGC Circuits AGC Circuit for the GS2984, GS2994 & GS Analog Inputs/Outputs Squelch Adjust (SQ_ADJ) GS2984/GS2994/GS2993 only The SQ_ADJ input can change the threshold of the CD pin on the GS2984, GS2994 and GS2993 through voltage level variances. In applications where programmable squelch is not required, the SQ_ADJ pin can be left unconnected. Please refer to the device data sheet for setting details when using the SQ_ADJ and Sleep options Output Control (OP_CTL) GS2994/GS2993 only The output control pins are analog inputs used to control the output swing, de-emphasis and mute features of the outputs. When connected to ground, the output swing is 800mV with no de-emphasis, and when connected to 3.3V, the output is muted. Please refer to the GS2994/GS2993 data sheets for a complete list of settings Cable Length Indicator (CLI) GS2993 only The output at the Cable Length Indicator (CLI) pin is an analog voltage with a range of 0V to 3.3V. The output voltage varies monotonically with cable length. 10 of 12

11 6.3 Digital Inputs/Outputs Generally, digital inputs have a pull-down or a pull-up with a 100kΩ equivalent resistance. Please consult the data sheet of the device in question for more details. 6.4 Methods to Avoid Do not remove large copper areas from underneath the input transmission line components. Instead, antipads (as defined in this guide) should be used for optimized performance. When using antipads, use a copper pour attached to the ground net on the bottom of the board. This acts as a shield from sources of interference. Avoid breaks in the high-speed signal reference plane. Never reference high-speed signals to power planes. Always use a ground reference plane. If a ground plane is not available, re-design the stack-up so that a ground layer is used as a reference. The use of loosely-coupled co-planar waveguides and poorly-stitched copper pours within the vicinity of the transmission lines is not recommended. In most situations, the copper areas can couple unwanted energy into sensitive inputs such as the EQ's input. Avoid the use of electrolytic capacitors for decoupling. Instead, use high-quality ceramic capacitors and route with microstrip transmission lines. 11 of 12

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