THE drive toward high-density circuits in power supplies

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1 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 46, NO. 2, APRIL Impedance Formulas for Planar Magnetic Structures with Spiral Windings William Gerard Hurley, Senior Member, IEEE, Maeve C. Duffy, Associate Member, IEEE, Stephen O Reilly, and Seán Cian Ó Mathúna Abstract It is well established that magnetic components may be reduced in size by operating at high frequency. Miniaturization of magnetic components is ideally suited to microelectronics technologies such as thick film, which lend them to planar geometries. This paper describes new analytical models, which predict inductance- and frequency-dependent eddy-current losses in magnetic substrates. Prototype devices were fabricated by a thick-film process with four layers of conductors on a single ferrite substrate and in a sandwich configuration, consisting of conductors between ferrite slabs. The prototype devices were tested in the frequency range 10 khz 100 MHz. The measurements confirm the validity of the analytical models. Simulation with finite-element analysis was employed to identify different sources of losses: eddy current losses in ferrite substrates, proximity effect losses in conductors, and dielectric losses. Index Terms High-frequency circuits, microelectronics, multilayer inductors, planar magnetics, thick film inductors. NOMENCLATURE Filament radii, see Fig. 1., Height of filaments or coil centers above ferromagnetic substrate Defined in (15) and (16). Coil heights in axial direction. Current density at radius. Bessel function of the first kind. Complete elliptic integrals of the first and second kind, respectively. Self-inductance with substrate(s. Mutual inductance between two filaments in air. Defined in (4) and (5). Equivalent resistance with substrate(s). Coil dc resistance. Substrate separation in sandwich structure. Substrate thickness. Mutual impedance between two coils. Manuscript received November 25, 1997; revised July 16, Abstract published on the Internet January 18, This work was supported by PEI Technologies, Dublin, Ireland. W. G. Hurley is with the Department of Electronic Engineering, National University of Ireland, Galway, Ireland. M. C. Duffy, S. O Reilly, and S. C. Ó Mathúna are with PEI Technologies, National Microelectronics Research Center, National University of Ireland, Cork, Ireland. Publisher Item Identifier S (99) Fig. 1. Planar coils on a magnetic substrate. Additional mutual impedance due to presence of single ferromagnetic substrate, see (11). Additional mutual impedance in sandwich structure, see (14). Angular frequency (rad/s). Electrical conductivity of substrate. Permeability of free space ( H/m). Relative permeability of the substrate. Defined in (6) and (7). Defined in (12). I. INTRODUCTION THE drive toward high-density circuits in power supplies has been aided by low-profile planar magnetic transformers and inductors. Thick-film, thin-film, and printedcircuit-board (PCB) technologies are ideally suited to the manufacture of planar devices [1] [3]. Automated manufacturing processes improve reliability and reduce costs over labor-intensive hand-wound components. Planar geometries improve heat transfer characteristics and, thus, increase the power handling capability of the circuit. Operating at higher frequencies may reduce the size of components. The traditional analytical models for inductance and eddycurrent losses in conventional cylindrical or toroidal geometries do not apply to planar structures. Furthermore, current in a flat conductor, the width-to-height ratio of which may be 50 : 1, is not distributed uniformly over the cross section of the conductor, even at low frequencies. In this paper, new formulas are presented for the impedance of planar coils in air, on a single magnetic substrate and in a sandwich structure, which consists of conductors between ferrite slabs. The models /99$ IEEE

2 272 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 46, NO. 2, APRIL 1999 take full account of the eddy-current losses in the ferrite slabs, which are frequency dependent. The fabrication of multilayer prototype devices is described. The conductors are deposited using a thick-film screening process with interlayer dielectric insulation. Photoplots and masks for the conducting and dielectric layers are illustrated, along with an optical photograph of a microsection of the device. Impedance measurements were carried out on the prototypes in the range 10 khz 100 MHz. The measurements are compared with calculations using the new impedance formulas. Simulations with finite-element analysis (FEA) show that, in addition to eddy-current losses in the substrates, further losses result from proximity effects in the conductors and dielectric losses in the insulating layers. II. SPIRAL COILS ON A FERROMAGNETIC SUBSTRATE The formulas in this section are derived from Maxwell s equations, and the details are given in [4] and [5]. The formulas are summarized here for clarity and completeness. A. Substrate of Infinite Thickness Fig. 1 shows circular concentric planar coils on a magnetic substrate. In practice, a spiral coil would consist of sections connected in series, which can be accurately modeled by concentric circular coils. Normally, it would suffice to integrate the filamentary formulas [4] over the cross sections in Fig. 1 to obtain the mutual impedance between the sections, the inherent assumption being that the current density is uniform over the cross section. In a planar structure, the height-to-width ratio could be 50 : 1. Since the inside path for current flow is much shorter than the outside path of the section, it follows that the resistance on the inside is smaller and, therefore, the current density is higher. Evidently, with an inverse relationship between current density and radius, the current density at radius, for a coil current, is given by (1) The evaluation of for planar sections is slow to converge with numerical integration. An accurate result may be obtained by replacing the section with a filament at its geometric mean (GM), and using the well-known elliptic integral formula where and are complete elliptic integrals of the first and second kind, respectively, and with replaced by the geometric mean distance (GMD) [6] between the sections; in the case of self-inductance GMD, where is the height of the section and its width. It is normally sufficiently accurate to take GMD for mutual inductance calculations. B. Substrate of Finite Thickness In this section, the case of a substrate of finite thickness is considered. The geometry is the same as that shown in Fig. 1 with the substrate thickness given by. The resulting impedance is (5) (6) (7) (8) (9) (10) It is assumed that variation over the height of the section is negligible. The mutual impedance between the sections of Fig. 1 is obtained by integrating the filamentary formula over the cross sections, taking the current density distribution (1) into account. The mutual impedance is (2) where accounts for the component of impedance which would exist in the absence of the substrate and accounts for the substrate where (11) (12) Clearly, for, the result reduces to that given by (3), as expected. It is shown in [5] that (3) may be used when m. where (3) (4) C. Sandwich Structures The addition of a second substrate, above the planar coils, results in a sandwich structure, as shown in Fig. 2. The impedance of the sandwich structure is (13)

3 HURLEY et al.: IMPEDANCE FORMULAS FOR PLANAR MAGNETIC STRUCTURES WITH SPIRAL WINDINGS 273 Fig. 4. Screen generation. Fig. 2. Fig. 3. Planar coils in a sandwich structure. Screen printing process. III. EXPERIMENTAL DEVICE (14) (15) (16) A. Fabrication of Spiral Inductors Four-layer circular spiral inductors were manufactured on a magnetic substrate using thick-film technology. These inductors consisted of four layers of three conductor turns each deposited using thick-film conductor paste. A layer of dielectric material separates each of these conductor layers. The magnetic substrates used were made from Philips 4E2 ferrite material. The material specifications for the conductor paste, the dielectric paste, and the magnetic ferrite are given in the Appendixes. Thick film circuits are produced by the screen printing process, which involves using a mesh screen to produce designs on a suitable substrate. The mesh screen may be made from stainless steel or from synthetic fibers such as dacron and nylon. A viscous paste is forced through the screen to deposit a pattern onto the substrate. A typical screen printing setup is shown in Fig. 3. There are three basic categories of thick-film pastes. These are conductors, resistors, and dielectrics. The fabrication of the spiral inductor involves both conductors and dielectrics. Each paste contains: 1) a functional material, which determines the electrical properties of the paste; 2) a solvent/thinner, which determines the viscosity of the paste; 3) a temporary binder, which holds other ingredients together during the screen printing, drying, and firing processes; and 4) a permanent binder, which fuses particles of the functional material together and to the substrate. The fabrication process itself consists of four key steps. 1) Screen Generation: A negative image must be generated on the screen mesh so that the paste, which is forced through the screen, produces the required pattern on the substrate. The desired pattern must first be laid out using a suitable software layout package from which a mask or photoplot is created. A photosensitive emulsion is applied to the entire screen and the mask is then placed on the screen and exposed to ultraviolet light; this develops the emulsion on the screen. The parts of the emulsion that were not exposed by the mask may then be washed away using a spray gun, leaving the required pattern on the screen, as illustrated in Fig. 4. 2) Screen Printing: This involves forcing a viscous paste through the apertures in the patterned screen in order to deposit the required pattern onto a substrate. 3) Drying: This removes the organic solvents from the screen-printed paste by moderate heating. The substrate with the freshly printed paste is first air dried for 5 10 min to allow the paste to settle. It is then placed in an oven at 125 C for min and the organic solvents are removed by evaporation. 4) Firing: This involves running the substrate through a furnace with zones of increasing temperature, as shown in Fig. 5. First, the temporary organic binder is decomposed by oxidation and removed ( C, A in Fig. 5). Then, the permanent binder melts and wets both the surface of the substrate and the particles of the functional material (500 C C, B in Fig. 5). Finally, the functional particles are sintered and become interlocked with the permanent binder and the substrate (700 C C, C in Fig. 5). Each of these steps must be carried out for each layer of paste required. B. Masks The production of a patterned screen requires a mask or photoplot. For the four-layer device, a photoplot of each of the conductor layers must be generated. These four conductor layers are shown in Fig. 6. Each of these layers has a footprint of approximately 1 cm, with a track width of 600 m and a track spacing of 200 m.

4 274 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 46, NO. 2, APRIL 1999 Fig. 8. Optical photograph of a microsectioned device, scale 30 : 1. Fig. 5. Temperature profile of firing process. Fig. 9. Layout of validation device. (a) (b) (c) (d) Fig. 6. Photoplots of conducting layers. (a) Layer 1. (b) Layer 2. (c) Layer 3. (d) Layer 4. sample is then polished and an accurate cross section can then be examined. Fig. 8 shows an optical photograph of a microsectioned inductor. Note that the individual conductor layers can be easily recognized. The dimensions of the experimental device are shown in Fig. 9. Actual physical dimensions will vary slightly from the given values, because, by its nature, the screen printing process results in tapered walls and the individual layers do not line up exactly in the vertical direction, as seen in Fig. 8. Fig. 7. Masks for dielectric layers. A dielectric layer must separate each of the four conductor layers. Thus, masks of each of the dielectric layers must also be generated. Each of these layers must also contain a via hole through which the various conductor layers can be interconnected. The masks for the dielectric layers are shown in Fig. 7. C. Dimensions The prototype device has a footprint of approximately 1cm, with conductor track widths of 600 m and a track spacing of 200 m. Each conductor layer consists of three circular turns, each of which is made up of two semicircular lengths of different radii. A microsection of the experimental device is shown in Fig. 8. This was obtained by potting the inductor sample in an epoxy material and cutting it at the required location. The IV. VALIDATION Prototype devices were tested in air, on a single substrate, and in a sandwich structure. The experimental and calculated results are based on the equivalent circuit shown in Fig. 10(a). The capacitance was calculated for the idealized structure of Fig. 9, with the dielectric properties given in Appendix I, yielding pf. The input impedance of the prototype devices was measured with an HP4194A Impedance Analyzer in the form of magnitude and angle. This measurement was converted into the equivalent and of Fig. 10(a) for comparison purposes. Since there are three unknowns in the equivalent circuit, is taken as 14.8 pf as calculated; a sample calculation of and is given in Appendix II. The resonant frequency of the device is (17) The resonant frequency was measured in each prototype and compared with the theoretical value, given by (17). The

5 HURLEY et al.: IMPEDANCE FORMULAS FOR PLANAR MAGNETIC STRUCTURES WITH SPIRAL WINDINGS 275 with the measured results, this value is combined with,, and to give an equivalent,. A sample calculation is included in Appendix III. (a) (b) Fig. 10. (a) Equivalent circuit of prototype device. (b) Equivalent circuit with dielectric losses. results are summarized in Table I. The inductance values were calculated by the formulas in Section II. The agreement is quite good, it illustrates the utility of the new models in Section II in predicting resonant frequencies, and the validity of the capacitance calculation is confirmed. The dc resistance was measured and found to be ; this is bigger than the calculated value of 1.275, based on the electrical properties given in Appendix I. The difference may be explained by the idealized nature of the tracks in Fig. 9 compared with the tapered sections shown in Fig. 8; precise measurement of the actual track thickness is very difficult. Furthermore, the additional resistance as measured may be accounted for by contact resistance and the conducting vias. It is very difficult to measure these stray resistances, particularly when the paste resistivity varies from batch to batch. The prototype devices were modeled with FEA [7] to identify the individual loss mechanisms: eddy-current losses in the substrate, proximity effect losses in the conductors, and dielectric losses in the insulation. These components are identified in Table II as follows. 1) in the place of in Fig. 10(a) represent eddycurrent losses in the substrates; these values are found with FEA by using stranded conductors to suppress proximity effects. These values may be compared directly with the calculations to validate the formulas of Section II. 2) in the place of in Fig. 10(a) represent the combined eddy-current losses in the substrates and proximity effects in the conductors. 3) in the place of in Fig. 10(a) represent the combined eddy-current losses in the substrates and proximity effects in the conductors and dielectric losses in the insulation. The equivalent resistance in Fig. 10(b) is the dielectric loss, which may be found from the dissipation factor. In order to make a comparison A. Air The inductance of the prototype device is calculated by placing an equivalent filament at the GM of each section and using (8) as described in Section II-A. The inductance of the overall device is found by summing the self and mutual terms of each turn. The results are summarized in Table II(a) for measurements at 10 khz and 10 MHz. At 10 khz, the agreement for resistance and inductance confirms the validity of the model. At 10 MHz, the inductance is reduced by about 7%, due to the proximity effects in the conductors. The resistance due to proximity effects calculated by FEA is at 10 MHz and the remaining resistance is due to dielectric losses. The nature of the equivalent circuit in Fig. 10(a) is such that a very small change in the phase angle of the measured impedance may result in a large change in, which is particularly true when the measurement is in the vicinity of the resonant frequency. Evidently, the proximity effects and dielectric losses at high frequencies are important and impact significantly on the of the device. B. Substrate The prototype device of Fig. 9 was placed on a ferromagnetic Ni Zn ferrite substrate, which was 1-mm thick and the properties of which are given in Appendix I. The bottom layer was placed directly on the substrate. The results are given in Table II(b). The calculated values of and are found from (2) and (3) with the substrate properties given in Appendix I. The agreement in inductance values validates the theory in Section II for magnetic substrates. The doubling of inductance due to the substrate is confirmed. The simulation with FEA confirms the losses in the substrate are not significant even at 10 MHz. However, the additional losses due to the proximity effect in the conductors are significant and, as before, dielectric losses make a major contribution to overall losses. The simulation results showed that the current density in the conductors in significantly different at high frequency. In Fig. 11(a), the current density distribution without proximity effects shows the inverse relationship described in (1), (the closer the lines the higher the current density), whereas Fig. 11(b) shows the high concentration near the vertical edges due to proximity effects at 10 MHz. C. Sandwich A second ferrite substrate was placed on top of the coil, and the results are shown in Table II(c). The calculated impedance was found with (13). The large resistance which was measured and found from simulation at 10 MHz does not reflect a large increase in losses, since the dielectric losses are exactly the same as the other two devices. Rather, it reflects the model of Fig. 10(a) which shows a large due to the fact that the device is closer to resonance, in this case, at 19 MHz. This

6 276 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 46, NO. 2, APRIL 1999 TABLE I RESONANT FREQUENCIES C = 14:8 pf TABLE II (a) RESULTS FOR DEVICE IN AIR (NO MAGNETIC SUBSTRATE), (b) RESULTS FOR DEVICE ON A MAGNETIC SUBSTRATE, AND (c) RESULTS FOR DEVICE IN A MAGNETIC SANDWICH (a) (b) (c) (a) (b) Fig. 11. Current density distribution (a) without proximity effects and (b) due to proximity effects. is illustrated in the sample calculation in Appendix III. The results confirm that the main losses have been identified and quantified. The losses in the terminations were minimized by arranging the upper substrate so that it did not overlap the coil terminations with the lower substrate, thereby avoiding eddy-current losses. V. CONCLUSIONS This paper has described new impedance formulas for planar spiral coils with magnetic substrates. The formulas predict both inductance and equivalent resistance due to eddy-current losses in the substrates. The fabrication of a thick-film four-layer 12-turn planar device has been described. Comparing calculations with measurements on prototype devices has validated the new formulas. The inductance of spiral coils on magnetic substrates and in a magnetic sandwich have been predicted accurately and combined with capacitance calculations to predict resonant frequencies. Losses due to proximity effects in the conductors and the dielectric losses in the insulation layers have been quantified. The losses in the ferrite substrates were negligible compared with the proximity effect losses in the conductors and the dielectric losses in the insulation. The inclusion of a central magnetic core and the closing of the magnetic circuit in a pot-like structure would be natural extensions of this work. APPENDIX I MATERIAL SPECIFICATIONS The ferrite substrates were constructed from 4E2 material from Philips. The relevant properties of this material are as follows: relative permeability 25

7 HURLEY et al.: IMPEDANCE FORMULAS FOR PLANAR MAGNETIC STRUCTURES WITH SPIRAL WINDINGS 277 saturation flux density 150 mt electrical conductivity ( m). The thick-film conductor used was 9695 material from ESL. This is a low cost silver/palladium conductor. Typical properties are as follows: fired thickness 11 m electrical resistivity 5.5 cm. The dielectric paste used was 4905-CH also from ESL. Typical properties are as follows: dielectric constant ( ) 7 dissipation factor@10 MHz ( ) 0.6. [2] M. Mino, T. Yachi, A. Tago, K. Yanagisawa, and K. Sakakibara, A new planar microtransformer for use in micro-switching converters, IEEE Trans. Magn., vol. 28, pp , July [3] C. R. Sullivan and S. R. Sanders, Microfabrication of transformers and inductors for high frequency power conversion, in Proc. IEEE PESC 93, June 1993, pp [4] W. G. Hurley and M. C. Duffy, Calculation of self and mutual impedances in planar magnetic structures, IEEE Trans. Magn., vol. 31, pp , July [5], Calculation of self and mutual impedances in planar sandwich inductors, IEEE Trans. Magn., vol. 33, pp , May [6] F. W. Grover, Inductance Calculations: Working Formulas and Tables. New York: Dover, [7] User s Manual Maxwell 2D Field Simulator, version 4.33, Ansoft Corp., Pittsburgh, PA, Sept APPENDIX II MEASURED AND The measured impedance at 10 MHz in the sandwich device was at The admittance is pf. Define APPENDIX III CALCULATION OF The dissipation factor ( ) of the dielectric material is 0.6 at 10 MHz. and H. The equivalent series resistance is nh William Gerard Hurley (M 79 SM 90) was born in Cork, Ireland. He received the Bachelor s degree (Hons.) in electrical engineering from the National University of Ireland, Cork, Ireland, the Master s degree in electrical engineering from Massachusetts Institute of Technology, Cambridge, and the Ph.D. degree in transformer modeling from the National University of Ireland, Galway, Ireland, in 1974, 1976, and 1988, resepctively. From 1977 to 1979, he was a Product Engineer with Honeywell Controls, Canada, and, from 1979 to 1983, he was a Development Engineer in transmission lines with Ontario Hydro. He lectured in electronic engineering at the University of Limerick, Ireland, from 1983 to He is currently an Associate Professor of electrical engineering in the Department of Electronic Engineering, National University of Ireland, Galway. He is also the Director of the Power Electronics Research Center. He was a Visiting Professor at Massachusetts Institute of Technology during His research interests include high-frequency magnetics and power quality. Prof. Hurley is a Member of the Administrative Committee of the IEEE Power Electronics Society and the General Chair of PESC He is also a member of Sigma Xi. Maeve C. Duffy (S 95 A 96) was born in Monaghan, Ireland. She received the Bachelor s degree (Hons.) in electronic engineering from the National University of Ireland, Galway, Ireland, in 1992 and the Ph.D. degree in high-frequency planar magnetics from the Power Electronics Research Center, National University of Ireland, Galway, in She is currently a Research Officer, working in planar magnetics, at PEI Technologies, National Microelectronics Research Center, National University of Ireland, Cork, Ireland. H ACKNOWLEDGMENT The authors extend their grateful appreciation for the material assistance of Philips Components, BG Magnetic Products, Eindhoven. REFERENCES [1] M. Yamaguchi, S. Arakawa, H. Ohzeki, Y. Hayashi, and K. I. Arai, Characteristics and analysis of a thin film inductor with closed magnetic circuit structure, IEEE Trans. Magn., vol. 28, pp , Sept Stephen O Reilly was born in Cork, Ireland. He received the Bachelor s degree (Hons.) in electrical engineering in 1993 from the National University of Ireland, Cork, Ireland, and the Master s degree in microelectronics in 1995 from the National Microelectronics Research Center (NMRC), National University of Ireland, Cork, Ireland. Since joining PEI Technologies as a Research Officer at the NMRC, National University of Ireland, Cork, Ireland, he has been extensively involved in multilayer thick-film and PCB techniques, as well as electrical testing, simulation, and characterization for planar magnetic components. He now works in the field of planar magnetic components for data communications and RF applications.

8 278 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 46, NO. 2, APRIL 1999 Seán Cian Ó Mathúna was born in Cork, Ireland. He received the Bachelor s degree in electrical engineering, the Master s degree in microelectronics, and the Ph.D. degree in microelectronics from the National University of Ireland, Cork, Ireland, in 1982, 1984, and 1994, respectively. From 1982 to 1993, he was instrumental in establishing the Interconnection and Packaging Group at the National Microelectronics Research Center (NMRC), National University of Ireland, Cork, Ireland, where he held the position of Senior Research Scientist. His responsibilities included design and application of IC package performance, monitoring test chips, practical and theoretical assessment of environmental reliability, and thermal and thermomechanical performance of IC packages and their associated interconnect and surface mount technology. From 1987 to 1993, he was Chairperson of SMART Group-Ireland, a national technical support group for companies involved in surface mount and related technologies. In 1993, he joined PEI Technologies (formerly Power Electronics Ireland), NMRC, National University of Ireland, Cork, Ireland, as Technical/Commercial Director, where he was responsible for power packaging, planar/integrated magnetics, and product qualification. In 1997, he rejoined NMRC as Group Director with responsibility for microsystems.