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1 5746 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 10, OCTOBER 2015 High Efficiency on Si-Integrated Microtransformers for Isolated Power Conversion Applications Ningning Wang, Member, IEEE, Rais Miftakhutdinov, Santosh Kulkarni, Member, IEEE, and Cian O Mathuna, Fellow, IEEE Abstract This paper details the design, fabrication, and characterization of silicon-integrated microtransformers for isolated bias supplies. Racetrack-shaped microtransformers were designed and fabricated using the advanced double-layer metal (DLM) microfabrication process. The DLM devices have high inductance density of more than 80 nh/mm 2 with an efficiency of approximately 78.2% at 20 MHz at 0.5-W output. This is the highest efficiency and power density reported for an integrated transformer in the literature. The inductance drop is less than 20% with a bias current of 0.35 A with up to 6-kV dc breakdown voltage achieved. Index Terms Integrated circuits, isolation technology, magnetic cores, magnetic devices, power conversion, power transformers, switched-mode power supply. I. INTRODUCTION THE integration and high density trends in electronics have highlighted the need for miniaturization of power converters. The overall size of converter can be reduced by increasing the converter switching frequency, because of the reduction in the required inductance value at higher frequencies, which allows for smaller footprint of microtransformers where isolation is preferred. Where only small inductance is required, the transformers can be potentially integrated onto the same substrate at the power train to facilitate monolithic integration of the power converter. However, integrating microtransformers on silicon and, at the same time, achieving high efficiency at frequencies above 10 MHz, is still a very challenging task, due to increased winding conduction losses and magnetic core losses. Much of the previous works have focused on the modeling, microfabrication, and test of microtransformers for isolation [1] [10]. Different types of structures have been used to realize microtransformers, such as solenoid and spiral. Solenoidtype microtransformers were fabricated using multilevel metal schemes to wrap the coils around a magnetic core [4] [8]. Single deposition of the magnetic core automatically provides a completely closed magnetic circuit and hence minimizes leakage Manuscript received June 18, 2014; revised July 27, 2014; accepted November 4, Date of publication November 20, 2014; date of current version May 22, This work was supported by Enterprise Ireland under Grant CFTD 2008/331. Recommended for publication by Associate Editor C. Fernandez. N. Wang and S. Kulkarni are with the Microsystems Centre, Tyndall National Institute, University College Cork, Cork, Ireland ( ning.wang@tyndall.ie; santosh.kulkarni@tyndall.ie). R. Miftakhutdinov is with Texas Instruments, Dallas, TX USA ( r-miftakhutdinov1@ti.com). C. O Mathuna is with the Microsystems Centre, Tyndall National Institute, and the Department of Electrical and Electronic Engineering, University College Cork, Cork, Ireland ( cian.omathuna@tyndall.ie). Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /TPEL flux. However, the disadvantage of this approach is that it is difficult to introduce uniaxial anisotropy in the core, which is required for the high-frequency operation. An air-core microtransformer has also been implemented for signal and power transfer in [9] and [10], but restricted to operating at frequencies of several hundred megahertz. The spiral-type microtransformers that have a conductor layer sandwiched between two layers of magnetic material have also been reported by different research groups [11], [12]. In this study, we use a particular spiral design racetrack shape with induced uniaxial and shape anisotropy in the core in order to achieve a high-frequency performance. In previous work [2], [3], [13] [17], we demonstrated the modeling, design, and test of the microtransformer using single-layer metal (SLM) process with relatively large footprint area, e.g., tens of mm 2, aimed at 5-MHz switching frequency. A typical SLM microtransformer is shown in Fig. 1. The objective of this study is to improve the device efficiency and footprint reduction at higher switching frequency, namely 20 MHz. This paper will first describe the benefits of using integrated microtransformers in a power system for an isolated bias supply in Section II. The requirements for microtransformers for such an isolated bias supply will be described. In Section III, the development of microtransformer technology will be described including device modeling, design, and process development. Microtransformer prototyping and characterization in a full-bridge circuit will be given in Section IV. Conclusions will be given in Section V. II. SYSTEM DESIGN Efficient switching power conversion is the cornerstone of generation, distribution, and use of electrical energy. All power converters fall into the following categories: ac dc, dc ac, ac ac, and dc dc. Power devices, like FET, IGBT, BJT, GTO, etc., are building blocks of various power stage topologies that are used for power conversion. The power device is usually turned ON and OFF by a driver IC powered from bias supply. There are very few cases when power devices share the common potential or ground with the same nonisolated bias power supply for driver ICs. In most cases, power conversion topologies include power devices in half-bridge, full-bridge, multiphase, or various configurations connected in series requiring separate isolated bias supply for each driver and related switch. As an example, the simplified block diagram of a three-level inverter topology, popular for high-voltage and high-power applications, is shown in Fig IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See standards/publications/rights/index.html for more information.
2 WANG et al.: HIGH EFFICIENCY ON SI-INTEGRATED MICROTRANSFORMERS FOR ISOLATED POWER CONVERSION APPLICATIONS 5747 Fig. 1. On Silicon racetrack-shaped integrated microtransformer using an SLM (copper) process. Fig. 4. Isolated driver board. Fig. 2. Three-level inverter with signal and bias isolation for driver ICs. Fig. 5. Isolated integrated bias supply. Fig. 3. Electrical diagram of a complete isolated driver solution. In this diagram, every FET has its own driver IC. The interface between the controller and driver is provided by an isolated bias supply using transformers for power and signal isolation. In the practical design, the power device might need different voltages to turn ON and turn OFF. In this case, split output rail bias supply is used or two separate bias supplies are needed for each power device. An example of such solution is shown in Fig. 3. The circuit includes two isolated bias supplies with transformers, one for turning ON the power switch, and the second for turning it OFF, a signal isolator that could use either optocoupler, capacitive, or transformer based isolation, and a driver IC. It is necessary to emphasize that levels of isolation requirements used in industry depend on system and application. These isolation levels are functional, basic, and reinforced. Functional isolation must provide normal operation of the system in the case where there is no access of the operator into the powered circuit. Functional isolation must meet working voltage requirements within specified lifetime and industry recommendations for proper assembly, but the safety standards rules are not applied. Basic and reinforced isolation fall into safety standards strict requirements and must be qualified accordingly. In such systems and applications, the operator has access to the parts of the powered system and must be protected in the case of isolation breakdown. Two layers of basic isolation are equivalent to reinforced isolation. However, even a single layer of insulation can be qualified as reinforced isolation if it meets related requirements and passes all necessary qualification tests on a regular basis during production. There are various implementations of isolated driver circuits currently used in industry depending on power and isolation requirements and integration levels. One example is shown in Fig. 4. The size of this board is 38 mm 36 mm 12.5 mm. Most of the area and volume are occupied by bias supplies. In this case, the bias supplies are based on discrete components and transformers assembled on special lead frame and molded to
3 5748 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 10, OCTOBER 2015 TABLE I BIAS SUPPLY REQUIREMENTS TABLE III OPTIMIZED MICROTRANSFORMER DESIGNS Parameters Value Parameters Design 1 Design 2 Isolation 5 kv RMS reinforced isolation output to input UL 1577, IEC (VDE 0884, Rev. 2) Nominal input voltage 5 V Nominal output voltage 5 V Load Up to 100 ma, limited by 0.5-W output power Efficiency >65% Output ground slew rate Up to ±100 V/ns Operating temperature 40 to 125 C Other requirements TTL logic threshold Enable Thermal and Short Circuit Protection Soft Start Wide Body SOIC-8DWV Package Winding width, μm Winding thickness, μm Winding spacing, μm Turns ratio 6:6 7:7 Core thickness, μm Core length, mm Device length, mm Device width, mm DC resistance, Ω Inductance, nh TABLE II MICROTRANSFORMER DESIGN SPECIFICATIONS Parameters Value Switching frequency 20 MHz Turns ratio 1:1 Footprint area <4mm 2 Input Voltage 5 V Output Voltage 5 V Load current 100 ma Profile: <200 μm form isolated bias supply in package. The trend in industry is toward size and cost reduction of isolated bias supplies by using higher levels of integration and advanced IC manufacturing processes. Thus, the development of integrated, on-wafer, bias supply transformers becomes an important direction. A. Isolated Bias Supply as a Sample Application Specific requirements for isolated bias supply depend on system requirements and application. The technology, type, and rating of the power device in the system determine the required drive power and voltage. Optimal drive voltages for the majority of power devices can be anywhere within 5 20 V range, while the drive power per single switch, of between 0.2 and 2 W, covers most practical cases in power converters with output power below 5 kw. Fig. 5 shows the block diagram of a highly integrated isolated bias supply. The bias supply includes a high-frequency resonant inverter driving a microtransformer and rectifier. Table I shows specific requirements for one of the applications. Based on these requirements for an isolated bias supply, the requirements for a microtransformer are determined in the next section. B. Microtransformer Design Specifications Based on the target application specifications given in Table I, we set the design specifications of microtransformers as in Table II. Fig. 6. Fabrication process flow for DLM microtransformers. III. DEVELOPMENT OF MICROTRANSFORMERS Using the validated microtransformer model introduced previously [14] [17], a design optimization study was undertaken to investigate the impact of using new double-layer metal (DLM) process on the efficiency of a microtransformer operating in a 20-MHz converter. Compared to the previous SLM process, three key parameters varied were: 1) device footprint area; 2) conductor width; and 3) moving from SLM structure to DLM structure in the analytical model for maximizing transformer efficiency. A minor adjustment, which is also Dowell s formula based, was made to the previously developed winding ac resistance model and leakage inductance model [16], [17] to suit the DLM structure. The relative permeability of the magnetic core material (Ni45Fe55) was taken to be 280 along with a material resistivity of 45 μω cm. The thickness and spacing of the Copper (Cu) conductors were both fixed to 15 μm, while the conductor width (Wp) was varied from 20 to 40 μm inthe design study. A detailed comparison on device performance between SLM technology and DLM technology was given in previous work
4 WANG et al.: HIGH EFFICIENCY ON SI-INTEGRATED MICROTRANSFORMERS FOR ISOLATED POWER CONVERSION APPLICATIONS 5749 Fig. 7. (a) Top view and (b) cross section of a fabricated prototype double metal device. Fig. 8. Inductance measured on prototypes of designs 1 and 2 with frequency varying from 1 to 110 MHz. [1]. The losses included in the calculation are dc winding conduction, ac winding conduction, magnetic core hysteresis, and magnetic core eddy current. For a given area, if the number of turns of windings and conductor width is fixed, the resulting DLM device has a longer magnetic core than SLM device, hence smaller flux density at the same voltage and less magnetic core loss. It explains why, for a small footprint area, when the magnetic core losses dominate, the microtransformers using DLM structure show superior performance, especially for devices with footprint area of less than 4 mm 2. Because the number of turns of windings and width of conductor is fixed, an increase in the footprint area also results in higher winding resistance. It reaches an optimum footprint area, where the increase of Copper losses can no longer be compensated by the reduction of magnetic core losses. The efficiency of the DLM design reaches its optimum at this optimum footprint area. In this design study, the optimum footprint area for 20-μm conductor width is approximately 3.5 mm 2. The optimum footprint area becomes larger if using wider conductor width. Based on the design study, the optimized design specifications for two DLM microtransformers are summarized in Table III. Both DLM designs have the same device height, 90 μm. IV. PROTOTYPING AND CHARACTERIZATION OF MICROTRANSFORMERS The fabrication process for DLM microtransformers is detailed in Fig. 6. The fabrication for DLM microtransformers is a seven-mask process using standard MEMS processing techniques, similar to the SLM process reported in previous work [13]. The bottom magnetic core is electroplated and patterned on native oxide insulated silicon wafer. The copper windings, however, are two-layer, with SU-8 as insulating layer in-between. Each of the windings is 15 μm thick and is electrodeposited with the first layer deposited on BCB and the second layer on SU-8 (20 μm thick). SU-8 is a type of Epoxy-Based Negative
5 5750 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 10, OCTOBER 2015 Fig. 9. Inductance measured under various bias current for design 1 and design 2 prototypes. Fig. 10. Voltage Gain of design 2 prototype. photosensitive resists widely used in MEMs fabrication [18]. SU-8 (50 μm thick) is patterned on the second copper coil for top core insulation. The top magnetic core is electrodeposited and patterned on the SU-8 layer. The top view and cross section of the DLM microtransformers are shown in Fig. 7(a) and (b), respectively. The DLM design is 20 μm thicker than the SLM design due to the additional insulator between the primary and secondary windings. A. DC Resistance (DCR) The DCR was conducted using a Cascade probe station. A four-wire Kelvin setup was applied in the test in order to eliminate the contact resistance and parasitic resistance associated with cables and probes. The measured primary and secondary DCR for design 1 is 1.23 and 0.99 Ω, respectively. The measured primary and secondary DCR for design 2 is 1.45 and 1.22 Ω, respectively. All the measured values are close to the corresponding design value. B. AC Inductance and AC Resistance Microtransformer prototypes were wire bonded to a PCB test board and the ac inductance and ac resistance tests were conducted using an Agilent 4294A Precision Impedance Analyzer. The test frequency was swept from 1 to 110 MHz and the ac inductance and ac resistance were recorded. The tested results for prototypes are shown in Figs. 8 and 9. The tested average inductance at 1 MHz for design 1 and design 2 prototypes are 210 and 270 nh, respectively. All the inductance and resistance curves obtained from the tests are reasonably flat up to 20 MHz with a drop less than 10%, which indicates the transformer losses are under control up to 20 MHz. C. Saturation Current Test The bias characteristics of devices were tested using an HP 4285 LCR meter equipped with HP Current Source. The dc bias current was supplied to flow through the device under test (DUT) and the inductance was measured at a fixed frequency, namely 20 MHz in this test. The inductance typically rolls off with the increase of bias current. The saturation current here is defined as the current value at which the inductance decreases by 20% to its initial value. The bias characteristics of devices are shown in Fig. 9. The tested saturation current (bias current at 20% drop of inductance) for design 1 and design 2 are approximately 0.35 and 0.4 A, respectively. D. Coupling The fabricated microtransformers were wire bonded to a test board. A de-embedding method is applied in this work to eliminate the series parasitics associated with the test structure of the DUT [3], [19]. The wire-bonded devices were then tested using an R&S Vector Network Analyzers ZRVE, which offers a testing frequency from 9 khz up to 4 GHz. The measured two-port S parameters of the DUT and the dummy device are transformed into impedance matrixes ZDUT and ZDummy, respectively. The de-embedding correction was performed by subtracting the impedance matrix of the dummy device from that of the DUT to obtain the impedance matrix of the microtransformer tested. The tested voltage gains for one of the packaged design 2 prototypes, with and without 50-Ω load, are shown in Fig. 10. The voltage gain curve obtained shows relative flatness in the frequency range between 10 and 30 MHz. For frequencies lower than 10 MHz, the resistance is dominant, which reduces the coupling significantly. With the increase of frequency, the reactance associated with the magnetizing inductance becomes dominant; hence, the coupling is increased. However, with a further increase in the frequency, due to the increase of core loss and eddy current loss in the conductors, the resistance becomes dominant again, which reduces the voltage gain. Coupling factor is widely used to evaluate the performance of a transformer. The primary and secondary inductances have been measured on the microtransformers. However, the leakage inductance or the mutual inductance cannot be acurately measured in this study. The coupling factor cannot be directly obtained from the measurements. The primary windings are
6 WANG et al.: HIGH EFFICIENCY ON SI-INTEGRATED MICROTRANSFORMERS FOR ISOLATED POWER CONVERSION APPLICATIONS 5751 Fig. 11. Measured coupled factors of microtransformer (design 2) using Vector Network Analyzer-based small-signal test setup and RF amplifier-based large-signal test setup. identical to the secondary windings in both microtransformer designs. Hence, the coupling factor should be equal to the ratio of the output voltage to the input voltage, V out /V in, when the secondary is open-circuit. Based on this approach, the coupling factor can be calculated directly from the voltage gain obtained in the small-signal measurements using the R&S Vector Network Analyzers ZRVE. The measured coupling factor from small-signal measurements of design 2 is shown in Fig. 11. The voltage ratio was also measured using large sinal measurement setup, the details of which is given in Section IV-E. The measured voltage ratio using an RF Amplifier as an input voltage source from the large-signal test is also plotted in Fig. 11. The voltage ratio, V out /V in, representing the coupling factor from both measurements agrees well with each other as should be. E. Efficiency To minimize parasitics, the microtransformer samples were mounted to a specially designed PCB utilizing a nonconductive die attach and wire bonded using 1 mil Au (Gold) wire, as shown in Fig. 12. The device was then overcoated with a dielectric material to isolate and protect the device. The test PCB included a Kelvin-connected microtransformer directly bonded on the PCB, a bridge rectifier circuit, a capacitive filter, and two 100-Ω resistors in parallel on the secondary side. Voltages at the primary and secondary sides were measured using Kelvin connections to the die pads. A large-signal test setup was used to test the efficiency of microtransformers. Test equipment included: Dual 100-MHz Function Generator AFG3102 from Tektronix, RF Amplifier ENI-310L, four-channel 1 GHz Oscilloscope DP07104 from Tektronix, 500-MHz voltage probes P6139A, 120-MHz 30-A current probe TCP0030, Multimeters. The test circuit schematic is shown in Fig. 13. All the tests were conducted at room temperature. Fig. 12. Fig. 13. Microtransformers directly bonded to PCB board for efficiency test. Efficiency test circuit schematic. The waveforms measured at 20 MHz on test boards, with design 1 and design 2 microtransformer prototypes, are shown in Figs. 14 and 15, respectively. The Microtransformers are loaded by a rectifier and a capacitive filter in accordance with schematic
7 5752 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 10, OCTOBER 2015 Fig. 14. Waveforms measured at 20 MHz on test boards with design 1 microtransformer prototype. Fig. 15. Waveforms measured at 20 MHz on test boards with design 2 transformer prototype. in Fig. 13. In these waveforms, red represents input voltage, blue represents voltage at secondary winding, pink represents input current, and red horizontal indicates dc voltage at output filter set by cursor based on measurements by multimeter to minimize disturbance to most critical waveforms. Based on the voltage and current waveforms obtained, the efficiency of the microtransformers can be calculated. The efficiency of design 2 microtransformer was 78.2% at an output power 0.5 W and frequency of 20 MHz. The power density of the microtransformer die is 110 W/cm 3 or 1800 W/in 2. Based on the actual measured dimensions, the analytical model has been reapplied to calculate the efficiency. The resulting efficiency is 78%, which is close to the measured efficiency. The efficiency of the microtransformer can also be obtained using the impedance matrix from S parameter. The detail of the conversion theory can be referred to [20]. Efficiency can be expressed by Z L Z 21 Efficiency = Z 11 Z 22 Z 11 Z L Z 12 Z 21 where Z 11,Z 12,Z 21, and Z 22 are Z parameters and Z L is the load. The efficiency calculated using the above equation is 82% at 20 MHz, which is slightly higher than the efficiency directly measured using the large-signal test setup. The results from this study have been compared to the microfabricated transformers reported in the literature, as shown in Table IV. The good voltage gain obtained in this study is mainly because the microtransformer has a high inductance-to-resistance ratio and a good coupling factor. Compared to the other work, the microtransformer demonstrated in this study has a high inductance density
8 WANG et al.: HIGH EFFICIENCY ON SI-INTEGRATED MICROTRANSFORMERS FOR ISOLATED POWER CONVERSION APPLICATIONS 5753 TABLE IV MEASURED PARAMETERSCOMPAREDWITH THEVALUES FROM THE LITERATURE R dc (Ω) L(μH) Freq. (MHz) Gain (db) Coupling Efficiency Type Size (mm 2 ) Ref. [3] % Racetrack 24 Ref. [5] N/A Solenoid 25 Ref. [6] N/A Solenoid 4 Ref. [7] N/A Square spiral 12.9 Ref. [8] N/A N/A N/A Square spiral 9 Ref.[10] % Square spiral 2.25 Ref. [11] N/A % Circular spiral 7.44 Ref. [21] N/A Circular spiral 0.5 Ref. [22] N/A N/A 0.9 N/A Toroid 4.8 Present work % Racetrack 3 Fig. 16. Loss breakdown of microtransformer design 2 at 20 MHz with 0.5-W output power. of 80 nh/mm 2 at 20 MHz, a small footprint area, high coupling, and high voltage gain, and low DCR. The measured efficiency and power density of the microtransformer are the highest of all the integrated transformers reported in the literature. The comparison indicates that this racetrack microtransformer is very suitable for signal transformation in the tens of megahertz frequency range. A few hundred nanohenries are typically required for such an operating frequency range. The size of device can be kept less than 3 mm 2. Each individual loss of microtransformer can be calculated, as shown in Fig. 16. The main contributors for the total microtransformer loss are the primary winding conduction (Pcu_pri) and the magnetic core eddy current (Peddy). The magnetic core hysteresis loss (Phys) is less than the eddy current loss due to the small coercivity of the material (<80 A/m). The secondary winding conduction loss (Pcu_sec) is smaller than the primary conduction loss due to the extra conduction loss caused by the magnetizing current in the primary winding. To further increase the efficiency of the microtransformers, core lamination techniques for reducing eddy current loss and thicker winding are needed. Preliminary isolation tests were also conducted in order to investigate its isolation capability. For these tests, a standard high-voltage transformer isolation dc breakdown test setup has been used. The microtransformers were first wire bonded to Fig. 17. Photo of an assembled microtransformer in a CDIP. ceramic dual-in-line package (CDIP). Two wire bonds were used to connect each pad to facilitate the Kelvin test. Fig. 17 shows a microtransformer wire bonded to a CDIP. The devices were overcoated with a liquid dielectric compound to facilitate isolation testing. The microtransformer samples were placed into oil to avoid breakdown spark through the air. Up to 6 kv, dc breakdown voltage was achieved during the tests. V. CONCLUSION Two different DLMmicrotransformer designs have been designed and fabricated for an isolated bias supply application. The tested parameters included DCR, ac inductance, ac resistance, saturation current, voltage gain, and efficiency. The obtained DCR is close to design values and the ac inductance and resistance is flat up to 20 MHz. The demonstrated saturation current is up to 0.4 A with 20% drop of inductance. The measured efficiency of microtransformer is 78.2% at an output power of 0.5 W and frequency of 20 MHz. The power density of the microtransformer die is 110 W/cm 3 or 1800 W/in 2.Upto6kV, dc breakdown voltage has been achieved during the breakdown voltage tests.
9 5754 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 10, OCTOBER 2015 ACKNOWLEDGMENT The authors would like to acknowledge M. Hegarty, J. O Brian, and A.-M. Kelleher from Tyndall s Central Fabrication for fabricating the prototypes, F. Waldron and K. Rodgers from packaging group for assembling the prototypes, and S. Roy and J. Patterson for the support. REFERENCES [1] N. Wang, S. Kulkarni, B. Jamieson, J. Rohan, D. Casey, S. Roy, and C. O Mathuna, High efficiency Si integrated micro-transformers using stacked copper windings for power conversion applications, in Proc. Appl. Power Electron. Conf., Orlando, FL, USA, Feb. 2012, pp [2] T. O Donnell, N. Wang, R. Meere, F. Rhen, S. Roy, D. O Sullivan, and C. O Mathuna, Microfabricated inductors for 20 MHz DC-DC converters, in Proc. Appl. Power Electron. Conf., 2008, pp [3] N. Wang, T. O Donnell, S. Roy, S. Kulkarni, P. Mccloskey, and C. O Mathuna, Thin film microtransformer integrated on silicon for signal isolation, IEEE Trans. Magn., vol. 43, no. 6, pp , Jun [4] H. Kurata, K. Shirakawa, O. Nakazima, and K. Murakami, Study of thin film micro transformer with high operating frequency and coupling coefficient, IEEE Trans. Magn.,vol.29,no.6,pp ,Nov [5] M. Mino, T. Yachi, A. Tago, K. Yanagisawa, and K. Sakakibara, Planar microtransformer with monolithically integrated rectifier diodes for microswitching converters, IEEE Trans. Magn., vol. 32, no. 2, pp , Mar [6] M. Xu, T. M. Liakopoulos, and C. H. Ahn, Packaging-compatible microinductors and microtransformers with screen-printed ferrite using low temperature processes, IEEE Trans. Magn.,vol.34,no.4,pp , Jul [7] J. Y. Park and J. U. Bu, Packaging compatible microtransformers on a silicon substrate, IEEE Trans. Adv. Packag., vol. 26, no. 2, pp , May [8] A. Lotfi, R. Bruce, V. Dover, L. Schneemeyer, and M. Steigerwald, Micro-transformer devices using thin-film electiroplated deposition, in Proc. 29th IEEE Annu. Power Electron. Spec. Conf., Fukuoka, Japan, May 1998, vol. 2, pp [9] Analog Device. [Online]. (2006). Available: Analog_Root/static/pdf/isolators/techDocs/isoPower.pdf [10] C. D. Meyer, S. S. Bedair, B. C. Morgan, and D. P. Arnold, Highinductance-density, air-core, power inductors, and transformers designed for operation at MHz, IEEE Trans. Magn., vol. 46, no. 6, pp , Jun [11] K. Yamaguchi, S. Ohnuma, T. Imagawa, J. Toriu, H. Matsuki, and K. Murakami, Characteristics of a thin film microtransformer with circular spiral coils, IEEE Trans. Magn., vol. 29, no. 5, pp , Sep [12] C. R. Sullivan and S. R. Sanders, Measured performance of a high-powerdensity microfabricated transformer in a DC-DC converter, in Proc. IEEE Annu. Power Electron. Spec. Conf., Baveno, Italy, Jun. 1996, pp [13] M. Brunet, T. O Donnell, L. Baud, N. Wang, J. O Brien, P. McCloskey, and S. C. O Mathuna, Performance of micro-transformers for DC-DC converter applications, IEEE Trans. Magn.,vol.38,no.5,pp , Sep [14] N. Wang, T. O Donnell, H. Hauser, P. McCloskey, and S. C. O Mathuna, Hysteresis modelling of high frequency micro-transformers, J. Magn. Magn. Mater., vols , Supplement 1, pp. E1763 E1764, May [15] T. O Donnell, N. Wang, M. Brunet, S. Roy, A. Connell, J. Power, S.C. O Mathuna, and P. McCloskey, Thin film micro-transformers for future power conversion, in Proc. Appl. Power Electron. Conf., Anaheim, CA, USA, Feb. 2004, pp [16] N. Wang, H. Hauser, T. O Donnell, P. McCloskey, and C. O Mathuna, Modelling of high frequency micro-transformers, IEEE Trans. Magn., vol. 40, no. 4, pp , Jul [17] T. O Donnell, N. Wang, M. Brunet, P. McCloskey, and S. C. O Mathuna, Modelling and measurements of micro-transformers for power conversion, presented at the ECS Conf., vol. 25, Salt Lake City, UT, USA, Oct [18] [Online]. (2014). Available: SU8_KMPR.htm [19] P. J. Van Wijnen, On the Characterization and Optimisation of High-Speed Silicon Bipolar Transistors. Beaverton, OR, USA: Cascade Microtech, Inc., [20] D. M. Pozar, Microwave Engineering, 3rd ed. New York, NY, USA: Wiley, 2004, pp [21] L. Peng, R. Wu, X. Fang, Y. Toyoda, M. Akahane, M. Yamaji, H. Sumida, and J. K. O. Sin, A novel 3D TSV transformer technology for digital isolator gate driver applications, in Proc. 25th Int. Symp. Power Semicond. Devices ICs, Kanazawa, Japan, May 2013, pp [22] X. Xing, N. X. Sun, and B. Chen, High-bandwidth low-insertion loss solenoid transformers using FeCoB multilayers, IEEE Trans. Power Electron., vol. 28, no. 9, pp , Sep Authors photographs and biographies not available at the time of publication.
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