Integrated Inductors with Magnetic Materials for On-Chip Power Conversion

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1 Integrated Inductors with Magnetic Materials for On-Chip Power Conversion Donald S. Gardner Collaborators: Gerhard Schrom, Fabrice Paillet, Tanay Karnik, Shekhar Borkar Circuits Research Lab & Future Technology Research Intel Labs Intel Corporation

2 Outline DC Voltage Converters Comparison of buck converters Comparison of inductors with magnetic films Magnetic material properties Magnetic hysteresis loops Complex permeability spectra Inductors Structure cross sections Inductance measurements Eddy current and skin effect Sheet and shunt inductance

3 Multi-Core Power Management Voltage Regulator Voltage Regulator Voltage Regulator Voltage Regulator Voltage Regulator Today - Coarse Grain Power Management same voltage to all the cores, variable voltage Future Fine Grain Power Management each core or cluster of cores operates at the optimum voltage

4 Two-Phase Buck Converter with Coupled Inductors Inductor Power Losses DC loss component AC loss component 2 2 I p p P LOSS = RDC I Lavg + RAC + 12 P hys Load dependent Frequency dependent tm tc magnetic material (CZT=CoZrTa) I D = dutycycle f = frequency s p _ p (1 D) V = f L s eff out wc insulator Al or Cu wires Fundam entals of Power Electronics by Robert W. Erickson

5 100~480 MHz Switching Regulator V IN =1.2V, V OUT =0.9V, L=6.8nH, F=233MHz Φ 3 Φ 2 Discret e I nductors Φ 1 Φ 0 4.3ns High frequency Hysteretic multi-phase topology 1ns response 88% efficiency Schrom, Gardner, et.al., IEEE PESC 2004 and IEEE VLSI Symp

6 Comparison of DC Converters [3] [4] [5] [6] [7] Pavo-1 Year Tech [µm] n/a 0.25 n/a 0.25 n/a 0.09 # phases V IN [V] V OUT [V] f [MHz] Eff. [%] L TOT [µh] C [µf] n/a n/a I MAX [A] x higher f 1000x Smaller L and C Area [mm 2 ] n/a n/a 0.14

7 Package-Integrated VR with Intel Core 2 Duo Processor Vin = 3V, Vout = 0~1.6V f = 10~100 MHz Current = 50 Amps / 75 Amps peak Size = 37.6 mm 2, 130 nm CMOS

8 Efficiency Measurements Package embedded air core inductors: 84.9% Discrete powdered Fe core inductors:87.9% Load adaptive bridge activation improved by >10% G. Schrom et. al., APEC, Paper #SP1.4.2, p. 75, 2010

9 RF CMOS Integrated Circuit Inductors make up 24% of this chip Inductance density of spirals is small (<100 nh/mm 2 )

10 Inductance Densities vs. Q-Factor from the Literature Gardner, Jam ieson, et.al. I EEE Trans. Magnetics, 45, pp. 4760, 2009.

11 Magnetic Hystersis Loops for CoZrTa & NiFe Slope µ = 1050 Slope µ = 3000

12 Permeability vs. Applied Magnetic Field Magnetic anisotropy H k has tw o com ponents: The intrinsic induced anisotropy from the deposition The dem agnetizing energy caused by the sam ple shape

13 Complex Permeability Model δ = 2ρ ωµ i µ o δ = skin depth ρ = resistivity of m agnetic film ω = frequency µ i = relative dc perm eability d = film thickness µ = 2δ (1 + j) d µ i tanh (1 + j) d 2δ High resistivity materials are needed to reduce the eddy currents and increase the skin depth. CoZrTa ρ = µω- cm

14 Permeability Spectra of CoZrTa Real Com ponent I m aginary Com ponent

15 Permeability Spectra of CoZrTa Real Com ponent I m aginary Com ponent

16 Inductance Modeling of Wire with Magnetic Material Magnetic Material Wire Magnetic Material Maximum Increase in Inductance 1 layer magnetic film 2 2 layers magnetic film µ r

17 Spiral and Transmission Line Inductors Hard Easy Structures take advantage of the uniaxial magnetic anisotropy.

18 Cross-Sectional Image of Inductor in 130 nm 6-level Metal CMOS Process Hard Axis CoZrTa Inductor Metal CoZrTa Cu (M6) Cu (M5) Cu (M4) Cu (M3) Cu (M2) Cu (M1) Magnetic Via

19 Spiral Inductors with Single Magnetic Layer Increase in inductance is small (10~30% at up to 9.8 GHz)

20 Spiral Inductors with Two Magnetic Layers Inductance increases by 9

21 Magnetic Flux Density At 1GHz B-field (T) Unlam inated Cobalt alloy Lam inated Cobalt alloy Skin-depth effect lim its penetration of B-field. Larger skin depth results in lower losses.

22 Inductance vs. Frequency of Spirals Inductance density is 1,700 nh/mm 2 Roll off is from resonance (1/ LC) of inductor.

23 Spiral and Stripe Inductors Using 5um thick Copper Hard Easy Structures take advantage of the uniaxial magnetic anisotropy.

24 Magnetic Via Cross-Sectional Image of Inductor in 90 nm CMOS Process Magnetic Via 9 0 nm 7 - level Metal CMOS Process

25 Hard Axis Cross-Sectional Image of Inductor

26 Stripe Inductors With Thick Copper Inductance increases by up to over 30

27 Inductance Modeling of Rectangular Line L µ 0 µ r t m 2 l w l = line length w = line width t m = m agnetic film thickness µ r = relative dc perm eability 1/L w 1/l L sheet 1/L shunt W tot Eqn. from V. Korenivski and R. B. van Dover, JAP, v. 82 (10), 1997

28 Magnetic Via Widths I nductance increases w ith via w idth, but the change becom es dim inishingly sm all.

29 Sheet and Shunt Inductances Sheet inductance is independent of the magnetic via width. Shunt inductance increases with increasing via width.

30 Current Density At 100 MHz J( A/ m 2 ) Unlam inated Cobalt alloy 1E+ 9 9E+ 8 8E+ 8 7E+ 9 6E+ 8 5E+ 8 4E+ 9 3E+ 8 2E+ 8 1E+ 8 0E+ 0 Lam inated Cobalt alloy Eddy currents are reduced by lam inations.

31 Analytical Modeling of Q-Factor Thinner films give higher Q-factors, but lower inductance.

32 Analytical Modeling of Q-Factor Laminations increase the Q-factor.

33 Quality Factor of Inductors With Laminated Magnetic Films Peak quality factor is increased, But quality factor at lower frequencies decreased.

34 Summary DC Voltage Converters High-frequency buck converters High inductance density needed Low DC resistance important Magnetic materials Complex permeability (real and imaginary) Low hysteretic losses CMOS compatibility (thermal, process compatibility) Inductors with magnetic material Single films increase inductance by 30% up to 9.8 GHz Magnetic vias Sheet inductance vs. shunt inductance 2 magnetic films increase inductance Over 30 compared to air-core 200 nh inductors possible (1,700 nh/mm 2 )

35 For More Information IEEE Trans. Magnetics, 45, pp. 4760, Journal of Applied Physics, 103, pp. 07E927, Apr. 1, IEEE Trans. Magnetics, 43, pp. 2615, IEEE PESC 2004 and IEEE VLSI Symp APEC, Paper #SP1.4.2, p. 75, Intl. Electron Devices Meeting (IEDM), pp , IEEE Intl. Interconnect Technology Conference, pp , 2001.

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