Study and Implementation of space vector modulation (SVM) for direct matrix converter

Transcription

1 The 2 nd International Conference on Power Electronics and their Applications (ICPEA 215), Djelfa on 29-3 March 215, Algeria Study and Implementation of space vector modulation (SVM) for direct matrix converter A.BENACHOUR, Pr M.O.MAHMOUDI and Pr E.BERKOUK Department of electrical engineering ENP (LRE) Department of automatic ENP (LCP) Department of automatic ENP (LCP) Keywords matrix converter, svm, implementation, Dspace 114, MC. Abstract This work is a study, analysis and implementation of the space vector modulation for three to three phase matrix converter. The input factor is fixed to zero an over modulation is presented, the algorithm is implemented on dspace 114 with real voltage sensors, an acquisition of the results using control desk is presented and finally some experimental results are presented. I. Introduction A MATRIX CONVERTER (MC) Fig.1 is an AC-AC converter, consists of an array of bidirectional switches, which are used to directly connect the power supply to the load without using any dc-link or large energy storage elements [1]. The absence of large energy storage elements in the dc bus such as the bulky and limited lifetime electrolytic capacitor is their major advantage over conventional rectifier inverter-based systems that allows size and weight reduction of the converter and increasing its reliability as well [1], [2], [3]. The Mc also provide the generation of load voltage with arbitrary amplitude and frequency, sinusoidal input and output currents, regeneration and unity power factor capability [1],[3],[11]. The intensive research on MCs starts with the work of Venturini and Alesina in 198 in [4] and [5] and in the late 198s and early 199s space vector modulation schemes were also introduced by several authors [1],[6]. The space vector modulation of matrix converter allows to obtain the full theoretical input-output voltage transfer ratio, sinusoidal input current and output voltage waveforms and to control the converter input power factor [1],[ 6]. In [3] a review of MC research is proposed and in [1] the modulation strategies are reviewed. A lot of research papers are published on the subject of improvement of the input and output current quality, the power factor [6] and also the adaptation under non ideal supply voltage condition or nonideal output conditions [7] [8]. II. SVM Control Algorithm For MC The Svm principle is proposed first to control the inverters, in 1989 L. Huber and D. Borojević [6] published the first paper in which the principle of space vector modulation is extended to the matrix converter. This control method is based on space vector representation of the input and output voltages and currents. It allows the control of input power factor [6], [9]. ICPEA 215 Paper ID 29 URL:

2 The 2 nd International Conference on Power Electronics and their Applications (ICPEA 215), Djelfa on 29-3 March 215, Algeria Fig. 1:3 3 matrix converter. II.1 Representation of the input and output vectors The input and the output voltage and current of MC used in SVM are represented in (alpha-beta) plan as presented below: The output reference voltage The output current The input voltage vector (1) (2) The input current vector (3) Each interrupter is modeled using connection functions presented below: (4) II.2 Possible configuration of MC The space vectors can be defined for any switching configuration of the matrix converter but not all the possible configurations could be used [9], [1], [11], because two rules must be respected : The input phases should never be shorted. The output current should never be interrupted, From these rules, 27 possible configurations presented in the table 1 can be used. In SVM the rotate vectors are not used because it is difficult to control their phase angle. So only, the active and the zero vectors can be used. The input current and the output voltage for each possible configuration are represented in Fig.2. (5) ICPEA 215 Paper ID 29 URL:

3 The 2 nd International Conference on Power Electronics and their Applications (ICPEA 215), Djelfa on 29-3 March 215, Algeria Configuration State RSS +1 active SRR -1 active STT +2 active TSS -2 active TRR +3 active RTT -3 active SRS +4 active RSR -4 active TST +5 active STS -5 active RTR +6 active TRT -6 active SSR +7 active RRS -7 active TTS +8 active SST -8 active RRT +9 active TTR -9 active Table I: MC possible vectors RRR O1 zero - - SSS O2 zero - - TTT O3 zero - - RST --- rotate Vi Is RTS --- rotate Vi - +π/3 Is - SRT --- rotate Vi - -π Is - +2π/3 STR --- rotate Vi +4π/3 Is +2π/3 TRS --- rotate Vi +2π/3 Is +4π/3 TSR --- rotate Vi - -π/3 Is - +4π/33. Fig. 2: Output voltage vectors, Input current vectors ICPEA 215 Paper ID 29 URL:

4 The 2 nd International Conference on Power Electronics and their Applications (ICPEA 215), Djelfa on 29-3 March 215, Algeria II.3 SVM principle In principle, the SVM algorithm is based on the selection of four active configurations, which are applied for suitable time widths within each switching period Ts. Then a zero configuration is applied to complete Ts [6], [9], [1]. The choice of these configurations is determined by the position of the output voltage reference vector, the input current reference vector, in order to synthesize the output voltage 6 configurations can be used, and in the same time to control, the input displacement angle 6 configurations can be used. Four of them are in common which are the suitable configurations to both control the output voltage and the input displacement angle [6], [9], [1]. II.4 Calculation of the on-time ratios At every moment, the reference vectors (Vs and I E ) are decomposed into their components, Vs, Vs and I E, I E, on the directions of adjacent vectors [9] these components are defined by Eq. (6) and as shown in Fig. 3. (6) Where δ1, 2, 3, 4 are the on time ratios and A 1, A2, B1, B2 are the active vectors Fig. 3: Decomposition of ; output reference voltage; Input current- reference vector To maintain the input current vector with the input reference an habitual choice usually done in vector modulations is to make the two vectors and collinear with I E [9],[1]. So the result vector will be collinear with I E. This is defined by the relationship Eq. (6) So after projection and using the Eq. (7) the on-time ratios are defined in Eq.(8). (7) (8) For the feasibility of the control algorithm, the sum of the four on-time ratios must be lower than or equal to unity. A zero configuration is applied to complete the sampling period. If δ < in the over modulation case which can be used in DTC-SVM control for example two solutions are presented. ICPEA 215 Paper ID 29 URL:

5 output line to neutral voltage(v) The 2 nd International Conference on Power Electronics and their Applications (ICPEA 215), Djelfa on 29-3 March 215, Algeria The first solution consists of not use the zero configuration vectors and to normalize the time ratios as presented in Eq. (9) (9) The second solution is like the first one but without changing the ratios so zero vector is cancelled and the active vectors are applied until reaching Ts. Both solution are simulated and presented in section III. II.5 Switching configuration In this step we apply the control algorithm to the matrix converter. There are many methods to apply SVM during the switching period; the most used is: the one commutation sequence in which commutation losses are minimized by using one commutation in every step. The one which uses three zero configurations called synchronous SVM and there is another method called asynchronous SVM uses one zero configuration in each TS and other called double sense is often used, it is similar to asynchronous SVM but we use the active vectors in two senses [1],[11],[12]. III. Simulation results A 3 3 direct matrix converter is simulated using double sense SVM modulation. For the over modulation both solutions presented above are used. Selected signal: 5 cycles. FFT window (in red): 8 cycles The input filter is not considered so the matrix converter is supplied directly with perfect three 2 sinusoidal voltages. Some results are presented here for a switching frequency of fs=1khz.vinmax=43v Fundamental (5Hz) = 155.2, THD= % Selected signal: 5 cycles. FFT window (in red): 15 cycles Fundamental (5Hz) = 41.26, THD= 47.63% (c) (d) ICPEA 215 Paper ID 29 URL:

6 SVM output ratio THD(%) output line to neutral voltage output line to neutral voltage(v) The 2 nd 2 International Conference on Power Electronics and their Applications (ICPEA 215), Djelfa on 29-3 March 215, -2 Algeria 4 Selected signal: 5 cycles. FFT window (in red): 15 cycles Fundamental (5Hz) = 41.28, THD= 47.35% FFT window: 1 of Harmonic cycles order of selected signal (e) (f) Fundamental (25Hz) = 2.13, THD= 122.5% (h) (g) fr=25 Hz fr=5 Hz fr=75 Hz theorical fr=25 Hz fr=5 Hz fr=75 Hz reference ratio (i) reference ratio (j) Fig. 4: SVM simulation results ; (a,b) Output voltage and its harmonic spectrum for r=.5 fr=5hz ;(c,d) r=1 fr=5hz second over modulation solution; (e,f) r=1 fr=5hz first over modulation solution (g,h) r=.5 fr=25hz; (i) Adjustment output voltage curve for (fr=25,5,75 Hz); (j) Output voltage THD curve(fr=25,5,75 Hz). When analyzing the output voltage harmonic spectrum Fig.4. (b,d,f,h) we can see that the maximum harmonic rays are in neighborhood of the switching frequencies (m x fs); in the simulation fs=1 khz. In over modulation and with both proposed solutions Fig.4.(c,d) and Fig.4.(e,f) we can see that the fundamental of the output can reach.95 of the input voltage but with the cost of some low frequency harmonics rise, there is a little difference between them on some low frequency harmonic rays. When analyzing the voltage adjusting curve Fig.4.i we can point that it is linear and follows the ideal curve until r=.87 after it becomes curved until reaching the intrinsic limit. For the reference frequency > 5 Hz we can see that there is a small difference due to the harmonic. In the THD curve which is defined in Eq. (1) and presented in Fig.4.j we can point that it is important especially when r is small and this is one of the drawbacks of matrix converter. (1) For fr >5 the THD is slightly important in regard with fr <=5Hz.The shape of the output voltage is near sinusoidal. ICPEA 215 Paper ID 29 URL:

7 svm output ratio svm output voltage THD(%) control sigmals for 1st cell control signals for 1st cell output line to neutral voltage(v) output line to neutral voltage (V) The 2 nd International Conference on Power Electronics and their Applications (ICPEA 215), Djelfa on 29-3 March 215, Algeria IV. Implementation of SVM on Dspace 114 The input voltages are entered to the dspace by its ADC inputs after conditioning using the voltage sensors LV 25p from LEM. Selected signal: 15 cycles. FFT window (in red): 12 cycles 4 The output voltage and the control signals are captured 2 using dspace Control desk program and also viewed using oscilloscope Here we present some implementation results for fs=1 khz, Vmax=43V Fundamental (5Hz) = 4.8, THD= 5.33% Selected signal: 7.5 cycles. FFT window (in red): 6 cycles Fundamental (25Hz) = 2.48, THD= % (c) (d) (e) (f) Hz 5Hz 75Hz theoric Hz 5Hz 75Hz input ratio input ratio (g) (h) Fig. 5: SVM implementation results ;(a,b) Output voltage and its harmonic spectrum for r=1 f=5hz ; (c,d) r=.48 f=25hz, (e,f) One cellule control signals for the two case; (g) Adjustment curve for (fr=25, 5,75 Hz), (h) THD curve(fr =25,5,75 Hz). The implementation was successful and the control signals were good and complimentary Fig.5.e and Fig.5.f. If these three signals will add together we will have at any time the sum is 1 so we respect one of the function conditions of matrix converter. ICPEA 215 Paper ID 29 URL:

8 The 2 nd International Conference on Power Electronics and their Applications (ICPEA 215), Djelfa on 29-3 March 215, Algeria If we compare these results and the simulation results especially for the fundamental and the THD of the output voltages we can conclude that they are very close the small difference is due to the distortion of the input voltage in the implementation which has not been taken into account in simulation. When analyzing the experimental adjustment curve Fig.5.g we can conclude that the implementation was successful and it is similar to the adjustment curve in simulation with very low error due to the distortion of the input voltages and to measure errors. The output THD is very high Fig. 5.h so the input filter is recommended to limit the effects of the harmonics on the grid and to ensure good input voltage quality. The expirimental control signals and the real output MC voltage are viewed using oscilloscope Fig.6. The limit of the output voltage in the implementation was less than the simulation (.95 simulation.92 implementation) because in simulation we supposed that the input voltages and reference voltages are synchronized. (c) (d) Fig. 6: Experimental results ; Output ds114 control signal viewed by oscilloscope,( b) output line to grid neutral voltage m=1 fr=5hz, (c) control desk window, (d) MC experimental prototype. V. Conclusion A space vector modulation for direct matrix converter is presented, simulated and implemented on the dspace 114 card using real input voltages and an over modulation is tested. The implementation was successful and very close to the simulation. Some experimental results are presented. The matrix converter is controllable until r=.87 the intrinsic limit. The input filter is necessary to protect the grid from harmonics and to insure good input voltages. References [1] Rodriguez, J., Rivera, et al :A review of control and modulation methods for matrix converters. IEEE Transactions on Industrial Electronics,, 212, vol. 59, no 1, p [2] Hamouda, M., Blanchette, H. F., Al-Haddad, K., & Fnaiech, F.:An efficient DSP-FPGA-based real-time implementation method of SVM algorithms for an indirect matrix converter. IEEE Transactions on Industrial Electronics,, 211, vol, 58, no11, p [3] Friedli, T., & Kolar, J. W.:Milestones in matrix converter research. IEEJ Journal of Industry Applications, 212, vol. 1, no 1, p [4] Venturini, M. :A new sine wave in, sine wave out conversion technique eliminates reactive elements. Proc. POWERCON, 198, 198, vol. 7, p. E3: 1-E3: 15. [5] Alesina, A., & Venturini, M.: Analysis and design of optimum-amplitude nine-switch direct AC-AC converters. Power Electronics, IEEE Transactions on, 1989, vol. 4, no 1, p [6] Huber, L., & Borojevic, D. :Space vector modulator for forced commutated cycloconverters. In : Industry Applications Society Annual Meeting, 1989., Conference Record of the 1989 IEEE. IEEE, p ICPEA 215 Paper ID 29 URL:

9 The 2 nd International Conference on Power Electronics and their Applications (ICPEA 215), Djelfa on 29-3 March 215, Algeria [7] Blaabjerg, F., Casadei, et al. : Comparison of two current modulation strategies for matrix converters under unbalanced input voltage conditions. Industrial Electronics, IEEE Transactions on, 22, vol. 49, no 2, p [8] Wang, X., Lin, H., She, H., et al.: A research on space vector modulation strategy for matrix converter under abnormal input-voltage conditions. Industrial Electronics, IEEE Transactions on, 212, vol. 59, no 1, p [9] Matteini M.: control techniques for matrix converter adjustablespeed drives, PhD these in electrical Engineering University de Bolgna (25). [1] Gruson F. :Modulation naturelle généralisée des convertisseurs matriciels pour la variation de vitesse, Diss. Ecole Centrale de Lille, 21. [11] ABROUS A. : Modelisation, commande et realisation d'un convertisseur matricielle, magister these LCP,ENP 28. [12] GHEDAMSI K. : Contribution a la modelisation et la commande d'un convertisseur direct de frequence Application a la conduite de la machine asynchrone, doctorat these LCP,ENP 28. ICPEA 215 Paper ID 29 URL: