High Efficiency Thyristor

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1 High Efficiency hyristor M 5.5 hree Quadrants operation: Q - Q ~ riac Part number Marking on Product: hree Quadrants Operation Positive Half ycle + ackside: anode/cathode (-) G (+) G G - EF Q Q Q Q EF + G (-) G EF - Negative Half ycle Note: ll Polarities are referenced to Features / dvantages: pplications: Package: O-26 (2Pak-H) riac for line frequency hree Quadrants Operation - Q - Q Planar passivated chip Long-term stability of blocking currents and voltages Line rectifying 5/6 Hz Softstart motor control Motor control Power converter power control Lighting and temperature control ndustry standard outline ohs compliant Epoxy meets UL 9- High creepage distance between terminals isclaimer Notice nformation furnished is believed to be accurate and reliable. However, users should independently evaluate the suitability of and test each product selected for their own applications. Littelfuse products are not designed for, and may not be used in, all applications. ead complete isclaimer Notice at 29 XYS all rights reserved ata according to E 677and per semiconductor unless otherwise specified 2922c

2 ectifier Symbol efinition onditions 25 J 25 atings max. forward voltage drop SM/SM M/M MS J 25 J threshold voltage J 5.89 for power loss calculation only r slope resistance mω thermal resistance junction to case.95 K/ thj P tot total power dissipation 25 P GM P G J J 25 SM max. forward surge current t ms; (5 Hz), sine J 5 t 8, ms; (6 Hz), sine J junction capacitance f MHz 25 9 max. gate power dissipation t P µs 5 5 average gate power dissipation t ms; (5 Hz), sine t 8, ms; (6 Hz), sine J min t µs P J 5 ²t value for fusing t ms; (5 Hz), sine 5 (di/dt) cr average forward current MS forward current per phase critical rate of rise of current 8 sine t 8, ms; (6 Hz), sine t ms; (5 Hz), sine t 8, ms; (6 Hz), sine J 5 5 J J 5.2 Unit J pf J 5 ; f 5 Hz t P 2 µs; di G /dt. /µs; G.; ⅔ repetitive, (dv/dt) critical rate of rise of voltage ⅔ M J 5 cr max. non-repetitive reverse/forward blocking voltage max. repetitive reverse/forward blocking voltage reverse current, drain current thh thermal resistance case to heatsink.25 K/ GK ; method (linear voltage rise) G gate trigger voltage 6 25 M J 5 J µ m ²s ²s ²s ²s /µs /µs /µs. G gate trigger current 6 J 25 ± m J -.6 ± 6 m G gate non-trigger voltage ⅔ J.2 M 5 G gate non-trigger current ± m L latching current t p µs J 25 7 m G.; di G /dt. /µs H holding current 6 GK J 25 5 m t gd gate controlled delay time ½ J 25 2 µs M G. ; di G /dt. /µs non-repet., t q turn-off time ; 5 ; ⅔ M J 25 5 µs di/dt /µs dv/dt 2 /µs t p 2 µs 5 29 XYS all rights reserved ata according to E 677and per semiconductor unless otherwise specified 2922c

3 Package atings Symbol efinition onditions min. max. Unit MS MS current per terminal 5 J virtual junction temperature - 5 op operation temperature - 25 eight F dspp/pp dspb/pb O-26 (2Pak-H) stg storage temperature - 5 mounting force with clip 2 creepage distance on surface striking distance through air terminal to terminal terminal to backside g N mm mm Part No. Logo ssembly Line ate ode ssembly ode Product Marking XXXXXXXXX XYS Zyyww Part description L M 2 N PZ hyristor (S) High Efficiency hyristor (up to 2) urrent ating [] ~ riac everse oltage [] hree Quadrants operation: Q - Q O-26 (2Pak) (2H) Ordering Standard lternative Ordering Number Marking on Product elivery Mode Quantity ode No. -L ape & eel U ube Similar Part Package oltage class LM2NP O-22 () 2 Equivalent ircuits for Simulation * on die level 5 hyristor J max threshold voltage.89 max slope resistance * 27 mω 29 XYS all rights reserved ata according to E 677and per semiconductor unless otherwise specified 2922c

4 Outlines O-26 (2Pak-H) E e 2x e L c2 L.92 (.) 2 c mm (nches) H 2x b2 E Supplier Option 2 2x b im. Millimeter nches min max min max b b c c E E e e 2,5 S.28, S.69 H L L ll dimensions conform with and/or within JEE standard..8 (.5).78 (.7).5 (.2) 9.2 (.55) 2.5 (.) ecommended min. foot print 29 XYS all rights reserved ata according to E 677and per semiconductor unless otherwise specified 2922c

5 hyristor 5 J 5 5 Hz, 8% M J 25 2 [] 2 SM [] J 5 2 t [ 2 s] J 5 J 25 8 J 25 J [] 6.. t [s] t [ms] Fig. Forward characteristics Fig. 2 Surge overload current Fig. 2 t versus time (- ms) G [] G : J 25 2 G : J 25 G : J 25 G : J G : J - t gd [µs] Limit J 25 ()M 2 [] dc G [m] Fig. Gate trigger characteristics G [m] Fig. 5 Gate controlled delay time [ ] Fig. 6 Max. forward current at case temperature 25 2 P () 5 [] 5 dc () [] 5 5 amb [ ] thh Z thj.6 [K/]. thi [K/] t i [s] t [ms] Fig. 7a Power dissipation versus direct output current Fig. 7b and ambient temperature Fig. 8 ransient thermal impedance 29 XYS all rights reserved ata according to E 677and per semiconductor unless otherwise specified 2922c

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