A1266. Micropower Ultrasensitive 3D Hall-Effect Switch PACKAGES:

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Tobias Wilkinson
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Solid-state reliability Choice of output format Separate X, Y, and Z outputs Combined (X+Y+Z) output Tiny SOT-3 packages PACKAGES: -Pin SOT3-W 3-Pin SOT3-W ESCRIPTION The integrated circuit is an

1 FEATURES AN BENEFITS True 3 sensing Omnipolar operation with either north or south pole. to. operation Low supply current High sensitivity, B OP typically G Chopper-stabilized offset cancellation Superior temperature stability Extremely low switchpoint drift Insensitive to physical stress Solid-state reliability Choice of output format Separate X, Y, and Z outputs Combined (X+Y+Z) output Tiny SOT-3 packages PACKAGES: -Pin SOT3-W 3-Pin SOT3-W ESCRIPTION The integrated circuit is an ultrasensitive Hall-effect switch with 3 omnipolar magnetic actuation. The single silicon chip includes: three Hall plates, multiplexer, smallsignal amplifier, chopper stabilization, Schmitt trigger, and NMOS output transistors. The device outputs turn on when a magnetic field of sufficient strength is applied to the sensor in any orientation. Removal of the magnetic field will turn the output off. Two versions of the offer a choice of output format: separate X, Y, and Z outputs, or a combined X+Y+Z output. The low operating supply voltage,. to., and unique clocking algorithm assist in reducing the average power consumption, making it ideal for battery operation (e.g., the power consumption is less than μw with a supply). The small geometries of the BiCMOS process allow for ultrasmall packages suitable for even space-constrained applications. In this case, a modified SOT3-W surface-mount package is available in a 3-pin (combined output) or a -pin (separate outputs) configuration, magnetically optimized for use in a variety of orientations. The packages are lead (Pb) free and RoHS-compliant, with 1% matte-tin leadframe plating. Not to scale To All Subcircuits OUTX (OUT) X Hall YHall Z Hall ynamic Offset Cancellation Hall Amp. Low-Pass Filter Sample, Hold & Averaging emultiplexer Output Logic OUTY (n/a) OUTZ (n/a) Note for Pin esignations: Triple-Output (Single Output) Options GN Functional Block iagram -S, Rev. MCO-13 January 3, 19

2 SELECTION GUIE SPECIFICATIONS Part Number Packing Package escription ELHLT-T 7-in. reel, 3 pieces/reel -pin SOT3-W 3 Outputs of X, Y, and Z ELHLX-T 13-in. reel, 1 pieces/reel -pin SOT3-W 3 Outputs of X, Y, and Z ELHLT-SO3-T 7-in. reel, 3 pieces/reel 3-pin SOT3-W Single Output of OR (X, Y, and Z) ELHLX-SO3-T 13-in. reel, 1 pieces/reel 3-pin SOT3-W Single Output of OR (X, Y, and Z) ELHLT-SO-T* 7-in. reel, 3 pieces/reel -pin SOT3-W Single Output of OR (X, Y, and Z) ELHLX-SO-T* 13-in. reel, 1 pieces/reel -pin SOT3-W Single Output of OR (X, Y, and Z) RoHS COMPLIANT * These parts are in production but have been determined to be NOT FOR NEW ESIGN.This classification indicates that sale of this device is currently restricted to existing customer applications. Samples are no longer available. ABSOLUTE MAXIMUM RATINGS Characteristic Symbol Notes Rating Unit Forward Supply oltage. Reverse Supply oltage R.3 Magnetic Flux ensity B Unlimited G Output Off oltage OUT. Reverse Output oltage ROUT.3 Continuous Output Current I OUT 3 ma Reverse Output Current I ROUT 3 ma Operating Ambient Temperature T A Range E to 8 C Maximum Junction Temperature T J(MAX) 16 C Storage Temperature T stg 6 to 17 C

3 X PINOUT IAGRAMS AN TERMINAL LIST TABLE 1 OUTZ 1 NC 1 GN GN 3 GN OUTX 3 OUTY OUT 3 NC OUT ELHLT-T, ELHLX-T Pinouts ELHLT-SO-T, ELHLX-SO-T Pinouts ELHLT-SO3-T, ELHLX-SO3-T Pinouts Terminal List Table Pin Number ELHLT-T, ELHLX-T ELHLT-SO-T, ELHLH-SO-T ELHLT-SO3-T, ELHLX-SO3-T Symbol escription Symbol escription Symbol escription 1 Power Supply Power Supply Power Supply OUTX Output of X magnetic field direction OUT X+Y+Z Output OUT X+Y+Z output 3 OUTY Output of Y magnetic field direction NC No connection GN Ground GN Ground GN Ground OUTZ Output of Z magnetic field direction NC No connection 1 Y Z 3

4 THERMAL CHARACTERISTICS power consumption is extremely low. On-chip power dissipation will not be an issue under normal operating conditions. Characteristic Symbol Notes Rating Unit Package Thermal Resistance R θja each side connected by thermal vias Package LH-3, -layer PCB with.63 in. of copper area, 11 C/W Package LH-, -layer board based on the JEEC standard. 1 C/W Power issipation, P (mw ) Layer PCB, Package LH-3 (R θja = 11ºC/W) -Layer PCB, Package LH- (R θja = 1ºC/W) Temperature (ºC) Maximum Power issipation versus Ambient Temperature

5 X ELECTRICAL CHARACTERISTICS: alid over =. to and full operating temperature range, unless otherwise specified Characteristics Symbol Test Conditions Min. Typ. [1] Max. Unit Supply oltage Operating, T J < 16 C.. Output Leakage Current I OUTOFF B < B RP 1 µa Output On oltage OUT(SAT) I OUT = ma, B > B OP m Awake Time t awake 3 µs Mode Cycle Period t period 16 ms Chopping Frequency f C 8 khz Supply Current I (EN) Chip Awake (Enabled) 3.6 ma I (IS) Chip Asleep (isabled), =., T A = C 1 µa I (AG) =., T A = C µa =, T A = C 9. µa MAGNETIC CHARACTERISTICS: alid over =. to and full operating temperature range, unless otherwise specified Characteristics Symbol Test Conditions Min. Typ. Max. Unit [] B OPS South pole to left, bottom, or branded face side (see Figure 1) G Operate Point [3] B OPN North pole to left, bottom, or branded face side (see Figure 1) G B RPS South pole to left, bottom, or branded face side (see Figure 1) 17. G Release Point [3] B RPN North pole to left, bottom, or branded face side (see Figure 1) 17. G Hysteresis [3] B HYS B OPS B RPS, B OPN B RPN 7. G N S N S S N Y Z Figure 1: Three imensions of Magnet Orientation. Applied field may be either north or south polarity. [1] Typical data are at T A = C and = (unless otherwise noted). [] 1 G (gauss) =.1 mt (millitesla) [3] Applicable to all directions (X, Y, and Z)

6 CHARACTERISTIC ATA 3 3 I (AG) (µa) T (ºC) A - 8 I (AG) (µa) () () Average Supply Current vs. Supply oltage Average Supply Current vs. Ambient Temperature OUT(SAT) (m) Average Low Output oltage vs. Supply oltage () T (ºC) A X Output - 8 Y and Z - 8 OUT(SAT) (m) () X Output. Y and Z Average Low Output oltage vs. Ambient Temperature I OUT = ma 3 3 t PERIO (ms) t PERIO (ms) 1 1 () () Average Period vs. Supply oltage Average Period vs. Ambient Temperature 6

7 B OP (G) T(ºC) A 3 B OPS () 8 B OPN - 8 B OP (G) () B OPS. B OPN. Average X-Axis Operate Point vs. Supply oltage Average X-Axis Operate Point vs. Ambient Temperature B OP (G) B OPS - 8 B OPN - B OP (G) () B OPS. B OPN () Average Y-Axis Operate Point vs. Supply oltage Average Y-Axis Operate Point vs. Ambient Temperature B OP (G) B OPS - 8 B OPN - B OP (G) () B OPS. B OPN () Average Z-Axis Operate Point vs. Supply oltage Average Z-Axis Operate Point vs. Ambient Temperature 7

8 B RP (G) B RPS - 8 B RPN - B RP (G) () B RPS. B RPN () Average X-Axis Release Point vs. Supply oltage Average X-Axis Release Point vs. Ambient Temperature B RP (G) B RPS - 8 B RPN - B RP (G) () B RPS. B RPN () Average Y-Axis Release Point vs. Supply oltage Average Y-Axis Release Point vs. Ambient Temperature B RP (G) B RPS - 8 B RPN - B RP (G) () B RPS. B RPN () Average Z-Axis Release Point vs. Supply oltage Average Z-Axis Release Point vs. Ambient Temperature 8

9 B HYS (G) () B HYS(S) - 8 B HYS(N) - 8 B HYS (G) () B HYS(S). B HYS(N). Average X-Axis Hysteresis vs. Supply oltage Average X-Axis Hysteresis vs. Ambient Temperature B HYS (G) () B HYS(S) - 8 B HYS(N) - 8 B HYS (G) () B HYS(S). B HYS(N). Average Y-Axis Hysteresis vs. Supply oltage Average Y-Axis Hysteresis vs. Ambient Temperature B HYS (G) () B HYS(S) - 8 B HYS(N) - 8 B HYS (G) () B HYS(S). B HYS(N). Average Z-Axis Hysteresis vs. Supply oltage Average Z-Axis Hysteresis vs. Ambient Temperature 9

10 FUNCTIONAL ESCRIPTION evice Power-On t awake X Axis Sleep t awake Y Axis t = 3 µs [t (X) + t (Y) + t (Z)] awake awake awake awake t = 16 ms (t + 3 t ) period awake sleep t sleep = (t period t awake )/3 t sleep =.9 ms Sleep t awake Z Axis Sleep t period I (EN) Awake Sleep I (IS) Latch Output Latch Output Latch Output Latch Output Sample X Sample Y Sample Z Sample X Figure : evice Sleep and Awake Mode Cycle Low Average Power To keep average power low, internal timing circuitry activates the sensor of each axis for 1 µs (followed by a low power sleep time, t sleep, of.9 ms). This awake and sleep cycle occurs three times for each t period, such that all three axes are sampled in t period. The short awake time allows for stabilization prior to the sensor sampling and data latching at the end of each t awake cycle. The outputs during each t sleep cycle are latched in the last sampled state. The supply current is not affected by the output states. Operation For the single output option of the, the output switches low (turns on) when a magnetic field perpendicular to one of the three Hall sensors, either the X, Y, or Z direction, exceeds the operate point, B OPS (or is less than B OPN ). The triple output option is configured with three separate outputs (X, Y, or Z), which switch low (turns on) when a magnetic field perpendicular to the corresponding Hall sensor (X, Y, or Z) exceeds the operate point, B OPS (or is less than B OPN ). When the magnetic field is reduced below the release point, B RPS (or increased above B RPN ), the device output switches high (turns off). The difference in the magnetic operate and release points is the hysteresis, B HYS, of the device. This built-in hysteresis allows clean switching of the output even in the presence of external mechanical vibration and electrical noise. After turn-on, the output voltage is OUT. Powering-on the device in the hysteresis region, between B OP and B RP, allows an indeterminate output state. The correct state is attained after the first excursion beyond B OP or B RP. 1

11 OUT + Switch to Low B B+ BOPN B HYS Switch to High B RPN Switch to High B RPS B HYS Switch to Low OUT(HIGH) OUT(SAT) Figure 3: Switching Behavior of Omnipolar Switches On the horizontal axis, the B+ direction indicates increasing south polarity magnetic field strength, and the B direction indicates decreasing south polarity field strength (including the case of increasing north polarity) BOPS Applications It is strongly recommended that an external capacitor is connected (in close proximity to the Hall sensor IC) between the supply and ground of the device to reduce both external noise and noise generated by the chopper-stabilization technique. As shown in Figure, a.1 µf capacitor is typical. Extensive applications information on magnets and Hall-effect sensors is available in: Hall-Effect IC Applications Guide, AN771, Hall-Effect evices: Guidelines for esigning Subassemblies Using Hall-Effect evices AN773.1 Soldering Methods for Allegro s Products SM and Through-Hole, AN69 All are provided on the Allegro website: 11

12 Typical Application Circuits ELHLT-SO3-T, ELHLX-SO3-T, ELHLT-SO-T, AN ELHLX-SO-T For sensors configured with the single output option, one pin reports the output state from any of the three Hall elements. S C BYP.1 µf OUT R LOA Sensor Output GN GN Figure : Typical Application Circuit for the Single Output Selection ELHLT-T AN ELHLX-T For sensors configured with the triple output option, the three separate open drain outputs report the output state from the corresponding Hall elements. S R LOA R LOA R LOA C BYP.1 µf OUTX OUTY OUTZ GN Sensor Outputs GN Figure : Typical Application Circuit for the Triple Output Selection 1

13 Chopper Stabilization A limiting factor for switchpoint accuracy when using Hall-effect technology is the small signal voltage developed across the Hall plate. This voltage is proportionally small relative to the offset that can be produced at the output of the Hall sensor. This makes it difficult to process the signal and maintain an accurate, reliable output over the specified temperature and voltage range. Chopper stabilization is a proven approach used to minimize Hall offset. The Allegro technique, dynamic quadrature offset cancellation, removes key sources of the output drift induced by temperature and package stress. This offset reduction technique is based on a signal modulation-demodulation process. Figure 6 illustrates how it is implemented. The undesired offset signal is separated from the magnetically induced signal in the frequency domain through modulation. The subsequent demodulation acts as a modulation process for the offset, causing the magnetically induced signal to recover its original spectrum at baseband while the C offset becomes a highfrequency signal. Then, using a low-pass filter, the signal passes while the modulated C offset is suppressed. Allegro s innovative chopper-stabilization technique uses a high-frequency clock. The high-frequency operation allows a greater sampling rate that produces higher accuracy, reduced jitter, and faster signal processing. Additionally, filtering is more effective and results in a lower noise analog signal at the sensor output. evices such as the that use this approach have an extremely stable quiescent Hall output voltage, are immune to thermal stress, and have precise recoverability after temperature cycling. This technique is made possible through the use of a BiCMOS process, which allows the use of low-offset, low-noise amplifiers in combination with high-density logic and sample-and-hold circuits. Multiplexer Amp. Low-Pass Filter Sample, Hold & Averaging Figure 6: Model of Chopper-Stabilization Circuit (ynamic Offset Cancellation) 13

14 PACKAGE OUTLINE RAWINGS For Reference Only Not for Tooling Use (Reference WG-969) imensions in millimeters NOT TO SCALE imensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Y.11 REF A X E1 A Z ± E E E3 E 8X 1 REF 1.17 REF E3. REF Branded Face E3. BSC. MIN SEATING PLANE GAUGE PLANE 1. ±.13 E.9 BSC ±.1 E1. MIN NNN C Standard Branding Reference iew NNN = Last three digits of device part number. 1. B.7.9 PCB Reference Layout iew A X B C Active Area epth, X Axis, 1.9 ±. A Y Active Area epth, Y Axis, 1. ±.1 A Z Active Area epth, Z Axis,.8 ±. Reference land pattern layout; all pads a minimum of. mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances Branding Scale and appearance at supplier discretion Hall Elements (E1, E, and E3), not to scale Figure 7: Package LH, -Pin SOT3-W 1

15 For Reference Only Not for Tooling Use (Reference WG-8) imensions in millimeters NOT TO SCALE imensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Y.11 REF AX E1 A Z ± E E E3 E 8X 1 REF 1.17 REF E3. REF Branded Face E3. BSC. MIN SEATING PLANE GAUGE PLANE 1. ±.13 E.9 BSC ±.1 E1 NNN C Standard Branding Reference iew. NNN = Last three digits of device part number A X Active Area epth, X Axis, 1.9 ±. 1. A Y Active Area epth, Y Axis, 1. ±.1 A Z Active Area epth, Z Axis,.8 ±. B.7.9 PCB Reference Layout iew B C Reference land pattern layout; all pads a minimum of. mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances Branding Scale and appearance at supplier discretion Hall Elements (E1, E, and E3), not to scale Figure 8: Package LH, 3-Pin SOT3-W 1

16 Revision History Number ate escription March, 1 Initial Release 1 May, 1 Revised I (EN) value and Figure 1 September, 1 Added 3-pin SOT3-W package option and included explicit Active Area epth for 3 sensor in both package drawings; revised I (AG) values and Figure 1; revised pin labels in Functional Block iagram 3 January 9, 17 Updated product offering (pages, 3, 1) April 1, 17 Updated package drawings (pages 1-1) January 3, 19 Minor editorial updates Copyright 19, reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro s product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. Copies of this document are considered uncontrolled documents. For the latest version of this document, visit our website: 16

A1266. Micropower Ultrasensitive 3D Hall-Effect Switch PACKAGES:

A1266. Micropower Ultrasensitive 3D Hall-Effect Switch PACKAGES: Micropower Ultrasensitive 3 Hall-Effect Switch FEATURES AN BENEFITS True 3 sensing Omnipolar operation with either north or south pole. to. operation Low supply current High sensitivity, B OP typically