D-Σ Digital Control for Improving Stability Margin under High Line Impedance

Transcription

1 D-Σ Digital Control for Improving Stability Margin under High Line Impedance Tsai-Fu Wu Professor, National Tsing Hua University, Taiwan Elegant Power Electronics Applied Research Laboratory (EPEARL) Aug. 26, 2015 Elegant Power Electronics Applied Research Laboratory (EPEARL)

2 Outline #Introduction #D-Σ Digital Control #Filter-Capacitor Current Compensation #Stability Analysis #Experimental Results #Conclusions Elegant Power Electronics Applied Research Laboratory (EPEARL) 1

3 # Introduction Harmonized AC and DC Microgrid MPPT DC Products Fuel Cell Battery Booster Charger/ Discharger Bi directional Inverter EMS Elegant Power Electronics Applied Research Laboratory (EPEARL) 2

4 Bi-directional Inverter 3Φ4W Inverter (= 3 x 1 Φ 2W Inverters) Elegant Power Electronics Applied Research Laboratory (EPEARL) 3

5 1Φ2W Inverter Elegant Power Electronics Applied Research Laboratory (EPEARL) 4

6 SPWM and Bi-Polar Operation magnetize demagnetize Elegant Power Electronics Applied Research Laboratory (EPEARL) 5

7 Conventional Approach i in where: G i K P K s( 0.5) T G s d e K s i (0 1) PWM V V in tri Elegant Power Electronics Applied Research Laboratory (EPEARL) 6

8 # D-Σ Digital Control Major Characteristics 1) No need of frame transformation (for three-phase systems), the D-Σ digital control determining control laws directly. 2) Unlike predictive control, the D-Σ digital control using all of the information known a priori. 3) Similar to deadbeat control, the D-Σ digital control determining control law directly without modulation. 4) Unlike deadbeat control, the D-Σ digital control having a controller to cover wide filter inductance, dc-bus voltage and switching frequency variations. 5) Like fuzzy control, the D-Σ digital control being named based on the processes of control-law derivation. Elegant Power Electronics Applied Research Laboratory (EPEARL) 7

9 Unique Features 1) Direct digital control -- link error to control directly. 2) Current source achieve high stability margin. 3) G C G P =I cancel parameter variation effects. 4) Wide bandwidth up to switching frequency. Elegant Power Electronics Applied Research Laboratory (EPEARL) 8

10 Single-Phase Bi-directional Inverter D-Σ digital control Cover wide inductance variation and grid voltage distortion. Shape grid-current sinusoidally. Achieve wide BW (= f s ). Circuit diagram of a single-phase bi-directional inverter with LCL filter and its control blocks. Elegant Power Electronics Applied Research Laboratory (EPEARL) 9

11 A. Grid-Connection Mode Two buck converters operated in +tive and tive half line cycles, respectively. B. Rectification Mode Two boost converters operated in +tive and -tive half line cycles, respectively. D- Σ Approach (Grid Connection Mode) Division (D) of Switching Period: i and Derivation of Control Laws Ls, magnetize v v vdc L v v v v dc c i Ls demagnetiz dc ce dc (1 c d) Ts i L dts L (1 d) s( i Ls ( il ) L l), s( il ) s v ( i ) l c dt s Control law for grid-connection mode: Control law for rectification mode: d Rec T s 1 dgc 1d 2 Elegant Power Electronics Applied Research Laboratory (EPEARL) 10 GC vc il Ls ( il ) 1 vc il Ls ( il ) 2vdc 2v dc Ts 2 2v 2v T Summation: Σ dc dc s

12 # LC or LCL Filter i L i c + v c - i gr + v p - Ripple Current LCL Filter LC filter network at the inverter output side. i L d GC ( n 1) 1 2 vc 2v I gr dc i L ( n 1) i ( n 1) L s(i 2v T Lfb dc ( n) s L ) ( I gr ( n) i Lfb ( n)) ( I gr ( n 1) I gr ( n)) I I sinnt gr M S Elegant Power Electronics Applied Research Laboratory (EPEARL) 11

13 # Filter-Capacitor Current Compensation (FCCC) i * gr i L i gr i * gr I gr ~ i c i c + v c - + v p - d GC i L 1 2 vc 2v dc ( n 1) I gr LCL filter network at the inverter output side. i ( n 1) L (i ) L * s L L gr Lfb 2vdc Ts ( n 1) i I I sinnt gr M S Lfb ( n ) v ~ (n1) v c i ( n 1) i ( n 1) i ( n) Elegant Power Electronics Applied Research Laboratory (EPEARL) 12 p ~ C s v ~ c ( n 1 ) v i c T ( n) L g s ( I gr c ( ( n1) I T n S ) gr (n1))

14 # Stability Analysis s-domain model control block diagram Equivalent of the proposed circuit filter-capacitor of the controlled current-source current compensation inverter and based connected D-Σ digital to the grid control with grid impedance Z l. equivalent transformation il îl Gp Z d dˆ g(1t ) Zo T 1 Ls ZGc g T H G p 2vdcT czggil s Z c VP Z 0 Note: e -st is approximated ig as (1-sT s ) 2vdcT L s s G il c G G c 1 G G H p p 1 e st s G ig i I g gr v p 0 Gil 1T H c C s(1 e T s st s ) G iv i v g p I gr 0 HcGil 1/ Z 1T c Elegant Power Electronics Applied Research Laboratory (EPEARL) 13

15 Specifications SYSTEM PARAMETERS OF THE EXPERIMENT SET-UP Parameters Symbols Values DC bus voltage v DC 360 ~ 400 V AC output voltage v N 220 V rms Maximum rated power P max 5 kw Line frequency f l 60 Hz Inverter inductors L s 3 mh ~ 650 μh Filter capacitor C s 5 μf Power switch IGBT IRG4PC50SPbF V CE(on) typ. = 1.28 V, V CES = 600V, and I C(TC =25 C ) = 70 A Power diode V CREE C3D20060D F(TJ=25 C) typ. = 1.5 V (silicon carbide) Zero Recovery Time Switching frequency f s 20 khz Elegant Power Electronics Applied Research Laboratory (EPEARL) 14

16 Prototype Photograph of the designed single-phase bi-directional inverter system Elegant Power Electronics Applied Research Laboratory (EPEARL) 15

17 Experimental Results (Vg with no harmonics) GC mode GC mode (5 kw) Rectification mode Rectification mode (5 kw) (i L and i g : 20A/div; v g and v dc : 100v/div; time: 10ms/div) Elegant Power Electronics Applied Research Laboratory (EPEARL) 16

18 Without considering inductance variation Considering inductance variation L 1500 H 450 H i 100 % ~ 30 % Elegant Power Electronics Applied Research Laboratory (EPEARL) 17

19 Experimental Results (GC mode) (V g with harmonics) Case I: (V THD : 18.5% ) Without FCCC Harmonic order % I THD : 18.8% With FCCC I THD : 3.2% (i L and i g : 10A/div; v g and v dc : 100v/div; time: 10ms/div) Elegant Power Electronics Applied Research Laboratory (EPEARL) 18

20 Case II: (V THD : 6.4% ) Harmonic order % Harmonic order % Without FCCC I THD : 9.4% With FCCC I THD : 3.8% (i L and i g : 10A/div; v g and v dc : 100v/div; time: 10ms/div) Elegant Power Electronics Applied Research Laboratory (EPEARL) 19

21 Case III: (V THD : 17.8% ) Harmonic order % Without FCCC I THD : 17.7% With FCCC I THD : 2.1% (i L and i g : 10A/div; v g and v dc : 100v/div; time: 10ms/div) Elegant Power Electronics Applied Research Laboratory (EPEARL) 20

22 Case IV: (V THD : 4.9% ) Harmonic order % Harmonic order % With FCCC Without FCCC I THD : 5.1% With FCCC I THD : 2.5% (i L and i g : 10A/div; v g and v dc : 100v/div; time: 10ms/div) Elegant Power Electronics Applied Research Laboratory (EPEARL) 21

23 Experimental Results (Rectification mode) (V g with harmonics) Case I: (V THD : 18.4% ) Harmonic order % Without FCCC I THD : 18.7% With FCCC I THD : 2.8% (i L and i g : 10A/div; v g and v dc : 100v/div; time: 10ms/div) Elegant Power Electronics Applied Research Laboratory (EPEARL) 22

24 Case II: (V THD : 16.4% ) Harmonic order % Harmonic order % Without FCCC I THD : 9.3% With FCCC I THD : 3.3% (i L and i g : 10A/div; v g and v dc : 100v/div; time: 10ms/div) Elegant Power Electronics Applied Research Laboratory (EPEARL) 23

25 Case III: (V THD : 17.7% ) Harmonic order % Without FCCC I THD : 17.8% With FCCC I THD : 2.0% (i L and i g : 10A/div; v g and v dc : 100v/div; time: 10ms/div) Elegant Power Electronics Applied Research Laboratory (EPEARL) 24

26 Case IV: (V THD : 4.9% ) Harmonic order % Harmonic order % With FCCC Without FCCC I THD : 5.0% With FCCC I THD : 2.6% (i L and i g : 10A/div; v g and v dc : 100v/div; time: 10ms/div) Elegant Power Electronics Applied Research Laboratory (EPEARL) 25

27 Experimental Results (step current change) 10 A 20 A (a) with low-thd v g (b) with high-thd v g (i L and i g : 20A/div; v g and v dc : 100v/div; time: 10ms/div) Elegant Power Electronics Applied Research Laboratory (EPEARL) 26

28 Case # Conclusions Four test conditions of grid distortion Harmonic order % Measured Item Without FCCC (GC Mode) With FCCC (GC Mode) Without FCCC (Rect. Mode) With FCCC (Rect. Mode) Case I Case II PF V THD (%) I THD (%) PF V THD (%) I THD (%) PF Case III V THD (%) I THD (%) PF Case IV V THD (%) I THD (%) Elegant Power Electronics Applied Research Laboratory (EPEARL) 27

29 1) With D-Σ digital control, the controller can tune loop gains corresponding to inductance variation cycle by cycle. 2) D-Σ digital control can cover wide inductance, dc-bus voltage and line voltage variations, and achieve precise inverter current tracking. 3) With the filter capacitor-current compensation, the grid current can be shaped sinusoidally under distorted grid voltage. 4) D-Σ digital control can improve stability margin, close to 90, when injecting current to the grid under high line impedance. Elegant Power Electronics Applied Research Laboratory (EPEARL) 28

30 Elegant Power Electronics Applied Research Laboratory (EPEARL) 29