ELECTROTECHNOLOGY ELTK1200 ASSIGNMENT #8 SOLUTIONS

Transcription

1 ELECTROTECHNOLOGY ELTK1200 ASSIGNMENT #8 SOLUTIONS Full-load: This has not changed. 187

2 a Full-load Load is a of Full-load, current will be a of Full-load current (voltage is the same). Fe loss (core loss) is constant with changes in current. Cu loss I 2. Cu loss = 2 Cu loss (Full-load) Full load, efficiency = 97%. S out = rated kv A, but S in has to be larger than rated kv A to compensate for the losses (3%) in the transformer. Note: Comparing I 1 and I 2 with results from Question 2 shows I 2 is the same, while I 1 must be larger with poorer efficiency. a load, efficiency = 95.6%. 188

3 4. ½ Full-load (d) Cu loss I 2. Cu loss = (½) 2 Cu loss (Full-load) (e)

4 This depends on the load. In this case the transformer is suppling 68A at 180V. (d) (e) S out = V A, rated kv A = 61.2 kv A. Therefore transformer is at 1/5 of full load. 6. We have a wye to wye connection, so and apply to both the source and load. In this case,. From the source side,, which means that from the load side 190

5 , so for a wye to wye connection. Z = R because of a resistive load and all three resistors are equal because of balanced. I N = 0 because the load is balanced. Resistive load so pf = 1 and all the power supplied by the source is dissipated in the resistors. (d) pf = 1. or or 7. Again wye to wye so and apply to both the source and load, so the phases have the same voltage and current. 191

6 Balanced means that each phase current will have the same magnitude and each phase current will lag the respective phase voltage by and. and. and. (d) or or Phasor Diagram 192

7 8. We have a wye to delta connection, so the source is controlled by the wye rules ( and ) and the load is controlled by the delta rules ( and ). We are given the source phase voltage. Using the line voltage, we can find the load phase voltage. Impedance is resistive, so Z = R. The line current from the load becomes: The rest is an explanation of the phasor diagrams. At the source: 193

8 Let s start at the source again and look at the phase angles. In a wye, line voltages are larger than phase voltages and lead the phase voltages by 30 as shown in the drawing. The load is connected in delta, so the line voltages are the same as the load phase voltages. The load is resistive, which means the current and voltage will be in phase with each other. The load phase voltages will produce phase currents of: 194

9 In a delta, line currents are larger than phase currents and lag the phase currents by 30 as shown in the drawing. Finally, the source is connected in wye which means the phase currents are: This produces the phasor diagram shown. I and V S are in phase, which makes sense since we are dealing with a resistive load. If there was a phase angle (eg an RL circuit), then the phase currents at the source would reflect it. In a wye to delta, the wye transition from phase to line voltages picks up 30, which is lost in the delta transition from phase to line currents. Source Phasor diagram 195

10 9. We have a delta to delta connection, so the source and the load are controlled by the delta rules ( and ). We are given the source phase voltage. Impedance is resistive Z = R and phase angle is 0. Note: Line currents are times their phase currents and lag them by