Ultralow-power all-optical RAM based on nanocavities

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1 Supplementary information SUPPLEMENTARY INFORMATION Ultralow-power all-optical RAM based on nanocavities Kengo Nozaki, Akihiko Shinya, Shinji Matsuo, Yasumasa Suzaki, Toru Segawa, Tomonari Sato, Yoshihiro Kawaguchi, Ryo Takahashi, and Masaya Notomi Theoretical bias power required for memory In this study, we investigate PhC nanocavities exhibiting carrier nonlinearities such as band-filling dispersion (BFD) and free-carrier dispersion (FCD), because these nonlinearities are more efficient than Kerr nonlinearities and exhibit a moderate response speed of a nanosecond or less. The power consumption of an o-ram is mainly determined by the CW bias power, as long as the memory switching rate is not as high as GHz. We estimated the required bias power with a simple analytical model. Here, the bias power P bias is defined as the input power in an input waveguide required for a nonlinear wavelength shift equal to the cavity spectral width. Hence, 1/ Q = Γσ c N / n, where Q is the cavity Q factor, Γ is the field confinement factor in the cavity, σ c is the index change with carrier density in the cavity N. The rate equations for the photon energy in the cavity U and the carrier density N are given as 2 ω du QcplQ ω 4Q ω = Pbias U = Pbias U ( ω = ωcav ), (S1) 2 dt 2 ω Q Qcpl Q ( ω ωcav ) + 2 4Q dn ω U N =, (S2) dt Qabs hωvm τ c where Q cpl is the Q factor for out-coupling to the waveguide, Q abs is the Q factor for absorption in the cavity, and τ c is the carrier relaxation time. For a steady-state solution, that is, du/dt = 0 and dn/dt = 0, these formulae lead to the required bias power, P bias nhωvm = Γηabsσ cτ cq, (S3) where η abs = 4Q 2 /(Q abs Q cpl ) is the absorption efficiency in the cavity. Eq. (S3) suggests that a large Q/V m ratio is advantageous in terms of realizing a low operating power. A PhC nanocavity is therefore suitable from this viewpoint. In addition, the platform material should be carefully chosen to enhance η abs, σ c, and τ c, and thus achieve a nature photonics 1

2 supplementary information moderate absorption and a large index change. Our previous studies shows that an appropriately designed InGaAsP composition can provide a strong BFD even for a wavelength of 1.55 μm, while maintaining a moderate linear absorption and cavity Q. 1 Based on these considerations, we employed a bulk InGaAsP with a photoluminescence peak at 1.45 μm for a buried region to enhance η abs and σ c. The strong confinement of pumped carriers without rapid recombination is also desirable for realizing a large τ c, as long as it significantly restricts the response speed. By considering the roughly estimated experimental values of Q = , Q int = 10 5, Q abs = , τ c = 7 ns, and the theoretical values of V m = 0.22 μm 3, Γ = 0.8, σ c = m 3, the expected bistable power calculated from Eq. (S3) is 41 nw, which is similar to the experimental value of 25 nw. Carrier relaxation time of BH-PhC nanocavity The estimation of the carrier relaxation time is important to show how strongly carriers are confined in a nanocavity. To accomplish this estimation, we injected a CW bias light and a short pumping pulse, as shown in Fig. S1a. We performed a time-to-detuning (δ) mapping measurement for a bias wavelength around the cavity resonance. A large number of temporal profiles measured at different δ values at the same input power are mapped on a 2D image. Figure S1a and b show the results for an L4 cavity fabricated in an all-ingaasp slab and a BH-based line-defect cavity, respectively. Short pulse pumping induces a resonance blue shift due to a photo-excited carrier effect. The right hand side of Fig. S1a shows the temporal response for δ = 0 nm in an L4 bulk-core cavity, and the fitting curve indicates a carrier relaxation time of 0.24 ns. This value is determined by fast carrier diffusion from the cavity and a non-radiative recombination at the sidewall of the air holes. On the other hand, for a BH-based cavity, the CW bias light easily induces a wavelength shift and a subsequent bistable response, as shown in Fig. S2. Therefore, we estimated the carrier relaxation time at δ = 0.38 nm, which is outside the bistable range, and found it to be 7.0 ns. This is 29 times longer than that of a bulk-core cavity, indicating strong carrier confinement in the BH region without any enhancement of non-radiative carrier recombination. 2 nature photonics

3 supplementary information Figure S1 Estimation of carrier relaxation time. a, L4 cavity fabricated with all-ingaasp slab. b, BH-based PhC cavity. The right figures show a time-to-detuning (δ) mapping of an output CW bias light, and the left figures are extracted responses as indicated with a dashed line. Long-time memory operation In Fig. 2 of the main article, we showed the memory operation with a storage time of 1 μs. This storage time can be extended much further. Figure S2 shows the bias output power for repeated set and reset pulses with an interval time of 10 seconds, indicating a successful long-storage memory operation. This shows that the thermal instability was sufficiently suppressed, and suggests that there is practically no limit to the storage time. nature photonics 3

4 supplementary information Figure S2 Output bias power for long-time memory operation. Set and reset pulses are injected with an interval of 10 s. The bias power and set pulse energy were 500 nw and 13 fj, respectively. The output light was directly detected with an optical power meter without a pre-amplifier. Switching time Figure S3a presents the time-to-detuning (δ) mapping of a bias output for a wavelength around the cavity resonance, showing a write-and-erase operation in a bistable wavelength range. Figure S3b focuses on a rise-transient response around the time when a set pulse is injected. The rise time was estimated to be 44 ps. On the other hand, the fall time must be limited by the carrier relaxation time of 7 ns. The rise time is much shorter than the fall time, because the set pulse has a 12 ps width and is instantaneously absorbed in a cavity. Figure S3 Estimation of switching time. a, Time-to-detuning mapping of output bias light for a write-and-erase operation at P in = 204 nw. b, Magnified response around the rise-transient time of the memory. 4 nature photonics

5 supplementary information Demonstration of integrated o-ram for four-bit signal train For the parallel integration of an o-ram, four PhC nanocavities with the same structure and same resonant wavelength as a single nanocavity are integrated in parallel with an interval of 50 μm, as shown in Fig. S4. The o-ram chip module consists of a polarization-maintained fibre (PMF) array, lens systems for light focusing, and a thermo-electric cooler (TEC) beneath the chip to provide stability during operation. The diameter of a simulated optical spot at the end of a waveguide facet was about 3 μm. The average optical coupling loss on one side was about 9 db, and the loss fluctuation in the four ports was less than 1 db. Figure 4 in the main text shows the set-up for a four-bit RAM demonstration employing two different optical signal trains of 1010 and A four-bit signal with a 40 Gb/s repetition rate (25 ps interval) was generated with a mode locked laser and an optical delay line. The signal train was demultiplexed by an all-optical serial-to-parallel converter (SPC), as described in the latter part, and the wavelength of each isolated signal was tuned to the corresponding PhC cavity using a band-pass filter with a bandwidth of 0.3 nm. An isolated 12-ps-wide signal pulse was merged with a bias light and a read pulse, and injected into the o-ram chip. The output light at each port was amplified and simultaneously monitored with a four-port sampling oscilloscope. The bias power and signal bit energy were individually adjusted for each cavity, and were in the 1-2 μw range, and the fj/bit range, respectively. These relatively high values were set to allow us to observe the output waveforms clearly and stably. As shown in Fig. 5S, we confirmed the hysteresis responses that each o-ram performed with an operating power of less than 50 nw, which is similar to that for the single device. As we confirmed for the single device, bistable threshold power for revealing hysteresis window was almost the same with minimum power for dynamic memory operation. Therefore, we believe that demonstration of four-bit o-ram is also possible with an ultrasmall input power. The temporal output intensity at the bias light wavelength is also shown in Fig. 4 of main text, which clearly shows that the four-bit input data ( 1010 and 1101 ) were successfully coded as two bistable states in each cavity after the writing pulse train had been injected, and they were completely erased when a reset negative pulse was applied at t = 1 μs after writing. The stored four-bit data were read out by injecting reading pulses at t = 500 ns after writing. The bottom right panels show the output intensity of the reading pulse. The stored bit stream is successfully regenerated. The read pulse width was set at 100 ps, which was wider the set pulses. This should not pose a problem, nature photonics 5

6 supplementary information because the output read pulses can be extracted with a narrower pulse width and converted to a serial 40-Gb/s signal by launching them into a parallel-to-serial converter (PSC), although we did not include this process in the demonstration. As far as we know, this is the first demonstration of the cooperative operation of a chip-based PhC module not only for an o-ram but also for any PhC nanodevice. The SPC used in this experiment is capable of handling ultrafast optical signals of over 100 Gb/s, and has been successfully implemented in a CMOS-RAM subsystem 2. Therefore, our demonstration of a four-bit o-ram should constitute a straightforward and significant step towards the construction of an all-optical RAM subsystem. Figure S4 Integrated o-ram chip module with an optical fibre array. Multi-input/output access between polarization-maintained fibres (PMFs) and o-ram chip was obtained via lens systems. 6 nature photonics

7 supplementary information Figure S5 Hysteresis responses between the output and input powers for four devices that used for four-bit integrated memory. Serial-to-parallel converter (SPC) Figure S6 shows an all-optical SPC 3,4, which converts a 40-Gb/s optical bit stream in parallel, and that was used in the demonstrated parallel o-ram system. The incoming optical packets are branched into four different paths and pass through delay lines staggered by a bit separation of 25 ps. The four split signals converge to a single point on an ultrafast all-optical semiconductor switch. Optical pump pulses with different circular polarizations irradiate the same point at the timing of opening and closing edges of the time window, and only the pulses within the time window can be reflected from the switch by a differential spin excitation scheme and be output as parallel optical signals. This switch has an ultrafast response (> 1 THz) and a high switching contrast (> 40 db), and performs a clear conversion as shown in Fig. S6b. nature photonics 7

8 supplementary information Figure S6 a, All-optical serial-to-parallel converter using surface-reflection all-optical switches. b, four-bit optical data input and parallelized output data. References 1. Nozaki, K. et al. Sub-femtojoule all-optical switching using a photonic-crystal nanocavity. Nature Photonics 4, (2010). 2. Takahashi, R. et al. Photonic random access memory for 40-Gb/s 16-b burst optical packets. IEEE Photonics Technology Letters 16, (2004). 3. Takahashi, R., Yasui, T., Seo, J.K. & Suzuki, H. Ultrafast all-optical serial-to-parallel converters based on spin-polarized surface-normal optical switches. IEEE Journal of Selected Topics in Quantum Electronics 13, (2007). 4. Takahashi, R. et al. Ultrafast optoelectronic packet processing for asynchronous, optical-packet-switched networks. J. Optical Networking 3, (2004). 8 nature photonics