Intermediate report. AS Automaatio- ja systeemitekniikan projektityöt

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1 Intermediate report AS Automaatio- ja systeemitekniikan projektityöt A15-01 Design of a Switched-mode power supply A15-01 Hakkuriteholähteen suunnittelu Aarne Liski Atte Yrjölä Jere Kinnunen

2 1. Background and goals of the project Automation and systems technology department own a Fiat Doblo car that has been converted into an electrical vehicle. The car has four switched-mode power supply chargers for charging from a three phase AC input. A controller unit of one of these four chargers broke and an earlier project work was made on trying to build a new control for the H-bridge of the converter, although in the end it wasn t successfully implemented. Following the unsuccessful attempt at fixing the charger, and as the old charger type uses older technology, there is a need for a completely new charger. And so, this project aims to design a new SMPS charger using more contemporary technology (MOSFETs instead of IGBT s etc.). The technical specification given is that the new charger should take 230V 3-phase AC input, and its output should be 325V DC at ~10A. The efficiency should be over 90%. The project is meant to include only the design of the power electronics components of the system and for example the measuring and controlling system required by the charger are left outside of the project to keep the time required in control. The power supply itself consists of 6 practically independent functional parts that can have varying topologies and design considerations. First there is a three phase full rectifier for the input voltage with a capacitor to produce an even DC input voltage (1), then there is a MOSFET H-bridge that produces high frequency AC (2), which is controlled with an IC to produce a correct waveform and duty cycle (3). After this there is a transformer that feeds the H-bridge output into a secondary circuit (transformer is there for galvanic isolation and it also provides voltage boost) (4) and then there is the secondary circuit that can have a few different topologies (5). Finally there is a full rectifier stage to produce the wanted DC voltage over the load (6). In the beginning of the project, the work load was estimated at 3-5 credits, depending on how much the group members could commit to the project and so, what level we can get the design to. Intermediate update We started by studying the old charger design and the project work done on fixing the previous design. Following this, we got a quite good understanding on how the pulse width modulation functions in SMPS applications. We also identified parts of the design that could be done better in order to reach a better efficiency. After this, we delved into contemporary research papers on different SMPS topologies. During this research we found two interesting topologies that we decided to look more deeply into. The first topology was a naval master s thesis [1] that used a simple PWM modulation topology with diode rectifier in the secondary circuit. This was deemed interesting for the simplicity of the topology and components used and especially for the fact that it used the same kind of

3 simple PWM as is used in the previous charger topology used in the Fiat Doblo chargers. In the end, even though the technology was simple and easy to reproduce for our needs, we concluded that we couldn t get the minimum 90% efficiency we wanted with this topology (the thesis aims to 0% efficiency). The other topology [2] used a so called Zero Voltage Switching (ZVS) technology that aims to reduce switching losses in the H-bridge MOSFETs by timing the switching moment with an instant where the resonant circuit formed by the parasitic capacitances of the MOSFETs and the leakage inductance of the transformer produces a zero voltage over the MOSFET switch. This eliminates the switching losses in the circuit, which at higher switching frequencies provides a considerable increase in efficiency. Image 1: Switching losses explained However, this ZVS technology requires a different kind of control modulation to be used than what is used in the original Doblo charger topology. This is called phase shift modulation and it requires a different type of control IC in order to function. In the research paper [2], they used a Texas Instruments UC375 IC. Following the initial research, we decided to use a similar topology as in the research paper, which also used a simple center-tap/full wave rectifying circuit in its secondary circuit. After this, we continued by attempting to reproduce a similar circuit in PLECS simulator in order to help us understand more deeply how the circuit and its PSM actually functions and how for example different filter inductors affect the waveforms. As PLECS is a quite simple software, we thought this would be a very time efficient way to help us make sure we understood the circuit correctly. Following a couple of days of simulating, we managed to get the circuit functioning and then the next step was to start searching for the correct formulas to size our circuit correctly for our needs.

4 While sizing the components in the circuit, we found a problem in the ZVS functionality of the UC375 IC that would require us to fix the circuit so that the ZVS would function correctly only when the current and voltage output would be locked. Now, in our application, that is rarely the case and following this revelation we found a more advanced IC that can also sense the current and voltage in the transformer and use this information to modify the delays that it uses in order to do the switching in the exact moment when there is zero voltage over the transistor. This linear technologies LTC3722 IC also includes a functionality that makes possible the use of synchronous current doubler secondary circuit topology, which could also reduce the losses in the secondary circuit. This IC could also be directly simulated in LTSpice simulator software and so we started simulating with this new IC and current doubler secondary circuit. During this stage we also found all the necessary formulas to size our components correctly and after we looked into the example circuitry provided by LT for the LTC3722 IC [3], we started sizing the circuit for our needs. At this point, we noticed that the current doubler secondary circuit fundamentally requires double the output voltage in our secondary circuit, which lead us to deem it unviable in our application as it would most likely produce EMC problems etc. that would be much worse than what the efficiency boost (~0,36%) it would provide. So now, after all these stages, we are at the state where we are sizing our circuit with a full bridge diode rectifier stage, the LTC3722 IC controlling our MOSFET gates with phase shift modulation (currently we are simulating with SPA11N6C3 power transistors) and we are using a center tapped transformer with a diode full wave rectifying stage in the output. 2. The design-steps and intended work load As of the date of the project plan presentation, we had met with the instructor Jorma Selkäinaho a few times, in addition to which we spent time studying the previous charger design and the previous project report made on the modification of this broken charger. After this, we spent time researching contemporary research papers that have been made on building modern SMPS chargers and following this work, we figured out the steps actually required for the design. In the following table, the steps required are presented and given a schedule at which they are planned to be completed. Week Planned goal of the week Work hours 3 Start of the project, introduction to project requirements and studying the old design & project 39 Researching basics of SMPS structure & planning our proposed design 40 Studying the theory and requirements for sizing the required components in the design (making sure everything is accounted for)

5 41 Studying the theory and requirements for sizing the required components in the design (making sure everything will be accounted for in our calculations) 42 Setting the thermal and electrical requirements for the actual design 43 Setting the thermal and electrical requirements for the actual design 44 Electrical & thermal sizing calculations & locking in the suitable components 45 Electrical & thermal sizing calculations & locking in the suitable components & Simulation 46 Simulation 47 Simulation 4 Simulation 49 (Simulation)/ Finalizing the project report & demo preparation Finalizing the project report & demo preparation 6-51 Finalizing the project report & demo preparation 0-4 Intermediate update Week Actual goals and new plans Work hours 3 Start of the project, introduction to project requirements and studying the old design & project 39 Studying the old design, researching basics of SMPS structure & planning our proposed design 40 Simple simulations with UC375 IC topologies from [1] and [2] using PLECS 41 Studying the theory and requirements for sizing the required components in the design (making sure everything will be accounted for in our calculations) and simulating the new circuitry with PLECS 42 Swapping IC to LTC3722, starting LTSpice simulations with current 14 doubler topology 43 Simulating with current doubler, in the end with normal diode 10 rectifier/center tap topology and working on the intermediate report 44 Electrical sizing and simulating with the correct values, looking into viable component choices 45 Simulating with actual components, thermal calculations & possibly changing components depending on thermal calculations - iterating 46 Simulating with actual components, thermal calculations & possibly changing components depending on thermal calculations - iterating 47 Simulating and compiling the BoM and circuit layout 4 Simulating and compiling the BoM and circuit layout 49 (Simulation)/ Finalizing the project report & demo preparation Finalizing the project report & demo preparation 6-51 Finalizing the project report & demo preparation 0-4

6 3. Risks First of all, as we jumped into the course quite late and especially for two members of the group that weren t planning on taking this course in the first place, there were some doubt how much we could commit to the project. This was taken into account when discussing the level of design we were supposed to reach, and it was agreed upon that we will get the design as far as possible in the time that the group members could give to the project. This would mean less credits for less work hours used and also the design would be less of a finished one, for example it could lack plans for the transformers secondary side circuit. In the end we managed to lock down two weekly times that we would use for the project and on a busier week, only one time would be used. A risk within the group is also in the different amounts of expertise the different group members have. This will be taken into account when deciding who does which part, but it could be possible that one group member or two will do more work than the others. Another risk is that as the members of the group are not yet familiar with actually building power electronics devices in practice, it might not be clear how much work a certain work phase would require. For example finding the correct formulas & understanding the circuit thoroughly could either be a simple thing if we could find a good enough paper on the subject, or if no information can be found it can take an unexpectedly long time. Intermediate update Risks that have realized Luckily we have managed to work most weeks two days a week in a group, and in addition to that we have spent time outside of group work to study and research for the project. Currently we have one member of the group that has had a great value in the group work, but most likely when we get to compiling the final reports etc. the work load will shift from him to other members of the group. One risk that has truly realized is that we haven t understood the circuit topologies well enough and this has led to changing the circuit topology a few times. However, this is understandable as we don t have too much expertise in designing actual circuits and we are actually quite convinced that every time we have changed the topology, we have had a good understanding on the reasons for the change and what the change will bring, and so we have reached a higher level of understanding in all of the components of the circuit from each time we have altered the circuit topology. We have also found really good research papers & IC datasheets on the subject. References [1] [2] [3]

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