A More-Efficient Half-Bridge LLC Resonant Converter: Four Methods For Controlling The MOSFET

Transcription

1 A More-Efficient Half-Bridge LLC Resonant Converter: Four Methods For Controlling The MOSFET by Gordon Wang and Alex Lin, Fairchild Semiconductor, Taipei, Taiwan ISSUE: September 2012 Using a half-bridge LLC resonant converter in a power application can deliver higher efficiency and a more compact design. The primary MOSFET of the LLC resonant converter can easily reach zero voltage switching (ZVS) and zero current switching (ZCS), and that saves energy. Also, because the circuitry of the LLC resonant converter works without a storage inductor on the secondary side, the PCB is smaller. LLC resonant converters typically use a secondary-side synchronous rectifier (SR) that operates in boundary conduction mode (BCM) or discontinuous conduction mode (DCM). But, regardless of the operating mode BCM or DCM current in the secondary-side SR can introduce power losses and reduce overall efficiency of the design. One way to reduce these losses is to use detection signals to control the turn-on and turn-off of the MOSFET. In this article, we look at four different methods for doing this: 1. Detect the secondary-side currents (I DS1 and I DS2 ) 2. Detect the voltage of the secondary-side SR (V DET ) 3. Detect the turn-on period of the secondary-side SR (t VDET ) 4. Synchronize with the LLC signal Fig. 1 gives a sample design, showing the LLC resonant converter on the primary side, the SR circuit on the secondary side, and the relevant voltages and currents for detection and control of MOSFET turn-on and turnoff. Fig. 1. The basic circuit design How2Power. All rights reserved. Page 1 of 8

2 Method 1: Detect Secondary-Side Currents (I DS1 And I DS2 ) With this method, we use a current transformer (CT) to detect the current signals and control the MOSFETs. Starting with the original circuit shown in Fig. 1, we added two current transformers (CTs.) The new circuit is shown in Fig. 2. The resistor can be used to transform the derived current signal into a voltage signal that is then sent to the logic circuit to control each MOSFET. Fig. 2. Adding two CTs to detect SR current. Fig. 3 shows an alternative approach, using just one CT to detect the current signals. This is a more constrained circuit layout, because there's one less CT to deal with. So this circuit uses less PCB space. Fig. 3. An alternative approach with just one CT How2Power. All rights reserved. Page 2 of 8

3 Fig. 4 gives the waveforms generated by the SR circuit with two CTs (from Fig. 2). It shows each phase that uses voltage converted from the detected current to control the corresponding MOSFET and GATE signal. The specified peak amplitude of the voltage level is used as the basis for controlling turn-on and turn-off of the MOSFET. Fig. 4. Waveforms generated by the SR circuit with two CTs. Fig. 5 gives similar results for the SR circuit with only one CT (from Fig. 3.) It shows the two phases after current is detected by the CT and then converted into voltage to control the MOSFET's turn-on and turn-off. Fig. 5. Waveforms generated by the SR circuit with one CT How2Power. All rights reserved. Page 3 of 8

4 Figs. 4 and 5 show that the waveform of V XN detected by the CT under different output-loaded conditions. Under light load, current on the secondary side centralizes at the end of the switch period, so the time available to control the GATE ON signal of the MOSFET is shorter. Under light or no load, as the output current continues to decrease, the current detected by CT decreases too, and we can use the detected voltage level to determine when to shut down the SR circuit. Using a CT to detect the current signal and control the MOSFET is a relatively straightforward approach, but it has a drawback. The act of detecting the signal increases the loss in the CT, so the SR circuit is somewhat less efficient. Also, to shut down the SR circuit during light-load conditions, the current waveform needs to be considered because it could affect the load level at which the SR is shut down. Method 2: Detect Voltage Of Secondary-Side SR (V DET ) With this method, we use the V DS across the MOSFET during turn-on to control the MOSFET. This approach gives us the direct ratio of the MOSFET current. This lets us detect the voltage of the MOSFET during turn-on, and gives us a way to control the turn-off timing. The duration of MOSFET turn-on depends on the current passing through the body diode of the MOSFET. When the secondary-side current switches phases, current passes to the static MOSFET. The voltage on the MOSFET reduces to the forward voltage of the diode V F by using these conditions to control the timing of MOSFET turnon. As shown in Fig. 6, when I DS first starts to pass through the body diode of the MOSFET, the voltage V DET on the MOSFET is negative, triggering the GATE signal to be sent and turn on the MOSFET. We can see that V DET decreases at the moment of GATE turn-on, with a voltage equal to R DSON x I DS. Fig. 6. Triggering the GATE signal (and MOSFET turn-on) using V DET. Using V DET for detection is comparable to using a CT to detect current, but results in less energy loss because there s no CT involved in the process. When using V DET for detection, though, it's important that the path between the logic circuit and V DET detections should be as short as possible, because a longer PCB trace can cause signal distortion due to the parasitic effect of in-line inductors. Also, the signal needs to be controlled subject to interference How2Power. All rights reserved. Page 4 of 8

5 Method 3: Detect Turn-On Period Of Secondary-Side SR (t VDET ) This method uses V DET in combination with V DS. By detecting the time when V DS reaches a level corresponding to MOSFET turn on, and the point when V DET approaches 0 V after MOSFET turn-on, it's possible to measure the duration of SR conduction (t DET.) During this period, V DET drops below the specified low-voltage level (which is usually between 1 V and 2 V). This behavior can be used to determine the turn-off time of the SR gates for the next switching cycle. We can use this function because the high-side and low-side switching duty cycle of the LLC topology is symmetrical and the switching frequency doesn't change very much in the steady state. The body diode of the MOSFET can be used to turn on the MOSFET. This control approach is shown in Fig. 7. Fig. 7. The t VDET method. Some conditions can cause the MOSFET to turn off late. To prevent this, it s important to derive the necessary information early in the process to ensure the GATE signal triggers a MOSFET turn-off in time. The benefit of this approach is that it s more stable than directly detecting the slight negative voltage on V DET during MOSFET turn-on, and less susceptible to interference from noise or PCB layout. The period t DEAD, which covers the time between GATE turn-off and I DS with current lowered to 0 A, is shorter, and that can increase energy efficiency in the SR circuit. Method 4: Synchronize With LLC Signal This is the most direct method of control. The secondary side uses the GATE signal, calculated using the highside and low-side signals from the primary side, to control each MOSFET. Fig. 8 shows the setup How2Power. All rights reserved. Page 5 of 8

6 Fig. 8. Synchronizing with LLC signal to control the secondary-side MOSFETs. The logic circuit is used to handle the extra HG and LG signals. It then sends the control signal to the secondary side. In most conditions, each of the MOSFETs on the secondary side needs to be turned off before the corresponding MOSFET on the primary side is turned on. So the original LLC control signals (V HG, V LG ) can't be used directly to drive the secondary MOSFETs. We need create new signals to drive them. The operating region has an effect on the circuit. In Region 2, the resonant current I L can drop below the magnetic current I M. When this happens, I P becomes zero, the primary and secondary sides decouple, and the body diode of the secondary MOSFET is cut off. To prevent this from causing a reverse current flow, the SR needs to turn off earlier. Monitoring the primary-side GATE signal doesn't indicate when the condition will occur, so extra functionality for turning off the SR needs to be added to the design. In Region 1, the primary-side GATE signal and the secondary-side current are related as shown in Fig. 9. Fig. 9. The primary-side GATE signal and the secondary-side current in Region How2Power. All rights reserved. Page 6 of 8

7 When LG shuts down, there is a delay before the corresponding current of the secondary side reaches zero. During this time, phase displacement can occur, even if the secondary-side waveform doesn't immediately reflect the change in phase. The design needs to have additional functions for postponing SR turn-off and cutoff, to prevent the primary-side resonant current from damaging the SR. Fig. 10 shows the SR waveform during normal operation. Tradeoffs Fig. 10. The SR during normal operation. Table 1 compares the different methods. As one might expect, detecting current (I DS ) is easier than detecting V DET when the MOSET is turned on, but the current-detection method requires the addition of one or two CTs. The most complex method is synchronizing with the LLC signal, since it requires the addition of a pulse transformer and improved operation in Regions 1 and 2. Noise is also a consideration when synchronizing with the LLC signal, due to the pulse transformer. Table 1. Relative merits of each method Detect I DS Detect V DET Detect t VDET Synchronize with LLC signal Logic circuit Simple Simple Complex Complex Need for extra elements Layout considerations Influences MOSET R DSON Medium (one or two CTs) Above average Low Low High (pulse transformer) Above average Average Average (avoid noise) No Yes No No Resistance to noise Average Easily influenced SR dead time Short Short (avoid noise) Efficiency Good Best (avoid noise) Average Follows switching frequency Better May be influenced Follows control function Better or Best 2012 How2Power. All rights reserved. Page 7 of 8

8 Adding extra functions to the circuit makes the control function more complex and can make layout harder. The method that uses V DET for detection, for example, requires a very accurate R DSON for the MOSFET. The voltage of the detected R DSON ranges from 1 to 10 mv and is easily influenced by noise interference. Dead time in the SR can be affected by layout and noise, and that can make it harder to read the R DSON voltage. The time required to detect V DET can also change the SR's dead time due to the difference in exchange frequency. With the synchronization method, when operating in Region 1, SR dead time depends on the degree of improvement in phase-displacement. Conclusion While there are tradeoffs associated with each of the four methods described for detecting and controlling the secondary-side MOSFET, all of the methods help reduce power losses in a half-bridge LLC resonant converter. About The Authors Gordon Wang is in product line marketing for Fairchild Semiconductor s computing product segment. He has been with Fairchild for over seven years, and has experience in development and marketing positions in the power electronics industry. Alex Lin is an application engineer for Fairchild Semiconductor s PCIA computing product line. He has been with Fairchild for about six years. Alex holds a B.S.E.E. and an M.S.E.E. degree from National Taiwan University of Science and Technology How2Power. All rights reserved. Page 8 of 8