Research Article Electronically Controllable Sinusoidal Oscillator Employing CMOS VD-DIBAs

Transcription

1 ISRN Electronics Volume 213, Article ID 82363, 6 pages Research Article Electronically Controllable Sinusoidal Oscillator Employing CMOS VD-DIBAs Dinesh Prasad, 1 D. R. Bhaskar, 1 and K. L. Pushkar 2 1 DepartmentofElectronicsandCommunicationEngineering,FacultyofEngineeringandTechnology,JamiaMilliaIslamia, New Delhi 1125, India 2 DepartmentofElectronicsandCommunicationEngineering,MaharajaAgrasenInstituteofTechnology,Rohini, New Delhi 1158, India Correspondence should be addressed to Dinesh Prasad; dprasad@jmi.ac.in Received 23 November 212; Accepted 19 December 212 Academic Editors: L.-F. Mao, E. Tlelo-Cuautle, and Z.-M. Tsai Copyright 213 Dinesh Prasad et al. is is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. A new electronically controllable sinusoidal oscillator employing two voltage differencing-differential input buffered ampli ers (VD-DIBAs), two grounded capacitors, and one grounded resistor is presented. e proposed con guration offers (i) independent control of condition of oscillation (CO) and frequency of oscillation (FO) formerly by resistance and later through transconductance, (ii) low active and passive sensitivities, and (iii) a good frequency stability. e workability of the proposed con guration has been demonstrated by SPICE simulation. 1. Introduction Sinusoidal oscillators nd numerous applications in communication, control systems, signal processing, instrumentation, and measurement systems. In the recent past, a large number of single resistance controlled oscillators (SRCOs) have been proposed, see [1 11]; however, in all these SRCOs, the frequency of oscillation can be controlled by varying the values of resistances involved. Obviously, by replacing one of the grounded resistors by JFETs/MOSFETs, electronic tunability can be established, see [2, 4] and the references cited therein. Electronically controllable sinusoidal oscillators (ECSOs) based on different active building blocks are available in the literature, see [12 17] and the references cited therein. e advantages, applications, and usefulness of recently introduced new active building block named voltage differencing-differential input buffered ampli er (VD-DIBA) are now being recognized in the literature [18 2]. Recently, electronically controllable grounded and oating simulated inductance circuits using VD-DIBAs have been introduced in [2]. However, to the best knowledge and belief of the authors, no ECSO using VD-DIBAs has yet been presented in the open literature so far. e purpose of this paper is, therefore, to propose a new ECSO using VD-DIBAs along with a minimum possible number of grounded passive components, which offers (i) independent control of oscillation frequency and condition of oscillation, (ii) low active and passive sensitivities, and (iii) a good frequency stability factor. 2. he Proposed Con guration e schematic symbol and behavioral model of the VD- DIBA are shown in Figures 1(a) and 1(b), respectively [18]. e model includes two controlled sources: the current source controlled by differential voltage (VV + VV ),withthe transconductance gg mm, and the voltage source controlled by differential voltage (VV zz VV vv ), with the unity voltage gain. e VD-DIBA can be described by the following set of equations: VV + II + II VV IIzz = gg mm gg mm VV zz. (1) II vv VV vv VV ww 1 1 II ww e proposed new ECSO con guration is shown in Figure 2.

2 2 ISRN Electronics V + V v + v Z VD-DIBA V W I w V w V + V V w V z V v I z I v I z V z V v V z V v (a) (b) FIGURE 1: (a) Schematic symbol, (b) behavioral model of VD-DIBA. V + W V W VD-DIBA 1 VD-DIBA 2 V V Z V + Z V e CMOS implementation of VD-DIBA is shown in Figure 3. For this purpose, the TSMC CMOS.18 μμm process parameters are used for all MOSFETs in the circuit of Figure 3. Transistor aspect ratios are indicated in Table 1. e TSMC CMOS.18 μμm process parameters are given in Table Nonideal Analysis C 1 R 1 C 2 FIGURE 2: e proposed con guration. TABLE 1 Transistor W/L (μμm) M1, M2, M5, M6, M9, M1, M13 M18 3.6/.36 M3, M4, M7, M8, M11, M12, M19 M /.36 A routine circuit analysis of Figure 2 yields the following characteristic equation: ss 2 +ss 1 CC 1 1 RR 1 gg mm1 + gg mm 1 4CC 1 CC 2 =. (2) us, the condition of oscillation (CO) and frequency of oscillation (FO) are given by 1 RR 1 gg mm1, ωω = gg mm 1 4CC 1 CC 2. erefore, it is seen that FO is independently controllable by transconductance of the VD-DIBA 2 (which is current controllable by bias current, II B2 ), whereas CO is independently established through the resistor RR 1. eabove routine circuit analysis can also be obtained using the analysis performance as given in [21, 22]. (3) Let RR zz and CC zz denote the parasitic resistance and parasitic capacitance of the ZZ terminal. Taking into account the nonidealities of the VD-DIBA, namely VV ww = (ββ + VV zz ββ VV vv ), where ββ + = 1 εε 1 (εε 1 1) and ββ = 1 εε 2 (εε 2 1) are voltage tracking errors of the VD-DIBA then the expressions forcoandfoarefoundtobe CC 2 +CC ZZ 1 RR 1 gg mm1 + 1 RR ZZ CC 1 +CC 2 + 2CC ZZ, 1/RR 1 +1/RR ZZ gg mm1 + ββ ββ 1 ββ+ 1 gg mm 1 RR ZZ 1+ββ 2 ωω = 1+ββ 1. CC 1 CC 2 (4) Taking CC 1 = CC 2 = CC C CC zz, and RR zz RR 1, then (4) reduces to 1 RR 1 gg mm1, ωω = 1+ββ 1 ββ+ 1 ββ+ 2 gg mm 1 1+ββ 1 1+ββ 2 CC2. is nonideal analysis can also be determined using the analysis performance as given in [23]. e active and passive sensitivities are calculated as SS ωω CC = 1, SSωω ββ + 1 ββ + 1 = 2 1+ββ 1 ββ+ 1, SS ωω ββ + 1 ββ = ββ ββ 1 ββ+ 1 1+ββ 1, SSωω = 1 ββ + 2 2, (5)

3 ISRN Electronics 3 V DD I B1 I B4 I B6 M 22 M 23 M 4 M 3 M 8 M 7 M 12 M 11 M 21 M 17 M 18 V + M 1 M 2 V V z M 24 V I v B7 M M 9 M 1 M 19 V 5 M w 6 M 14 M 2 M 15 I B2 I B3 I B5 V SS M 13 M 16 FIGURE 3: CMOS Implementation of VD-DIBA, VV DD = VV SS =1V, II B1 =II B2 =II B3 =II B4 =II B5 =II B6 = 15 μμa and II B7 = 3 μμμμ [2]. Voltage (V) Time (s) 1 4 Voltage (V) Time (s) 1 4 (a) (b) FIGURE 4: (a) Transient output waveform, (b) steady-state response of the output Frequency Stability Voltage (V) fosc = 1.5 MHz THD = 1.26% sing the de nition of the frequency stability factor SS FF as given in [2 4] SS FF = (ddddddddddddddd uuuu (where uu u uuuuu is the normalized frequency and φφφφφφ represents the phase of the open-loop transfer function of the oscillator circuit), with CC 1 =CC 2 =CC, gg mm1 = 1/RR 1 =gg mm and = nnnn mm, where nn is a frequency-controlling transconductor ratio, the SS FF of theproposedoscillatorisfoundtobe nn. erefore, a good frequency stability is obtainable by selecting larger value of nn Frequency (Hz) 1 7 FIGURE 5: Simulation result of the output spectrum. SS ωω ββ 2 which are all low. ββ 2 = 2 1+ββ 2, SSωω gg mm1 = 1 2, SSωω = 1 2, (6) 5. Simulation Results To verify the theoretical analysis, the proposed circuit has been simulated using the CMOS-based VD-DIBA (Figure 3). e component values used were CC 1 = CC 2 =.5 nf, and RR 1 = 1.65 KΩ, the CMOS VD-DIBA was biased with ±1 V D.C. power supplies with II B1 = II B2 = II B3 = II B4 = II B5 =II B6 = 15 μμa and II B7 = 3 μμa. e transconductances of VD-DIBA are controlled by bias currents. SPICE generated output waveforms indicating transient and steady state responses are shown in Figures 4(a) and 4(b), respectively.

4 4 ISRN Electronics (%) 4 SEL>>.988 M.99 M.992 M.994 M.996 M.998 M 1 M 1.2 M 1.4 M 1.6 M 1.8 M 1/period (V(5)) n samples = 1 Sigma = Median = sigma = n divisions = 1 Minimum = th %ile = 1.384e + 6 Mean = th %ile = Maximum = 1.488e (mv) Time (µs) V(5) FIGURE 6: Result of Monte-Carlo Simulation of oscillator circuit of Figure 2. TABLE 2 MODEL n nmos LEVEL = 7, VERSION = 3.1 TNOM = 27 TOX = 4.1EE E E XJ = 1EEEENCH = EEEE VTH = K1 = K2 = EE E E K3 = 1EEEE, K3B = W = 1EE E E NLX = EE E E DVTW=DVT1W=DVT2W=,DVT= DVT1 = DVT2 = U = UA = EE E E UB = EE E EE UC = EE E EE VSAT = EEE A = AGS = B = EE E E B1 = EE E E KETA = EE E E A1 = EE E E A2 = RDSW = 15 PRWG =.5 PRWB =.2 WR = 1 WINT = LINT = EE E E,XL=XW= 1EE E E DWG = EE E E DWB = EE E E VOFF = NFACTOR = CIT = CDSC = 2.4EE E E CDSCD =, CDSCB = ETA = EE E E ETAB = EE E E DSUB = PCLM = PDIBLC1 = , PDIBLC2 = EE E E PDIBLCB =.1 DROUT = PSCBE1 = 8EEEE PSCBEE2= EE E E PVAG =, DELTA =.1 RSH = 6.5 MOBMOD=1PRT=UTE= 1.5 KT1 =.11 KT1L = KT2 =.22 UA1 = 4.31EE E E UB1 = 7.61EE E EE UC1 = 5.6EE E EE AT = 3.3EE4WL=WLN=1WW=WWN=1WWL=LL=LLN =1LW=LWN=1LWL=CAPMOD=2XPART=.5CGDO = 7.9EE E EE CGSO = 7.9EE E EE CGBO = 1EE E EE CJ = EE E E PB =.8 MJ = CJSW = EE E EE PBSW =.8 MJSW = CJSWG = 3.3EE E EE PBSWG =.8 MJSWG = CF = PVTH = EE E E PRDSW = PK2 = EE E E WKETA = EE E E LKETA =.1413 PU = PUA = EE E EE PUB = EE E EE PVSAT = EEE PETA = EE E E PKETA = EE E E MODEL p pmos LEVEL = 7 VERSION = 3.1 TNOM = 27 TOX = 4.1EE E E XJ = 1EE E E NCH = EE17 VTH = K1 = K2 = K3 = K3B = W = 1EEEENLX = EE E E DVTW=DVT1W=DVT2W=DVT= DVT1 = DVT2 =.1 U = UA = EE E E UB = 1EE E EE UC = 1EE E EE VSAT = EEE A = AGS = B = EE E E B1 = EE E E KETA = A1 = A2 = RDSW = PRWG =.5 PRWB = WR = 1 WINT = LINT = EE E E XL=XW= 1EE E E DWG = EE E E DWB = 9.63EE E EE VOFF = NFACTOR = CIT = CDSC = 2.4EE E E CDSCD = CDSCB = ETA = ETAB = DSUB = PCLM = PDIBLC1 = EE E E PDIBLC2 = PDIBLCB = 1EE E E DROUT = PSCBE1 = EEEE PSCBEE2= EE E E PVAG = 15 DELTA =.1 RSH = 7.4 MOBMOD = 1 PRT = UTE = 1.5 KT1 =.11 KT1L = KT2 =.22 UA1 = 4.31EE E E +UB1 = 7.61EE E EE UC1 = 5.6EE E EE AT = 3.3EE4WL=WLN=1WW=WWN=1 WWL=LL=LLN=1LW=LWN=1LWL=CAPMOD= 2 XPART =.5 CGDO = 6.41EE E EE CGSO = 6.41EE E EE CGBO = 1EE E EE CJ = EE E E PB = MJ = CJSW = 2.182EE E EE PBSW = MJSW = CJSWG = 4.22EE E EE PBSWG = MJSWG = CF = PVTH = EE E E PRDSW = PK2 = EE E E WKETA = LKETA = EE E E PU = PUA = EE E EE PUB = 1EE E EE PVSAT = 5 PETA = EE E E PKETA = EE E E

5 ISRN Electronics 5 Reference number No. of active elements TABLE 3 No. of passive elements No. of grounded capacitors Independent electronic tunability [12] 2 3to7 2 Yes [13] Yes [14] Yes [15] Yes [16] No Proposed Yes ese results, thus, con rm the validity of the proposed con guration. Figure 5 shows the output spectrum, where the total harmonic distortion (THD) is found to be 1.26%. e oscillator circuit of Figure 2 has been checked for robustness using Monte-Carlo simulations, the sample result has been shown in Figure 6, which con rms that for ±1% variations in the value of RR 1, the value of oscillation frequency remain close to its normal value of 1.5 MHz and hence almost unaffected by change in RR 1.Acomparisonwithotherpreviouslyknown ECSOs has been given in Table Concluding Remarks A new circuit con guration employing two VD-DIBAs along with a minimum possible number of grounded passive elements (i.e., only one resistor and two capacitors) has been proposed. In oscillator mode, the circuit offers (i) independent control of condition of oscillation and frequency of oscillation former by resistance and later through transconductance, (ii) low active and passive sensitivities, and (iii) a good frequency stability for larger values of nn. e validity of the proposed circuit has been established by SPICE simulations. References [1] R. Senani, New types of sine wave oscillators, IEEE Transactions on Instrumentation and Measurement, vol. 34, no. 3, pp , [2] D. R. Bhaskar and R. Senani, New CFOA-based singleelement-controlled sinusoidal oscillators, IEEE Transactions on Instrumentation and Measurement, vol. 55, no. 6, pp , 26. [3] D. R. Bhaskar and R. Senani, New current-conveyor-based single-resistance-controlled/voltage-controlled oscillator employing grounded capacitors, Electronics Letters, vol. 29, no. 7, pp , [4] S. S. Gupta and R. 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Alzaher, CMOS digitally programmable quadrature oscillators, International Circuit eory and Applications, vol. 36, no. 8, pp , 28. [11] E. Tlelo-Cuautle, M. A. Duarte-Villaseñor, J. M. García-Ortega, and C. Sánchez-López, Designing SRCOs by combining SPICE and Verilog-A, International Electronics,vol.94,no. 4, pp , 27. [12] Y. Tao and J. Kel Fidler, Electronically tunable dual-ota second-order sinusoidal oscillators/ lters with non-interacting controls: a systematic synthesis approach, IEEE Transactions on Circuits and Systems I: Fundamental eory and Applications, vol. 47, no. 2, pp , 2. [13] D. R. Bhaskar, M. P. Tripathi, and R. Senani, Systematic derivation of all possible canonic OTA-C sinusoidal oscillators, the Franklin Institute, vol. 33, no. 5, pp , [14] T. Tsukutani, Y. Sumi, and Y. Fukui, Electronically controlled current-mode oscillators using MO-OTAs and grounded capacitors, Frequenz, vol. 6, no , pp , 26. [15] D. R. Bhaskar, K. K. Abdalla, and R. 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Pushkar, Realization of new electronically controllable grounded and oating simulated inductance circuits using voltage differencing differential input buffered ampli ers, Active and Passive Electronic Components, vol. 211, Article ID 11432, 8 pages, 211. [21] C. Sánchez-López, E. Martínez-Romero, and E. Tlelo-Cuautle, Symbolic analysis of OTRAs-based circuits, Applied Research and Technology, vol. 9, no. 1, pp. 69 8, 211. [22] C. Sánchez-López, F. V. Fernández, E. Tlelo-Cuautle, and S. X. D. Tan, Pathological element-based active device models

6 6 ISRN Electronics and their application to symbolic analysis, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 58, no. 6, pp , 211. [23] E. Tlelo-Cuautle, C. Sánchez-López, and D. Moro-Frías, Symbolic analysis of (MO)(I)CCI(II)(III)-based analog circuits, International Circuit eory and Applications, vol. 38, no. 6, pp , 21.

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