SAMHOP Microelectronics Corp. FEATURES
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1 GENERAL DESCRIPTION The is 6 channels electronic controlled by 3wire serial data. The IC is suitable for use in DVD systems and AV. APPLICATIONS * DVD * Home Audio Equipment * AV FEATURES * 4 Output ports * Builtin microcomputer interface circuit controlled by 6bit serial data. * Electronic Volume level: ~79, (/step) * Tone control Bass/Treble, ~+(2/step) PIN ASSIGNMENTS OUT4 OUT3 OUT2 OUT AVDD SWin GNDS SRin SLin GNDC Cin GNDR Rin GNDL Lin BYPASSR BYPASSL LTRE LBASS3 LBASS2 LBASS DVDD CLK DATA LATCH DGND AGND SWout SRout SLout Cout Rout Lout AVSS CL CL2 CR CR2 RTRE RBASS3 RBASS2 RBASS OUT4 OUT3 OUT2 OUT AVDD SWin GNDS SRin SLin GNDC Cin GNDR Rin GNDL Lin BYPASSR BYPASSL LTRE LBASS3 LBASS2 LBASS NC DVDD CLK DATA LATCH DGND AGND SWout SRout SLout Cout Rout Lout AVSS CL CL2 CR CR2 RTRE RBASS3 RBASS2 RBASS NC SDIP 42PIN TSSOP 44PIN Page MAY.23
2 BLOCK DIAGRAM C input SW input SL input SR input BypassL C output SW output SL output SR output BypassR L input R input tone L output R output μcom interface Latch Data CLK Page 2 MAY.23
3 PIN DESCRIPTION (Pin count base on 42pin SDIP) Pin No Symbol OUT4 OUT3 OUT2 OUT AVDD GNDS GNDC GNDR GNDL SW in SR in SL in C in SW out SR out SL out C out R in L in Function Port OUTPUT Analog positive Power supply GND Volume INPUT Volume OUTPUT Tone INPUT OUTPUT: PMOS Transistor open drain 6,8,9, 8 to 22 KΩ (TYP) 3,5 +7V Connect to analog GND 7 KΩ (TYP) Circuit DVDD(=5V) to 4 33,34,35, BYPASSR BYPASSL L out R out L.R Volume INPUT in BYPASS mode L OUTPUT R OUTPUT 6,7 7 KΩ (TYP) 8 to 22 KΩ (TYP) 3, LTRE RTRE tone Treble cycle control 8, LBASS3 RBASS3 LBASS2 RBASS2 LBASS RBASS tone Bass cycle control 9, KΩ (TYP) 2,23 2, CR2 CL2 Tone OUTPUT 26, CR CL L out R out AVSS AGND DGND LATCH DATA CLK DVDD L.R Volume INPUT L OUTPUT R OUTPUT Analog negative Power supply Analog GND Digital GND Latch INPUT Data INPUT Clock INPUT Forward data Digital Power supply 27,29 7 KΩ (TYP) 39,4,4 8 to 22 KΩ (TYP) S 7V INPUT:schmitt trigger type +5V 3,32 Page 3 MAY.23
4 PIN CONFIGURATION AND IC INTERNAL BLOCK DIAGRAM ( Pin count base on 42pin ) OUT4 42 DVDD OUT3 OUT2 OUT OUTPUT PORT MCU I/F CLK DATA LATCH SWin 6 38 DGND 36 SW out SRin SLin SRout SLout Cout Cin 32 Rout 3 Lout Rin AVSS CL Lin 5 28 CL2 BYPASSR 6 27 CR BYPASSL 7 26 CR2 AVDD 5 tone tone Page 4 MAY.23
5 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Conditions Ratings Unit Vsupply Supply Voltage AVDDAVSS 6. V Pd Power dissipation Ta<25 o C mw K θ Thermal derating Ta>25 o C *standard board mw / o C Topr Operating temperature 2~+75 o C Tstg Storage temperature 4~+25 o C THERMAL DERATING (MAXIMUM RATING) Standard board.5 POWER DISSIPATION pd[w] AMBIENT TEMPERATURE Ta [ ] Page 5 MAY.23
6 RECOMMENDED OPERATING CONDITION Parameter Symbol Condition Min. Typ. Max. Unit Analog positive Supply Voltage AVDD V Analog negative Supply Voltage AVSS V Digital Supply Voltage DVDD V Highlevel Input Voltage VIH DVDD/2+ DVDD V Lowlevel Input Voltage VIL DGND DVDD/2 V Note : AVSS<DGND<DVDD<AVDD or AVSS<DGND<AVDD<DVDD Note2 : AGND=(AVSS+AVDD ) / 2 DATA TIMING(Recommended conditions) DATA H L D D DE DF D H CLOCK L H LATCH L Note: CLOCK and LATCH function at raising edges of pulse. Page 6 MAY.23
7 CLOCK, DATA, LATCH TIMING tcr CLOCK 75% 25% tr tf twhc twlc 75% DATA 25% tsc tr tsd thd tf tr twhl tf tsl 75% LATCH 25% 25% DIGITAL BLOCK TIMING REGULATION Symbol Parameter Min Limits Typ Max Unit tcr CLOCK cycle time 8 twhc twlc CLOCK pulse width("h"level) CLOCK pulse width("l"level) tr CLOCK,DATA,LATCH rise time.8 tf tsd CLOCK,DATA,LATCH fall time DATA setup time.6.8 μ sec thd DATA hold time.6 tsl LATCH setup time 2 twhl LATCH pulse width 3.2 tsc CLOCK start time after LATCH 3.2 Page 7 MAY.23
8 DIGITAL CONTROL SPECIFICATION Four kinds of input format options are available by changing slot settings of DE and DF. ( ) D D D2 D3 D4 D5 D6 D7 TONE CONTROL TREBLE OUTPUT PORT :High :Low D8 D9 DA DB DC DD TONE CONTROL BASS BY PASS :ON :OFF DE DF ( 2 ) D2 D2 D22 D32 D42 D52 D62 D72 D82 D92 DA2 DB2 DC2 DD2 DE DF VOLUME Lch VOLUME Rch ( 3 ) D3 D32 D23 D33 D43 D53 D63 D73 D83 D93 DA3 DB3 DC3 DD3 DE DF VOLUME Cch VOLUME SWch ( 4 ) D4 D4 D24 D34 D44 D54 D64 D74 D84 D94 DA4 DB4 DC4 DD4 DE DF VOLUME SLch VOLUME SRch NOTE : When the IC is powered up, the internal setting of channel output are fixed to. Page 8 MAY.23
9 SETTING CODE () Tone Control (bass / treble) ATT treble bass D D8 D D9 D2 DA D3 DB Port output D4 D5 D6 D7 PORT PORT2 PORT3 PORT4 L H L H L H L H BYPASS control DD TONE BYPASS Note: Do not input other data than the above. Page 9 MAY.23
10 (2) Volume ( ~39 ) Note: Do not input other data than the above. A TT Volume DX DX D2X D3X D4X D5X D7X D8X D9X DAX DBX DCX D6X DDX Page MAY.23
11 (2)2 VOLUME ( 4 ~ ) Note: Do not input other data than the above. A DX DX D2X D3X D4X D5X D6X TT Volume D7X D8X D9X DAX DBX DCX DDX Page MAY.23
12 ELECTRICAL CHARACTERISTICS ( Ta=25,AVDD=7.V, AVSS=7.V, DVDD=5.V, f=khz, unless otherwise noted. Rg=KΩ, Rl=KΩ, TONE CONTROL, VOLUME are set to /FLAT ) ()Power Supply Characteristics ( Pin count base on 42pin version ) Parameter Symbol Test condition Analog positive circuit current Analog negative circuit current Digital circuit current Aldd Alss Dldd Current at pin 5 No signal Current at pin 3 No signal Current at pin 42 No signal Min Limits typ Max Unit ma ma ma (2)Input/Output Characteristics ( Pin count base on 42pin version ) Limits Parameter Symbol Test condition Unit Min typ Max Input resistance Ri 3,5,6,7,27,29pin KΩ Maximum output voltage Pass gain Distortion Output noise voltage VOM Gv 6,8,9,,3,5,6,7pin INPUT 3~36pin OUTPUT, THD=% Vi=.2Vrms,FLAT 6,8,9,,3,5,6,7pin INPUT 3~36pin OUTPUT Vrms BW=4~3kHz THD.4.9 % Vi=.2Vrms,RL=KΩ Vn(VOL) Vn(tone) 3~36pin JISA,VOL=O 3,32pin JISA,VOL= μvrms μvrms Signal to noise ratio S/N all gains=; Vo=Vrms 98 5 Maximum attenuation ATTmax 3~36 pin JISA,VOL= Volume gain between channels Dvol.5.5 Crosstalk between channels CT Vo=.5Vrms,RL=KΩ, JISA, Rg=KΩ 8 Port output current IL RL=22KΩ.2 ma Page 2 MAY.23
13 (3) Tone Control Characteristics ( Pin count base on 42pin version ) Limits Parameter Symbol Test condition Unit Min typ Max T 2 8 T T Tone control voltage gain T 4 T 2 Vo=.2Vrms,f=kHz TREBLE(f=kHz) BASS(f=Hz) T +2 T +4 INPUT 3,5pin OUTPUT 3,32pin T T T Balance between channel BALT Input pin3,5 Vo=.2Vrms Output pin3,32, RECOMMENDED OPERATING CONDITIONS Analog Digital Supply voltage range +6. ~ +8.V 4.5 ~ 5.5V Rated supply voltage +7.V 5.V Page 3 MAY.23
14 SIGNAL PROCESSING DIAGRAM BYPASS 7KΩ TONE in TONE CONTROL (+ to ) BASS TREBLE VOLUME Lch, Rch ( to ) 3.3 μf 7KΩ + _ + _ + _ 7KΩ + _ VOLUME in μ.5 F.33 μf 82pF VOLUME Cch,SWch,SLch,SRch( to ) + _ Note: () The resistance value of Volume change about 8 to 22KΩ by attenuated condition. (2) No built in a zero cross circuit. (3) When the mode changed (BYPASS/TONE), it is necessary the muting function. CLK, DATA, LATCH DVDD(=5V) S INPUT: Schmitt trigger type OUTPUT PORT OUTPUT port: PMOS transistor open drain Page 4 MAY.23
15 APPLICATION EXAMPLE ( Pin count base on 44pin ) OUT4 22KΩ 44 DVDD=5V OUT3 OUT2 OUT 22KΩ 22KΩ 22KΩ OUT PUT PORT MCU I/F MCU AVDD=7V SWin DGND AGND 7 38 SWout SRin 8 37 SRout SLin 9 36 SLout Cin Cout Rout Rin Lout AVSS= 7V Lin BYPASSR BYPASSL μ.5 F μ.33 F 82pF tone tone pF μ.5 F μ.33 F NC NC Units Resistance:Ω / Capacitance: F Page 5 MAY.23
16 Figure : Tone Response of Treble Figure2 : Tone Response of Bass Figure3 : Crosstalk vs. R/L ch Figure4 : Distortion and Noise vs. Frequency (Vin=25mV,AV=,ALL CONTROLS FLAT, VOLUME=,2) Page 6 MAY.23
17 PACKAGE OUTLINE ( TSSOP44) 2 (4X) BOTTOM EPIN INDENT.69 (."~.4" OP) PIN I INCCATOR.47 SURFACE POLISHED E E DETAIL B L. GAGE PLANE D 2 (4X) C ZD e b r A A2 A DETAIL B SYMBOLS A A A2 b C D E E e L ZD y DIMENSIONS IN MILLIMETERS MIN NOM MAX o o.76 DIMENSIONS IN INCHES MIN o. NOM MAX o.3 NOTE:. CONTROLLING DIMENSION INCH. 2. LEAD FRAME MATERIAL ALLOY DIMENSION "D" DOES NOT INCLUDE MOLD FLASH, THE BAR BURRS AND GATE BURRS. MOLD FLASH,THE BAR BURRS AND GATE BURRS SHALL NOT EXCEED.66"(.5mm) PER END DIMENSION "E" DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH NOT EXCEED." (.25mm) PER SIDE. 4. DIMENSION "b" DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.3"(.8mm) TOTAL IN EXCESS OF THE "b" DIMENSION AT MAXIMUM MATERIAL CONDITION DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINMUM SPACE BETWEEN PROTRUSION AND AN ADJACENT LEAD TO BE.28"(.7mm). 5. TOLERANCE +."(.25mm) UNLESS OTHERWISE SPECIFIED. 6. OTHERWISE DIMENSION FOLLOW ACCEPTABLE SPEC. 7. REFERENCE DOCUMENT:JEDEC SPEC MS24. Page 7 MAY.23
18 PACKAGE OUTLINE ( SDIP42 ) F 5"(4X) E REF eb 5"(2X) A 5"(2X) A BREF B 7 (TYP) SYMBOL A A B D E F eb Dimonation in mil Dimenation in mm MIN NOM MAX MIN NOM MAX o o o o o o PACKAGE OUTLINE DIMENSION FOR PSDIP 42 PIN Page 8 MAY.23
SAMHOP Microelectronics Corp. SM7346A 6 CHANNELS VOLUME CONTROLLER REV DECEMBER 22, 2004
SAMHOP Microelectronics Corp. REV. 3. DECEMBER 22, 24 The information in this document is subject to change without notice. c SAMHOP Microelectronics Corp. All Rights Reserved. 7 7F,No.,Min-Chyuan Road,
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