Bias Stress Testing of SiC MOSFETs Robert Shaw Manager, Test and Qualification August 15 th, 2014 Special thanks to the U.S. Department of Energy for funding this under SBIR DE-SC0011315.
Outline Objectives Test Plans High Temperature Gate Bias (HTGB) Gate Switching Bias DC Body Diode Bias Pulsed Body Diode Bias Initial Characterization (t0) Results HTGB Results (1000 hours) Pulsed Body Diode Results (1000 hours) 2
Objectives
Objectives An assessment of gate oxide stability in commercially available SiC MOSFETs Prototype/engineering sample SiC MOSETs included as available Supplemental assessment of body diode/channel degradation Study the effects of biasing at 150 C junction temperature Bias devices for a minimum of 1000 hours, with characterization at specified intervals 4
Test Plan 5
Test Plan Three vendors included in testing Target device is 1200 V, ~20 A SiC MOSFET Devices biased at a junction temperature of 150 C Four different electrical biases: High Temperature Gate Bias (HTGB) Gate Switching Bias DC Body Diode Bias Pulsed Body Diode Bias
HTGB Goal is to determine effect of constant gate voltage bias on oxide stability Gate to source voltage applied while tying drain and source to common potential (ground) Bias test modeled after JESD-22 A108C Four different bias voltages +20, +15, -10, and -15 volts Twenty devices at each voltage for each vendor Total of 240 devices Characterization performed at 0, 300, 600, and 1000 hours
Gate Switching Bias Goal is to compare alternating gate bias voltage to constant gate bias This test aims to simulate gate bias similar to that of a device in a switching application Gate bias: 100 khz frequency +20 to -5 V 50% duty cycle Drain and source tied to common potential (ground) 5 devices from each vendor Characterization performed at 0, 300, 600, and 1000 hours 8
DC Body Diode Bias Goal is to determine channel and/or body diode degradation as a result of body diode conduction Gate to source voltage held constant at -5 V to ensure no channel conduction Constant body diode bias of 18 A Thermal management system designed to maintain junction temperature of 150 C 5 devices from each vendor Characterization performed at 0, 1, 10, and 100 minutes. Previous tests have shown performance shifts in as little as 1 minute 9
Pulsed Body Diode Test Goal is to compare DC body diode bias to pulsed body diode bias This test aims to simulate free wheeling body diode conduction found in switching applications Gate to source voltage held constant at -5 V to ensure no channel conduction Pulse characteristics 18 A amplitude 450 ns pulse width 50 khz frequency 5 devices from each vendor Characterization performed at 0, 300, 600, and 1000 hours 10
Initial Characterization 11
Reverse Drain Current (V DS = 1200 V) V GS = 0 V Reverse Drain Current (na) Vendor A Vendor B Vendor C Average 22.1 70.0 7.9 Minimum 6.1 16.4 6.1 Maximum 370.3 301.4 26.3 V GS = -4 V Reverse Drain Current (na) Vendor A Vendor B Vendor C Average 19.9 55.6 5.7 Minimum 5.6 13.1 4.8 Maximum 245.7 242.8 15.1 12
Threshold Voltage Threshold Voltage (V) Vendor A Vendor B Vendor C Average 2.5 2.9 3.2 Minimum 2.2 2.8 2.9 Maximum 2.9 3.1 3.3 Threshold voltage was measured at I DS = 10 ma, with V DS = 10 V. 13
Sub-threshold 14
On-resistance On-resistance (mω) Vendor A Vendor B Vendor C Average 73.6 110.0 78.9 Minimum 68.7 104.9 74.3 Maximum 80.3 112.7 89.6 On-resistance was measured at I DS = 20 A, V GS = 20 V 15
Body Diode 16
3 rd Quadrant Operation 17
HTGB Results Threshold voltage plotted 20 samples per vendor at each gate voltage Vds = 10 V, Vth measured at Ids = 10 ma Characterized at 0, 300, 600, and 1000 hours 18
Vendor A 19
Vendor B 20
Vendor C 21
Vendor C Vendor B Vendor A Threshold Shift Averages V GS 0 hr 300 hr 600 hr 1000 hr -15 2.48-3.96-4.59-4.85-10 2.45-0.94-1.40-1.63 +15 2.53 3.86 4.14 4.80 +20 2.53 5.45 5.99 7.17-15 2.86 2.44 2.49 2.47-10 2.83 2.55 2.57 2.58 +15 2.92 3.40 3.39 3.41 +20 3.02 3.59 3.57 3.60-15 3.18 1.77 1.71 1.64-10 3.17 2.55 2.53 2.52 +15 3.09 3.44 3.42 3.42 +20 3.18 3.57 3.54 3.58 22
Pulsed Body Diode Bias Results 5 samples per vendor 18 A pulse amplitude 450 ns pulse width 50 khz frequency 23
Pulsed Body Diode Results 24
Gate Switching Bias Results 5 samples per vendor 100 khz frequency V GS = +20 to -5 V 50% duty cycle 25
Gate Switching Bias Results Due to a test bed failure during testing, no results are available for Vendor B, and the sample size for Vendor C was limited to 3.
Questions?